Enable SSE 4.2 unconditionally (bytecodealliance#3833)

* Enable SSE 4.2 unconditionally

Fuzzing over the weekend found that `i64x2` comparison operators
require `pcmpgtq` which is an SSE 4.2 instruction. Along the lines of bytecodealliance#3816
this commit unconditionally enables and requires SSE 4.2 for compilation
and fuzzing. It will no longer be possible to create a compiler for
x86_64 with simd enabled if SSE 4.2 is disabled.

* Update comment

cranelift/codegen/meta/src/isa/x86.rs

@@ -38,7 +38,7 @@ fn define_settings(shared: &SettingGroup) -> SettingGroup {
         "has_sse42",
         "Has support for SSE4.2.",
         "SSE4.2: CPUID.01H:ECX.SSE4_2[bit 20]",
-        false,
+        true,
     );
     let has_avx = settings.add_bool(
         "has_avx",

cranelift/codegen/src/isa/x64/mod.rs

@@ -178,11 +178,15 @@ fn isa_constructor(
     let isa_flags = x64_settings::Flags::new(&shared_flags, builder);
 
     // Check for compatibility between flags and ISA level
-    // requested. In particular, SIMD support requires SSE4.1.
+    // requested. In particular, SIMD support requires SSE4.2.
     if shared_flags.enable_simd() {
-        if !isa_flags.has_sse3() || !isa_flags.has_ssse3() || !isa_flags.has_sse41() {
+        if !isa_flags.has_sse3()
+            || !isa_flags.has_ssse3()
+            || !isa_flags.has_sse41()
+            || !isa_flags.has_sse42()
+        {
             return Err(CodegenError::Unsupported(
-                "SIMD support requires SSE3, SSSE3, and SSE4.1 on x86_64.".into(),
+                "SIMD support requires SSE3, SSSE3, SSE4.1, and SSE4.2 on x86_64.".into(),
             ));
         }
     }
@@ -354,6 +358,7 @@ mod test {
         isa_builder.set("has_sse3", "false").unwrap();
         isa_builder.set("has_ssse3", "false").unwrap();
         isa_builder.set("has_sse41", "false").unwrap();
+        isa_builder.set("has_sse42", "false").unwrap();
         assert!(matches!(
             isa_builder.finish(shared_flags),
             Err(CodegenError::Unsupported(_)),

crates/fuzzing/src/generators.rs

@@ -756,8 +756,8 @@ impl<'a> Arbitrary<'a> for CodegenSettings {
                     std:"sse3" => clif:"has_sse3" ratio: 1 in 1,
                     std:"ssse3" => clif:"has_ssse3" ratio: 1 in 1,
                     std:"sse4.1" => clif:"has_sse41" ratio: 1 in 1,
+                    std:"sse4.2" => clif:"has_sse42" ratio: 1 in 1,
 
-                    std:"sse4.2" => clif:"has_sse42",
                     std:"popcnt" => clif:"has_popcnt",
                     std:"avx" => clif:"has_avx",
                     std:"avx2" => clif:"has_avx2",

crates/wasmtime/src/config.rs

@@ -554,6 +554,10 @@ impl Config {
     /// this does not enable the [relaxed simd proposal] as that is not
     /// implemented in Wasmtime at this time.
     ///
+    /// On x86_64 platforms note that enabling this feature requires SSE 4.2 and
+    /// below to be available on the target platform. Compilation will fail if
+    /// the compile target does not include SSE 4.2.
+    ///
     /// This is `true` by default.
     ///
     /// [proposal]: https://github.com/webassembly/simd