Skip to content

Actions: arm/arm-toolchain

All workflows

Actions

Loading...
Loading

Showing runs from all workflows
6,740 workflow runs
6,740 workflow runs

Filter by Event

Filter by Status

Filter by Branch

Filter by Actor

Automerge
Automerge #2147: completed by pratlucas
February 24, 2025 19:04 11m 53s
February 24, 2025 19:04 11m 53s
[Wunsafe-buffer-usage] False positives for & expression indexing cons…
LLVM Premerge Checks #1731: Commit ab9cd53 pushed by llvm-sync bot
February 24, 2025 19:04 5s main
February 24, 2025 19:04 5s
Sync from Upstream LLVM
Sync from Upstream LLVM #2318: Scheduled
February 24, 2025 19:02 1m 33s arm-software
February 24, 2025 19:02 1m 33s
Automerge
Automerge #2146: completed by pratlucas
February 24, 2025 18:39 12m 10s
February 24, 2025 18:39 12m 10s
[flang] Workaround build failure.
LLVM Premerge Checks #1730: Commit 823a597 pushed by llvm-sync bot
February 24, 2025 18:38 4s main
February 24, 2025 18:38 4s
Sync from Upstream LLVM
Sync from Upstream LLVM #2317: Scheduled
February 24, 2025 18:37 1m 44s arm-software
February 24, 2025 18:37 1m 44s
Automerge
Automerge #2145: completed by pratlucas
February 24, 2025 18:05 11m 2s
February 24, 2025 18:05 11m 2s
[CodeGen] Change copyPhysReg interface to use Register instead of MCR…
LLVM Premerge Checks #1729: Commit 571b787 pushed by llvm-sync bot
February 24, 2025 18:05 4s main
February 24, 2025 18:05 4s
Sync from Upstream LLVM
Sync from Upstream LLVM #2316: Scheduled
February 24, 2025 18:03 1m 41s arm-software
February 24, 2025 18:03 1m 41s
Automerge
Automerge #2144: completed by pratlucas
February 24, 2025 17:34 11m 26s
February 24, 2025 17:34 11m 26s
[RISCV] Remove unnecessary entries from RISCVVInversePseudosTable. NF…
LLVM Premerge Checks #1728: Commit a0be17d pushed by llvm-sync bot
February 24, 2025 17:34 4s main
February 24, 2025 17:34 4s
Sync from Upstream LLVM
Sync from Upstream LLVM #2315: Scheduled
February 24, 2025 17:32 1m 34s arm-software
February 24, 2025 17:32 1m 34s
Automerge
Automerge #2143: completed by pratlucas
February 24, 2025 17:07 11m 32s
February 24, 2025 17:07 11m 32s
[PPC][MC] Restore support for case-insensitive register names (#128525)
Test documentation build #339: Commit f1252f5 pushed by llvm-sync bot
February 24, 2025 17:06 2s main
February 24, 2025 17:06 2s
[PPC][MC] Restore support for case-insensitive register names (#128525)
LLVM Premerge Checks #1727: Commit f1252f5 pushed by llvm-sync bot
February 24, 2025 17:06 3s main
February 24, 2025 17:06 3s
Sync from Upstream LLVM
Sync from Upstream LLVM #2314: Scheduled
February 24, 2025 17:02 4m 7s arm-software
February 24, 2025 17:02 4m 7s
Automerge
Automerge #2142: completed by pratlucas
February 24, 2025 16:39 12m 10s
February 24, 2025 16:39 12m 10s
[MLIR][OpenMP] Simplify definition of the BlockArgOpenMPOpInterface, …
LLVM Premerge Checks #1726: Commit ff7790e pushed by llvm-sync bot
February 24, 2025 16:39 4s main
February 24, 2025 16:39 4s
[MLIR][OpenMP] Simplify definition of the BlockArgOpenMPOpInterface, …
Test documentation build #338: Commit ff7790e pushed by llvm-sync bot
February 24, 2025 16:39 3s main
February 24, 2025 16:39 3s
Sync from Upstream LLVM
Sync from Upstream LLVM #2313: Scheduled
February 24, 2025 16:37 1m 32s arm-software
February 24, 2025 16:37 1m 32s
Automerge
Automerge #2141: completed by pratlucas
February 24, 2025 16:05 11m 21s
February 24, 2025 16:05 11m 21s
[RISCV] Add Qualcomm uC Xqcilia (Large Immediate Arithmetic) extensio…
LLVM Premerge Checks #1725: Commit 538b898 pushed by llvm-sync bot
February 24, 2025 16:05 5s main
February 24, 2025 16:05 5s
[RISCV] Add Qualcomm uC Xqcilia (Large Immediate Arithmetic) extensio…
Test documentation build #337: Commit 538b898 pushed by llvm-sync bot
February 24, 2025 16:05 3s main
February 24, 2025 16:05 3s
Sync from Upstream LLVM
Sync from Upstream LLVM #2312: Scheduled
February 24, 2025 16:03 1m 33s arm-software
February 24, 2025 16:03 1m 33s
Automerge
Automerge #2140: completed by pratlucas
February 24, 2025 15:36 19m 56s
February 24, 2025 15:36 19m 56s