Add Armv8.3 architecture extension

anrieff · Jun 21, 2024 · b967cea · b967cea
1 parent 5e3b9fa
commit b967cea
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diff --git a/libcpuid/cpuid_main.c b/libcpuid/cpuid_main.c
@@ -1822,6 +1822,19 @@ const char* cpu_feature_str(cpu_feature_t feature)
 		{ CPU_FEATURE_TTCNP, "ttcnp" },
 		{ CPU_FEATURE_UAO, "uao" },
 		{ CPU_FEATURE_XNX, "xnx" },
+		{ CPU_FEATURE_CCIDX, "ccidx" },
+		{ CPU_FEATURE_CONSTPACFIELD, "constpacfield" },
+		{ CPU_FEATURE_EPAC, "epac" },
+		{ CPU_FEATURE_FCMA, "fcma" },
+		{ CPU_FEATURE_FPAC, "fpac" },
+		{ CPU_FEATURE_FPACCOMBINE, "fpaccombine" },
+		{ CPU_FEATURE_JSCVT, "jscvt" },
+		{ CPU_FEATURE_LRCPC, "lrcpc" },
+		{ CPU_FEATURE_PACIMP, "pacimp" },
+		{ CPU_FEATURE_PACQARMA3, "pacqarma3" },
+		{ CPU_FEATURE_PACQARMA5, "pacqarma5" },
+		{ CPU_FEATURE_PAUTH, "pauth" },
+		{ CPU_FEATURE_SPEV1P1, "spev1p1" },
 	};
 	unsigned i, n = COUNT_OF(matchtable);
 	if (n != NUM_CPU_FEATURES) {

diff --git a/libcpuid/libcpuid.h b/libcpuid/libcpuid.h
@@ -772,6 +772,19 @@ typedef enum {
 	CPU_FEATURE_TTCNP, /*!< ARM: Translation table Common not private translations */
 	CPU_FEATURE_UAO, /*!< ARM: Unprivileged Access Override control */
 	CPU_FEATURE_XNX, /*!< ARM: Translation table stage 2 Unprivileged Execute-never */
+	CPU_FEATURE_CCIDX, /*!< ARM: Extended cache index */
+	CPU_FEATURE_CONSTPACFIELD, /*!< ARM: PAC algorithm enhancement */
+	CPU_FEATURE_EPAC, /*!< ARM: Enhanced pointer authentication */
+	CPU_FEATURE_FCMA, /*!< ARM: Floating-point complex number instructions */
+	CPU_FEATURE_FPAC, /*!< ARM: Faulting on AUT* instructions */
+	CPU_FEATURE_FPACCOMBINE, /*!< ARM: Faulting on combined pointer authentication instructions */
+	CPU_FEATURE_JSCVT, /*!< ARM: JavaScript conversion instructions */
+	CPU_FEATURE_LRCPC, /*!< ARM: Load-Acquire RCpc instructions */
+	CPU_FEATURE_PACIMP, /*!< ARM: Pointer authentication - IMPLEMENTATION DEFINED algorithm */
+	CPU_FEATURE_PACQARMA3, /*!< ARM: Pointer authentication - QARMA3 algorithm */
+	CPU_FEATURE_PACQARMA5, /*!< ARM: Pointer authentication - QARMA5 algorithm */
+	CPU_FEATURE_PAUTH, /*!< ARM: Pointer authentication */
+	CPU_FEATURE_SPEV1P1, /*!< ARM: Statistical Profiling Extension version 1 */
 	/* termination: */
 	NUM_CPU_FEATURES,
 } cpu_feature_t;

diff --git a/libcpuid/recog_arm.c b/libcpuid/recog_arm.c
@@ -400,6 +400,7 @@ static void load_arm_features(struct cpu_raw_data_t* raw, struct cpu_id_t* data)
 		[0] /* ID_AA64DFR0 */ = {
 			{ 39, 36, 0b0000, CPU_FEATURE_DOUBLELOCK },
 			{ 35, 32, 0b0001, CPU_FEATURE_SPE },
+			{ 35, 32, 0b0010, CPU_FEATURE_SPEV1P1 },
 			{ 11,  8, 0b0001, CPU_FEATURE_PMUV3 }, /* Performance Monitors Extension, PMUv3 implemented. */
 			{ 11,  8, 0b0100, CPU_FEATURE_PMUV3P1 }, /* PMUv3 for Armv8.1 */
 			{  3,  0, 0b1000, CPU_FEATURE_DEBUGV8P2 },
@@ -427,10 +428,32 @@ static void load_arm_features(struct cpu_raw_data_t* raw, struct cpu_id_t* data)
 			{ -1, -1,     -1, -1 }
 		},
 		[1] /* ID_A64ISAR1 */ = {
+			{ 31, 28, 0b0001, CPU_FEATURE_PACIMP },
+			{ 27, 24, 0b0001, CPU_FEATURE_PACQARMA5 },
+			{ 23, 20, 0b0001, CPU_FEATURE_LRCPC },
+			{ 19, 16, 0b0001, CPU_FEATURE_FCMA },
+			{ 15, 12, 0b0001, CPU_FEATURE_JSCVT },
+			{ 11,  8, 0b0001, CPU_FEATURE_PAUTH },
+			{ 11,  8, 0b0010, CPU_FEATURE_EPAC },
+			//{ 11,  8, 0b0011, CPU_FEATURE_PAUTH2 },
+			{ 11,  8, 0b0100, CPU_FEATURE_FPAC },
+			{ 11,  8, 0b0101, CPU_FEATURE_FPACCOMBINE },
+			{  7,  4, 0b0001, CPU_FEATURE_PAUTH },
+			{  7,  4, 0b0010, CPU_FEATURE_EPAC },
+			//{  7,  4, 0b0011, CPU_FEATURE_PAUTH2 },
+			{  7,  4, 0b0100, CPU_FEATURE_FPAC },
+			{  7,  4, 0b0101, CPU_FEATURE_FPACCOMBINE },
 			{  3,  0, 0b0001, CPU_FEATURE_DPB },
 			{ -1, -1,     -1, -1 }
 		},
 		[2] /* ID_A64ISAR2 */ = {
+			{ 27, 24, 0b0001, CPU_FEATURE_CONSTPACFIELD },
+			{ 15, 12, 0b0001, CPU_FEATURE_PAUTH },
+			{ 15, 12, 0b0010, CPU_FEATURE_EPAC },
+			//{ 15, 12, 0b0011, CPU_FEATURE_PAUTH2 },
+			{ 15, 12, 0b0100, CPU_FEATURE_FPAC },
+			{ 15, 12, 0b0101, CPU_FEATURE_FPACCOMBINE },
+			{ 11,  8, 0b0001, CPU_FEATURE_PACQARMA3 },
 			{ -1, -1,     -1, -1 }
 		}
 	};
@@ -457,6 +480,7 @@ static void load_arm_features(struct cpu_raw_data_t* raw, struct cpu_id_t* data)
 			{ -1, -1,     -1, -1 }
 		},
 		[2] /* ID_AA64MMFR2 */ = {
+			{ 23, 20, 0b0001, CPU_FEATURE_CCIDX },
 			{ 19, 16, 0b0001, CPU_FEATURE_LVA },
 			{ 15, 12, 0b0001, CPU_FEATURE_IESB },
 			{ 11,  8, 0b0001, CPU_FEATURE_LSMAOC },
@@ -517,6 +541,17 @@ static void load_arm_features(struct cpu_raw_data_t* raw, struct cpu_id_t* data)
 
 	for (i = 0; i < MAX_ARM_ID_AA64ZFR_REGS; i++)
 		MATCH_FEATURES_TABLE_WITH_RAW(aa64zfr);
+
+	/* FEAT_PAuth, Pointer authentication
+	When FEAT_PAuth is implemented, one of the following must be true:
+	- Exactly one of the PAC algorithms is implemented.
+	- If the PACGA instruction and other Pointer authentication instructions use different PAC algorithms, exactly two PAC algorithms are implemented.
+	The PAC algorithm features are:
+	- FEAT_PACQARMA5.
+	- FEAT_PACIMP.
+	- FEAT_PACQARMA3. */
+	if (data->flags[CPU_FEATURE_PACIMP] || data->flags[CPU_FEATURE_PACQARMA3] || data->flags[CPU_FEATURE_PACQARMA5])
+		data->flags[CPU_FEATURE_PAUTH] = 1;
 }
 #undef MAX_ARM_FIELDS_PER_REGISTER
 #undef MATCH_FEATURES_TABLE_WITH_RAW