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arm: dts: add trees for ZedBoard with AD7944, AD7985, and AD7986
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This adds trees for ZedBoard with AD7944, AD7985, and AD7986 evaluation
boards.

Signed-off-by: David Lechner <[email protected]>
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dlech committed Oct 13, 2023
1 parent 944efe6 commit dc0789f
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102 changes: 102 additions & 0 deletions arch/arm/boot/dts/zynq-zed-adv7511-ad7944.dts
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// SPDX-License-Identifier: GPL-2.0
/*
* Analog Devices AD7944
* https://www.analog.com/en/products/ad7944.html
*
* hdl_project: <pulsar_adc_pmdz/zed>
* board_revision: <>
*
* Copyright (C) 2023 Analog Devices Inc.
*/
/dts-v1/;

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>

#include "zynq-zed.dtsi"
#include "zynq-zed-adv7511.dtsi"

/ {
vref: ad7944-internal-reference-regulator {
compatible = "regulator-fixed";
regulator-name = "AD7944 internal reference";
regulator-min-microvolt = <4096000>;
regulator-max-microvolt = <4096000>;
startup-delay-us = <220000>;
/* PDREF pin on AD7944 */
gpios= <&gpio0 86 GPIO_ACTIVE_LOW>;
};
};

&fpga_axi {
adc_trigger: pwm@44b00000 {
compatible = "adi,axi-pwmgen";
reg = <0x44b00000 0x1000>;
label = "adc_conversion_trigger";
#pwm-cells = <2>;
clocks = <&spi_clk>;
};

rx_dma: rx-dmac@44a30000 {
compatible = "adi,axi-dmac-1.00.a";
reg = <0x44a30000 0x1000>;
#dma-cells = <1>;
interrupts = <0 57 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clkc 17>;

adi,channels {
#size-cells = <0>;
#address-cells = <1>;

dma-channel@0 {
reg = <0>;
adi,source-bus-width = <32>;
adi,source-bus-type = <1>;
adi,destination-bus-width = <64>;
adi,destination-bus-type = <0>;
};
};
};

spi_clk: clock-controller@44a70000 {
compatible = "adi,axi-clkgen-2.00.a";
reg = <0x44a70000 0x1000>;
#clock-cells = <0>;
clocks = <&clkc 15>, <&clkc 15>;
clock-names = "s_axi_aclk", "clkin1";
clock-output-names = "spi_clk";
};

axi_spi_engine_0: spi@44a00000 {
compatible = "adi,axi-spi-engine-1.00.a";
reg = <0x44a00000 0x1000>;
interrupt-parent = <&intc>;
interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clkc 15>, <&spi_clk>;
clock-names = "s_axi_aclk", "spi_clk";
num-cs = <1>;

#address-cells = <0x1>;
#size-cells = <0x0>;

ad7944: adc@0 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "adi,pulsar,ad7944";
reg = <0>;
spi-max-frequency = <80000000>;
turbo-gpios = <&gpio0 54 GPIO_ACTIVE_HIGH>;
clocks = <&spi_clk>;
clock-names = "ref_clk";
dmas = <&rx_dma 0>;
dma-names = "rx";
pwms = <&adc_trigger 0 0>;
pwm-names = "cnv";
vref-supply = <&vref>;
channel@0 {
reg = <0>;
diff-channels = <0 1>;
};
};
};
};
102 changes: 102 additions & 0 deletions arch/arm/boot/dts/zynq-zed-adv7511-ad7985.dts
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// SPDX-License-Identifier: GPL-2.0
/*
* Analog Devices AD7985
* https://www.analog.com/en/products/ad7985.html
*
* hdl_project: <pulsar_adc_pmdz/zed>
* board_revision: <>
*
* Copyright (C) 2023 Analog Devices Inc.
*/
/dts-v1/;

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>

#include "zynq-zed.dtsi"
#include "zynq-zed-adv7511.dtsi"

/ {
vref: ad7985-internal-reference-regulator {
compatible = "regulator-fixed";
regulator-name = "AD7985 internal reference";
regulator-min-microvolt = <4096000>;
regulator-max-microvolt = <4096000>;
startup-delay-us = <220000>;
/* PDREF pin on AD7985 */
gpios= <&gpio0 86 GPIO_ACTIVE_LOW>;
};
};

&fpga_axi {
adc_trigger: pwm@44b00000 {
compatible = "adi,axi-pwmgen";
reg = <0x44b00000 0x1000>;
label = "adc_conversion_trigger";
#pwm-cells = <2>;
clocks = <&spi_clk>;
};

rx_dma: rx-dmac@44a30000 {
compatible = "adi,axi-dmac-1.00.a";
reg = <0x44a30000 0x1000>;
#dma-cells = <1>;
interrupts = <0 57 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clkc 17>;

adi,channels {
#size-cells = <0>;
#address-cells = <1>;

dma-channel@0 {
reg = <0>;
adi,source-bus-width = <32>;
adi,source-bus-type = <1>;
adi,destination-bus-width = <64>;
adi,destination-bus-type = <0>;
};
};
};

spi_clk: clock-controller@44a70000 {
compatible = "adi,axi-clkgen-2.00.a";
reg = <0x44a70000 0x1000>;
#clock-cells = <0>;
clocks = <&clkc 15>, <&clkc 15>;
clock-names = "s_axi_aclk", "clkin1";
clock-output-names = "spi_clk";
};

axi_spi_engine_0: spi@44a00000 {
compatible = "adi,axi-spi-engine-1.00.a";
reg = <0x44a00000 0x1000>;
interrupt-parent = <&intc>;
interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clkc 15>, <&spi_clk>;
clock-names = "s_axi_aclk", "spi_clk";
num-cs = <1>;

#address-cells = <0x1>;
#size-cells = <0x0>;

ad7985: adc@0 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "adi,pulsar,ad7985";
reg = <0>;
spi-max-frequency = <80000000>;
turbo-gpios = <&gpio0 54 GPIO_ACTIVE_HIGH>;
clocks = <&spi_clk>;
clock-names = "ref_clk";
dmas = <&rx_dma 0>;
dma-names = "rx";
pwms = <&adc_trigger 0 0>;
pwm-names = "cnv";
vref-supply = <&vref>;
channel@0 {
reg = <0>;
diff-channels = <0 1>;
};
};
};
};
102 changes: 102 additions & 0 deletions arch/arm/boot/dts/zynq-zed-adv7511-ad7986.dts
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// SPDX-License-Identifier: GPL-2.0
/*
* Analog Devices AD7986
* https://www.analog.com/en/products/ad7986.html
*
* hdl_project: <pulsar_adc_pmdz/zed>
* board_revision: <>
*
* Copyright (C) 2023 Analog Devices Inc.
*/
/dts-v1/;

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>

#include "zynq-zed.dtsi"
#include "zynq-zed-adv7511.dtsi"

/ {
vref: ad7986-internal-reference-regulator {
compatible = "regulator-fixed";
regulator-name = "AD7986 internal reference";
regulator-min-microvolt = <4096000>;
regulator-max-microvolt = <4096000>;
startup-delay-us = <220000>;
/* PDREF pin on AD7986 */
gpios= <&gpio0 86 GPIO_ACTIVE_LOW>;
};
};

&fpga_axi {
adc_trigger: pwm@44b00000 {
compatible = "adi,axi-pwmgen";
reg = <0x44b00000 0x1000>;
label = "adc_conversion_trigger";
#pwm-cells = <2>;
clocks = <&spi_clk>;
};

rx_dma: rx-dmac@44a30000 {
compatible = "adi,axi-dmac-1.00.a";
reg = <0x44a30000 0x1000>;
#dma-cells = <1>;
interrupts = <0 57 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clkc 17>;

adi,channels {
#size-cells = <0>;
#address-cells = <1>;

dma-channel@0 {
reg = <0>;
adi,source-bus-width = <32>;
adi,source-bus-type = <1>;
adi,destination-bus-width = <64>;
adi,destination-bus-type = <0>;
};
};
};

spi_clk: clock-controller@44a70000 {
compatible = "adi,axi-clkgen-2.00.a";
reg = <0x44a70000 0x1000>;
#clock-cells = <0>;
clocks = <&clkc 15>, <&clkc 15>;
clock-names = "s_axi_aclk", "clkin1";
clock-output-names = "spi_clk";
};

axi_spi_engine_0: spi@44a00000 {
compatible = "adi,axi-spi-engine-1.00.a";
reg = <0x44a00000 0x1000>;
interrupt-parent = <&intc>;
interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&clkc 15>, <&spi_clk>;
clock-names = "s_axi_aclk", "spi_clk";
num-cs = <1>;

#address-cells = <0x1>;
#size-cells = <0x0>;

ad7986: adc@0 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "adi,pulsar,ad7986";
reg = <0>;
spi-max-frequency = <80000000>;
turbo-gpios = <&gpio0 54 GPIO_ACTIVE_HIGH>;
clocks = <&spi_clk>;
clock-names = "ref_clk";
dmas = <&rx_dma 0>;
dma-names = "rx";
pwms = <&adc_trigger 0 0>;
pwm-names = "cnv";
vref-supply = <&vref>;
channel@0 {
reg = <0>;
diff-channels = <0 1>;
};
};
};
};

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