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Remove LTS workaround (triton-lang#1595)
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The workarounds were added in
intel/intel-xpu-backend-for-triton#1275 and
intel/intel-xpu-backend-for-triton#1337.
All huggingface training float32 models pass with the LTS workaround
removed:
https://github.com/intel/intel-xpu-backend-for-triton/actions/runs/9865658421

Signed-off-by: Whitney Tsang <[email protected]>
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whitneywhtsang authored Jul 10, 2024
1 parent c6394b4 commit 03efe15
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Showing 2 changed files with 1 addition and 7 deletions.
4 changes: 0 additions & 4 deletions third_party/intel/lib/TritonIntelGPUToLLVM/TargetInfo.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -88,10 +88,6 @@ bool TargetInfo::warpReduce(RewriterBase &rewriter, Location loc,
SmallVector<Value> &acc, triton::ReduceOp op,
unsigned numLaneToReduce,
unsigned interleave) const {
const bool isLTS =
op->getParentOfType<ModuleOp>()->hasAttr("triton_gpu.is_lts");
if (isLTS)
return false;
// No horizontal reduce required.
if (numLaneToReduce == 1)
return false;
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Original file line number Diff line number Diff line change
Expand Up @@ -978,13 +978,11 @@ void LayoutRematerialization::rewriteSlice(SetVector<Value> &slice,
SetVector<Operation *> opsToRewrite;
// Keep track of yield operands that need to be duplicated.
DenseMap<Operation *, SmallVector<int>> yieldOperandsMap;
bool isLTS =
convertOp->getParentOfType<ModuleOp>()->hasAttr("triton_gpu.is_lts");
for (Value v : slice) {
auto layoutIt = layout.find(v);
assert(layoutIt != layout.end());
// If we already have a remat value for this value, use it.
if (!isLTS && hasRematValue(v, layoutIt->second)) {
if (hasRematValue(v, layoutIt->second)) {
mapping.map(v, getRematValue(v, layoutIt->second));
continue;
}
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