Packet switch example

[ngdymx]

Packet Switch Example

A simple design that shows how to use the packet switch feature of the AIE. It uses two cores, one to multiply and one to add two vectors together. The dataflow diagram is shown below:

There are three data paths in the design:

1. Data path from the shim tile to the memory tile. It is assigned with two possible packet IDs: 0 and 1.
2. Data path from the memory tile to the add compute tile (CT0). It is assigned with packet ID: 0
3. Data path from the memory tile to the multiply compute tile (CT1). It is assigned with packet ID: 1

The initial packet ID is generated by the shim tile (runtime_sequence part) and the packet ID is passed to the memory tile. The packet id is kept in the memory tile therefore the total packet length is increased by 4 bytes. Then the packet is read out from the memory tile the AIE automatically uses the first 4 bytes as the packet ID. Therefore, the packet ID initiated by the shim tile is used again to determine where the packet should be sent (CT0 or CT1). Finally, the processed data is sent back to the host for verification.

During the compilation, only one xclbin is generated and is shared by both add and multiply operations. Two instruction files are generated with respect to the add and multiply configurations in the shim tile.

[fifield]

This example needs a lit script so that it runs in the automated testing. See the other programming examples for example .lit scripts.

[keryell]

Cool!

[keryell]

Is Alfred an AMD copyright lawyer? 🤔

[keryell]

No need to repeat the common lines in the if blocks.

[keryell]

No need for macros

Suggested change

	#define IN_DATATYPE int8_t
	#define OUT_DATATYPE int8_t
	using IN_DATATYPE = int8_t;
	using OUT_DATATYPE = int8_t;

[fifield]

Thanks for making the I requested. The dates on the copyrights are perhaps a bit off, unless the files were copied from 2023 :)

[jgmelber]

@AndraBisca would it be possible to assist in upgrading their example from MLIR to the IRON Python API?