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[XDP] Support same tile graph/port latency #8798

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Mar 3, 2025
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108 changes: 104 additions & 4 deletions src/runtime_src/xdp/profile/database/static_info/aie_constructs.h
Original file line number Diff line number Diff line change
Expand Up @@ -24,6 +24,7 @@
#include <vector>
#include "xdp/profile/device/tracedefs.h"
#include <iostream>
#include <sstream>

namespace xdp::aie {
struct aiecompiler_options
Expand Down Expand Up @@ -86,6 +87,33 @@ namespace xdp {
if (row != tile.row) return row < tile.row;
return subtype < tile.subtype;
}

// Function to get the first stream_id
uint8_t getFirstStreamId() const {
return stream_ids.empty() ? 0 : stream_ids[0];
}

// Function to get the first is_master value
uint8_t getFirstIsMaster() const {
return is_master_vec.empty() ? 0 : is_master_vec[0];
}

// For debugging function to print tile_type all fields stream_ids, is_master_vec using stringstream
friend std::ostream& operator<<(std::ostream& os, const tile_type& tile) {
std::stringstream ss;
ss << "Tile: " << +tile.col << "," << +tile.row << " Subtype: " << +tile.subtype;
ss << " Stream IDs: ";
for (auto id : tile.stream_ids) {
ss << +id << " ";
}
ss << " Master: ";
for (auto master : tile.is_master_vec) {
ss << +master << " ";
}
os << ss.str();
return os;
}

};

struct compareTileByLoc {
Expand Down Expand Up @@ -155,11 +183,12 @@ namespace xdp {
double clockFreqMhz;
std::string module;
std::string name;
uint8_t streamId;

AIECounter(uint32_t i, uint8_t col, uint8_t r, uint8_t num,
uint16_t start, uint16_t end, uint8_t reset,
uint64_t load, double freq, const std::string& mod,
const std::string& aieName)
const std::string& aieName, uint8_t id=0)
: id(i)
, column(col)
, row(r)
Expand All @@ -171,6 +200,7 @@ namespace xdp {
, clockFreqMhz(freq)
, module(mod)
, name(aieName)
, streamId(id)
{}
};

Expand Down Expand Up @@ -343,6 +373,58 @@ namespace xdp {
aie_cfg_tile(uint32_t c, uint32_t r, module_type t) : column(c), row(r), type(t) {}
};

// Flattened key structure for tile_type or graph:port pair
struct tileKey {
uint8_t row;
uint8_t col;
uint8_t stream_id;
uint8_t is_master;
uint64_t itr_mem_addr;
bool active_core;
bool active_memory;
bool is_trigger;
io_type subtype;

bool operator<(const tileKey& other) const {
return std::tie(row, col, stream_id, is_master, itr_mem_addr, active_core,
active_memory, is_trigger, subtype) <
std::tie(other.row, other.col, other.stream_id, other.is_master,
other.itr_mem_addr, other.active_core, other.active_memory,
other.is_trigger, other.subtype);
}

bool operator==(const tileKey& other) const {
return (row == other.row) && (col == other.col) &&
(stream_id == other.stream_id) && (is_master == other.is_master) &&
(itr_mem_addr == other.itr_mem_addr) && (active_core == other.active_core) &&
(active_memory == other.active_memory) && (is_trigger == other.is_trigger) &&
(subtype == other.subtype);
}

// Debug method to print the tileKey
friend std::ostream& operator<<(std::ostream& os, const tileKey& key) {
os << "TileKey: (" << +key.col << ", " << +key.row << ", " << +key.stream_id << ", " << +key.is_master
<< ", " << +key.itr_mem_addr << ", " << key.active_core << ", " << key.active_memory << ", " << key.is_trigger
<< ", " << (int)key.subtype << ")";
return os;
}
};

// Function to create a tileKey from a tile_type
inline tileKey create_tileKey(const tile_type& tile) {
return tileKey{
tile.row,
tile.col,
tile.getFirstStreamId(),
tile.getFirstIsMaster(),
tile.itr_mem_addr,
tile.active_core,
tile.active_memory,
tile.is_trigger,
tile.subtype
};
}

struct GraphPortPair {
std::string srcGraphName;
std::string srcGraphPort;
Expand All @@ -365,15 +447,13 @@ namespace xdp {
std::string metricSet;
uint32_t tranx_no;
bool isSource;
uint8_t portId;
GraphPortPair graphPortPair;

LatencyConfig() = default;
LatencyConfig(tile_type& s, tile_type& d, std::string m, uint32_t t, bool i,
std::string g1, std::string p1, std::string g2, std::string p2) :
src(s), dest(d), metricSet(m), tranx_no(t), isSource(i),
graphPortPair(g1, p1, g2, p2) {}
void updatePortId(uint8_t& id) { portId=id; }
};

struct LatencyCache
Expand All @@ -391,7 +471,7 @@ namespace xdp {
using tile_vec = std::vector<std::map<tile_type, std::string>>;
using tile_channel = std::map<tile_type, uint8_t>;
using tile_bytes = std::map<tile_type, uint32_t>;
using tile_latencyMap = std::map<tile_type, LatencyConfig>;
using tile_latencyMap = std::map<tileKey, LatencyConfig>;

tile_vec configMetrics;
tile_channel configChannel0;
Expand All @@ -409,6 +489,26 @@ namespace xdp {
bytesTransferConfigMap(byteMap), latencyConfigMap(latencyMap) {}
};

// Structure to hold the graph/port pair for latency
struct latency_payload {
uint8_t col1;
uint8_t row1;
uint8_t portID1;
uint8_t col2;
uint8_t row2;
uint8_t portID2;

// print using << operator
friend std::ostream& operator<<(std::ostream& os, const latency_payload& payload) {
os << "col1: " << +payload.col1 << ", row1: " << +payload.row1
<< ", portID1: " << +payload.portID1 << ", col2: " << +payload.col2
<< ", row2: " << +payload.row2 << ", portID2: " << +payload.portID2;
return os;
}
};



} // end namespace xdp

#endif
Original file line number Diff line number Diff line change
Expand Up @@ -326,14 +326,14 @@ namespace xdp {
uint8_t num, uint16_t start, uint16_t end,
uint8_t reset, uint64_t load, double freq,
const std::string& mod,
const std::string& aieName)
const std::string& aieName, uint8_t streamId)
{
ConfigInfo* config = currentConfig() ;
if (!config || config->currentXclbins.empty())
return ;

config->addAIECounter(i, col, row, num, start, end,
reset, load, freq, mod, aieName) ;
reset, load, freq, mod, aieName, streamId) ;
}

void DeviceInfo::addAIECounterResources(uint32_t numCounters,
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -144,7 +144,7 @@ namespace xdp {
void addAIECounter(uint32_t i, uint8_t col, uint8_t row, uint8_t num,
uint16_t start, uint16_t end, uint8_t reset,
uint64_t load, double freq, const std::string& mod,
const std::string& aieName) ;
const std::string& aieName, uint8_t streamId=0) ;
XDP_CORE_EXPORT
void addAIECounterResources(uint32_t numCounters, uint32_t numTiles,
uint8_t moduleType) ;
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -573,14 +573,15 @@ namespace xdp {
uint8_t num, uint16_t start, uint16_t end,
uint8_t reset, uint64_t load, double freq,
const std::string& mod,
const std::string& aieName)
const std::string& aieName, uint8_t streamId)
{
for (auto xclbin : currentXclbins)
{
if (xclbin->aie.valid)
{
xclbin->aie.aieList.push_back(new AIECounter(i, col, r, num, start, end,
reset, load, freq, mod, aieName)) ;
reset, load, freq, mod,
aieName,streamId)) ;
return ;
}
}
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -247,7 +247,7 @@ namespace xdp {
uint8_t num, uint16_t start, uint16_t end,
uint8_t reset, uint64_t load, double freq,
const std::string& mod,
const std::string& aieName) ;
const std::string& aieName, uint8_t streamId=0) ;
void addAIECounterResources(uint32_t numCounters,
uint32_t numTiles,
uint8_t moduleType) ;
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -1075,14 +1075,14 @@ namespace xdp {
uint16_t start, uint16_t end,
uint8_t reset, uint64_t load,
double freq, const std::string& mod,
const std::string& aieName)
const std::string& aieName, uint8_t streamId)
{
std::lock_guard<std::mutex> lock(deviceLock) ;

if (deviceInfo.find(deviceId) == deviceInfo.end())
return ;
deviceInfo[deviceId]->addAIECounter(i, col, row, num, start, end, reset,
load, freq, mod, aieName) ;
load, freq, mod, aieName, streamId) ;
}

void VPStaticDatabase::addAIECounterResources(uint64_t deviceId,
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -331,7 +331,7 @@ namespace xdp {
uint8_t row, uint8_t num, uint16_t start,
uint16_t end, uint8_t reset, uint64_t load,
double freq, const std::string& mod,
const std::string& aieName) ;
const std::string& aieName, uint8_t streamId=0) ;
XDP_CORE_EXPORT void addAIECounterResources(uint64_t deviceId,
uint32_t numCounters,
uint32_t numTiles,
Expand Down
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