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Merge pull request #28 from dhil/wasmfx-merge
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Merge with WebAssembly/spec and WebAssembly/gc
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dhil authored Feb 15, 2024
2 parents ee9cbe7 + a33a6a0 commit 0af205c
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Showing 6 changed files with 8 additions and 7 deletions.
4 changes: 2 additions & 2 deletions document/core/appendix/embedding.rst
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Expand Up @@ -674,7 +674,7 @@ Matching

.. math::
\begin{array}{lclll}
\F{match\_reftype}(t_1, t_2) &=& \TRUE && (\iff \vdashvaltypematch t_1 \matchesvaltype t_2) \\
\F{match\_reftype}(t_1, t_2) &=& \TRUE && (\iff {} \vdashvaltypematch t_1 \matchesvaltype t_2) \\
\F{match\_reftype}(t_1, t_2) &=& \FALSE && (\otherwise) \\
\end{array}
Expand All @@ -690,6 +690,6 @@ Matching

.. math::
\begin{array}{lclll}
\F{match\_externtype}(\X{et}_1, \X{et}_2) &=& \TRUE && (\iff \vdashexterntypematch \X{et}_1 \matchesexterntype \X{et}_2) \\
\F{match\_externtype}(\X{et}_1, \X{et}_2) &=& \TRUE && (\iff {} \vdashexterntypematch \X{et}_1 \matchesexterntype \X{et}_2) \\
\F{match\_externtype}(\X{et}_1, \X{et}_2) &=& \FALSE && (\otherwise) \\
\end{array}
2 changes: 1 addition & 1 deletion document/core/appendix/index-instructions.py
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Expand Up @@ -341,7 +341,7 @@ def Instruction(name, opcode, type=None, validation=None, execution=None, operat
Instruction(r'\ARRAYINITELEM~x~y', r'\hex{FB}~\hex{13}', r'[(\REF~\NULL~x)~\I32~\I32~\I32] \to []', r'valid-array.init_elem', r'exec-array.init_elem'),
Instruction(r'\REFTEST~(\REF~t)', r'\hex{FB}~\hex{14}', r"[(\REF~t')] \to [\I32]", r'valid-ref.test', r'exec-ref.test'),
Instruction(r'\REFTEST~(\REF~\NULL~t)', r'\hex{FB}~\hex{15}', r"[(REF~\NULL~t')] \to [\I32]", r'valid-ref.test', r'exec-ref.test'),
Instruction(r'\REFCAST~(\REF~t)', r'\hex{FB}~\hex{16}', r"[(\REF~t')] \to [(\REF~t)]", r'valid-ref.test', r'exec-ref.test'),
Instruction(r'\REFCAST~(\REF~t)', r'\hex{FB}~\hex{16}', r"[(\REF~t')] \to [(\REF~t)]", r'valid-ref.cast', r'exec-ref.cast'),
Instruction(r'\REFCAST~(\REF~\NULL~t)', r'\hex{FB}~\hex{17}', r"[(\REF~\NULL~t')] \to [(\REF~\NULL~t)]", r'valid-ref.cast', r'exec-ref.cast'),
Instruction(r'\BRONCAST~t_1~t_2', r'\hex{FB}~\hex{18}', r'[t_1] \to [t_1\reftypediff t_2]', r'valid-br_on_cast', r'exec-br_on_cast'),
Instruction(r'\BRONCASTFAIL~t_1~t_2', r'\hex{FB}~\hex{19}', r'[t_1] \to [t_2]', r'valid-br_on_cast_fail', r'exec-br_on_cast_fail'),
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2 changes: 1 addition & 1 deletion document/core/index.bs
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Expand Up @@ -6,7 +6,7 @@ Status: ED
Level: 2
TR: https://www.w3.org/TR/wasm-core-2/
ED: https://webassembly.github.io/spec/core/bikeshed/
Editor: Andreas Rossberg (Dfinity Stiftung)
Editor: Andreas Rossberg
Repository: WebAssembly/spec
Markup Shorthands: css no, markdown no, algorithm no, idl no
Abstract: This document describes release 2.0 of the core WebAssembly standard, a safe, portable, low-level code format designed for efficient execution and compact representation.
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1 change: 0 additions & 1 deletion document/core/syntax/types.rst
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Expand Up @@ -325,7 +325,6 @@ Recursive Types

*Recursive types* denote a group of mutually recursive :ref:`composite types <syntax-comptype>`, each of which can optionally declare a list of :ref:`type indices <syntax-typeidx>` of supertypes that it :ref:`matches <match-comptype>`.
Each type can also be declared *final*, preventing further subtyping.
.

.. math::
\begin{array}{llrl}
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2 changes: 1 addition & 1 deletion document/core/util/katex
Submodule katex updated 279 files
4 changes: 3 additions & 1 deletion document/core/util/mathjax2katex.py
Original file line number Diff line number Diff line change
Expand Up @@ -2,6 +2,7 @@
# -*- coding: latin-1 -*-

import queue
import multiprocessing
import os
import re
import shelve
Expand Down Expand Up @@ -229,7 +230,8 @@ def Worker():
sys.stderr.write('.')

q = queue.Queue()
for i in range(len(os.sched_getaffinity(0))):
for i in range(len(os.sched_getaffinity(0)) if "sched_getaffinity" in dir(os)
else multiprocessing.cpu_count()):
t = threading.Thread(target=Worker)
t.daemon = True
t.start()
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