Implementing ARM processor in verilog for the computer architecture laboratory course at University of Tehran.
- ARM Processor Implementation (ARM-1,..., ARM-4)
- Forwarding Unit (ARM-5)
- SRAM (ARM-6)
- Cache Memory (ARM-7)
-
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ARM processor pipeline implementation. Featuring hazard unit, forwarding unit, SRAM & cache memory.
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Shahriar-0/Computer-Architecture-Lab-Experiments-F2023
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ARM processor pipeline implementation. Featuring hazard unit, forwarding unit, SRAM & cache memory.