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[CIR] Fix vector issues from latest rebase
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bcardosolopes committed Jan 29, 2025
1 parent a310ae0 commit d329c96
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Showing 11 changed files with 67 additions and 55 deletions.
9 changes: 9 additions & 0 deletions clang/lib/CIR/CodeGen/ABIInfo.h
Original file line number Diff line number Diff line change
Expand Up @@ -10,6 +10,8 @@
#define LLVM_CLANG_LIB_CIR_ABIINFO_H

#include "clang/AST/Type.h"
#include "clang/Basic/LangOptions.h"
#include "clang/CIR/Dialect/IR/CIRDialect.h"

namespace clang::CIRGen {

Expand Down Expand Up @@ -39,6 +41,13 @@ class ABIInfo {
// Implement the Type::IsPromotableIntegerType for ABI specific needs. The
// only difference is that this consideres bit-precise integer types as well.
bool isPromotableIntegerTypeForABI(clang::QualType Ty) const;

/// Returns the optimal vector memory type based on the given vector type. For
/// example, on certain targets, a vector with 3 elements might be promoted to
/// one with 4 elements to improve performance.
virtual cir::VectorType
getOptimalVectorMemoryType(cir::VectorType T,
const clang::LangOptions &Opt) const;
};

} // namespace clang::CIRGen
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92 changes: 43 additions & 49 deletions clang/lib/CIR/CodeGen/CIRGenExpr.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -173,9 +173,9 @@ static Address emitPointerWithAlignment(const Expr *expr,
llvm_unreachable("NYI");
}

auto ElemTy = cgf.convertTypeForMem(expr->getType()->getPointeeType());
auto eltTy = cgf.convertTypeForMem(expr->getType()->getPointeeType());
addr = cgf.getBuilder().createElementBitCast(
cgf.getLoc(expr->getSourceRange()), addr, ElemTy);
cgf.getLoc(expr->getSourceRange()), addr, eltTy);
if (CE->getCastKind() == CK_AddressSpaceConversion) {
assert(!cir::MissingFeatures::addressSpace());
llvm_unreachable("NYI");
Expand Down Expand Up @@ -616,6 +616,25 @@ void CIRGenFunction::emitStoreOfScalar(mlir::Value value, Address addr,
LValueBaseInfo baseInfo,
TBAAAccessInfo tbaaInfo, bool isInit,
bool isNontemporal) {
assert(!cir::MissingFeatures::threadLocal() && "NYI");

auto eltTy = addr.getElementType();
if (const auto *clangVecTy = ty->getAs<clang::VectorType>()) {
// Boolean vectors use `iN` as storage type.
if (clangVecTy->isExtVectorBoolType()) {
llvm_unreachable("isExtVectorBoolType NYI");
}

// Handle vectors of size 3 like size 4 for better performance.
const auto vTy = cast<cir::VectorType>(eltTy);
auto newVecTy =
CGM.getABIInfo().getOptimalVectorMemoryType(vTy, getLangOpts());

if (vTy != newVecTy) {
llvm_unreachable("NYI");
}
}

value = emitToMemory(value, ty);

LValue atomicLValue =
Expand All @@ -626,26 +645,6 @@ void CIRGenFunction::emitStoreOfScalar(mlir::Value value, Address addr,
return;
}

mlir::Type SrcTy = value.getType();
if (const auto *ClangVecTy = ty->getAs<clang::VectorType>()) {
// TODO(CIR): this has fallen out of date with codegen
llvm_unreachable("NYI: Special treatment of 3-element vector store");
// auto VecTy = dyn_cast<cir::VectorType>(SrcTy);
// if (!CGM.getCodeGenOpts().PreserveVec3Type &&
// ClangVecTy->getNumElements() == 3) {
// // Handle vec3 special.
// if (VecTy && VecTy.getSize() == 3) {
// // Our source is a vec3, do a shuffle vector to make it a vec4.
// value = builder.createVecShuffle(value.getLoc(), value,
// ArrayRef<int64_t>{0, 1, 2, -1});
// SrcTy = cir::VectorType::get(VecTy.getContext(), VecTy.getEltType(), 4);
// }
// if (addr.getElementType() != SrcTy) {
// addr = addr.withElementType(SrcTy);
// }
// }
}

// Update the alloca with more info on initialization.
assert(addr.getPointer() && "expected pointer to exist");
auto SrcAlloca =
Expand Down Expand Up @@ -2917,40 +2916,36 @@ mlir::Value CIRGenFunction::emitLoadOfScalar(Address addr, bool isVolatile,
LValueBaseInfo baseInfo,
TBAAAccessInfo tbaaInfo,
bool isNontemporal) {
// TODO(CIR): this has fallen out of sync with codegen
// Atomic operations have to be done on integral types
LValue atomicLValue =
LValue::makeAddr(addr, ty, getContext(), baseInfo, tbaaInfo);
if (ty->isAtomicType() || LValueIsSuitableForInlineAtomic(atomicLValue)) {
llvm_unreachable("NYI");
}
assert(!cir::MissingFeatures::threadLocal() && "NYI");
auto eltTy = addr.getElementType();

auto ElemTy = addr.getElementType();
if (const auto *clangVecTy = ty->getAs<clang::VectorType>()) {
// Boolean vectors use `iN` as storage type.
if (clangVecTy->isExtVectorBoolType()) {
llvm_unreachable("NYI");
}

if (const auto *ClangVecTy = ty->getAs<clang::VectorType>()) {
// Handle vectors of size 3 like size 4 for better performance.
const auto VTy = cast<cir::VectorType>(ElemTy);
const auto vTy = cast<cir::VectorType>(eltTy);
auto newVecTy =
CGM.getABIInfo().getOptimalVectorMemoryType(vTy, getLangOpts());

// TODO(CIR): this has fallen out of sync with codegen
llvm_unreachable("NYI: Special treatment of 3-element vector store");
// if (!CGM.getCodeGenOpts().PreserveVec3Type &&
// ClangVecTy->getNumElements() == 3) {
// auto loc = addr.getPointer().getLoc();
// auto vec4Ty = cir::VectorType::get(VTy.getContext(), VTy.getEltType(), 4);
// Address Cast = addr.withElementType(vec4Ty);
// // Now load value.
// mlir::Value V = builder.createLoad(loc, Cast);
if (vTy != newVecTy) {
llvm_unreachable("NYI");
}
}

// // Shuffle vector to get vec3.
// V = builder.createVecShuffle(loc, V, ArrayRef<int64_t>{0, 1, 2});
// return emitFromMemory(V, ty);
// }
LValue atomicLValue =
LValue::makeAddr(addr, ty, getContext(), baseInfo, tbaaInfo);
if (ty->isAtomicType() || LValueIsSuitableForInlineAtomic(atomicLValue)) {
llvm_unreachable("NYI");
}

// TODO(cir): modernize this with addr.withElementType(convertTypeForLoadStore
auto Ptr = addr.getPointer();
if (mlir::isa<cir::VoidType>(ElemTy)) {
ElemTy = cir::IntType::get(&getMLIRContext(), 8, true);
auto ElemPtrTy = cir::PointerType::get(&getMLIRContext(), ElemTy);
if (mlir::isa<cir::VoidType>(eltTy)) {
eltTy = cir::IntType::get(&getMLIRContext(), 8, true);
auto ElemPtrTy = cir::PointerType::get(&getMLIRContext(), eltTy);
Ptr = builder.create<cir::CastOp>(loc, ElemPtrTy, cir::CastKind::bitcast,
Ptr);
}
Expand All @@ -2962,7 +2957,6 @@ mlir::Value CIRGenFunction::emitLoadOfScalar(Address addr, bool isVolatile,
CGM.decorateOperationWithTBAA(loadOp, tbaaInfo);

assert(!cir::MissingFeatures::emitScalarRangeCheck() && "NYI");

return emitFromMemory(loadOp, ty);
}

Expand Down
4 changes: 4 additions & 0 deletions clang/lib/CIR/CodeGen/CIRGenModule.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -494,6 +494,10 @@ void CIRGenModule::setDSOLocal(CIRGlobalValueInterface GV) const {
GV.setDSOLocal(shouldAssumeDSOLocal(*this, GV));
}

const ABIInfo &CIRGenModule::getABIInfo() {
return getTargetCIRGenInfo().getABIInfo();
}

void CIRGenModule::emitGlobal(GlobalDecl GD) {
llvm::TimeTraceScope scope("build CIR Global", [&]() -> std::string {
auto *ND = dyn_cast<NamedDecl>(GD.getDecl());
Expand Down
2 changes: 1 addition & 1 deletion clang/lib/CIR/CodeGen/CIRGenModule.h
Original file line number Diff line number Diff line change
Expand Up @@ -471,8 +471,8 @@ class CIRGenModule : public CIRGenTypeCache {
/// NOTE: This should only be called for definitions.
void setCommonAttributes(GlobalDecl GD, mlir::Operation *GV);

// TODO: this obviously overlaps with
const TargetCIRGenInfo &getTargetCIRGenInfo();
const ABIInfo &getABIInfo();

/// Helpers to convert Clang's SourceLocation to a MLIR Location.
mlir::Location getLoc(clang::SourceLocation SLoc);
Expand Down
9 changes: 9 additions & 0 deletions clang/lib/CIR/CodeGen/TargetInfo.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -318,6 +318,15 @@ static bool classifyReturnType(const CIRGenCXXABI &CXXABI,

CIRGenCXXABI &ABIInfo::getCXXABI() const { return CGT.getCXXABI(); }

cir::VectorType
ABIInfo::getOptimalVectorMemoryType(cir::VectorType T,
const clang::LangOptions &Opt) const {
if (T.getSize() == 3 && !Opt.PreserveVec3Type) {
llvm_unreachable("NYI");
}
return T;
}

clang::ASTContext &ABIInfo::getContext() const { return CGT.getContext(); }

cir::ABIArgInfo X86_64ABIInfo::getIndirectResult(QualType Ty,
Expand Down
1 change: 1 addition & 0 deletions clang/lib/CIR/Dialect/Transforms/TargetLowering/ABIInfo.h
Original file line number Diff line number Diff line change
Expand Up @@ -27,6 +27,7 @@ class LowerTypes;

/// Target specific hooks for defining how a type should be passed or returned
/// from functions.
/// FIXME(cir): this needs to be merged with clang/lib/CIR/CodeGen/ABIInfo.h
class ABIInfo {
protected:
LowerTypes &LT;
Expand Down
1 change: 0 additions & 1 deletion clang/test/CIR/CodeGen/OpenCL/printf.cl
Original file line number Diff line number Diff line change
Expand Up @@ -14,7 +14,6 @@
// RUN: FileCheck -input-file=%t.30fp64.ll -check-prefixes=LLVM-FP64,LLVM-ALL %s
// RUN: %clang_cc1 -fclangir -no-enable-noundef-analysis -cl-std=CL3.0 -cl-ext=-__opencl_c_fp64,-cl_khr_fp64 -triple spirv64-unknown-unknown -disable-llvm-passes -emit-llvm -fno-clangir-call-conv-lowering -o %t.30nofp64.ll %s
// RUN: FileCheck -input-file=%t.30nofp64.ll -check-prefixes=LLVM-NOFP64,LLVM-ALL %s
// XFAIL: *

typedef __attribute__((ext_vector_type(2))) float float2;
typedef __attribute__((ext_vector_type(2))) half half2;
Expand Down
1 change: 0 additions & 1 deletion clang/test/CIR/CodeGen/builtins-elementwise.c
Original file line number Diff line number Diff line change
Expand Up @@ -3,7 +3,6 @@
// RUN: %clang_cc1 -triple aarch64-none-linux-android24 -fclangir \
// RUN: -emit-llvm %s -o %t.ll
// RUN: FileCheck --check-prefix=LLVM --input-file=%t.ll %s
// XFAIL: *

typedef int vint4 __attribute__((ext_vector_type(4)));
typedef float vfloat4 __attribute__((ext_vector_type(4)));
Expand Down
1 change: 0 additions & 1 deletion clang/test/CIR/CodeGen/vectype.cpp
Original file line number Diff line number Diff line change
@@ -1,5 +1,4 @@
// RUN: %clang_cc1 -std=c++17 -triple x86_64-unknown-linux-gnu -fclangir -emit-cir %s -o - | FileCheck %s
// XFAIL: *

typedef int vi4 __attribute__((vector_size(16)));
typedef double vd2 __attribute__((vector_size(16)));
Expand Down
1 change: 0 additions & 1 deletion clang/test/CIR/Lowering/ThroughMLIR/vectype.cpp
Original file line number Diff line number Diff line change
@@ -1,6 +1,5 @@
// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -fclangir -fno-clangir-direct-lowering -emit-mlir %s -o %t.mlir
// RUN: FileCheck --input-file=%t.mlir %s
// XFAIL: *

typedef int vi4 __attribute__((vector_size(16)));

Expand Down
1 change: 0 additions & 1 deletion clang/test/CIR/Lowering/vectype.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -2,7 +2,6 @@
// RUN: cir-opt %t.cir -cir-to-llvm -o %t.mlir
// RUN: %clang_cc1 -std=c++17 -triple x86_64-unknown-linux-gnu -fclangir -emit-llvm %s -o %t.ii
// RUN: FileCheck --input-file=%t.mlir %s
// XFAIL: *

typedef int vi4 __attribute__((vector_size(16)));
typedef double vd2 __attribute__((vector_size(16)));
Expand Down

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