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video_common: Add support for HF-SCDB in EDID parser
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Add support for parsing HF-SCDB in EDID. HF-SCDB has a payload that
contains the Sink Capability Data Structure (SCDS) and represents
n alternative way of including the SCDS in the sink E-EDID.

Signed-off-by: Rajesh Gugulothu <[email protected]>
Acked-by: Anil Kumar Chimbeti<[email protected]>
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@gugulot
gugulot authored and Siva Addepalli committed Aug 28, 2023
1 parent 5ad01a7 commit 3c7edff
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59 changes: 59 additions & 0 deletions XilinxProcessorIPLib/drivers/video_common/src/xvidc_cea861.h
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Original file line number Diff line number Diff line change
Expand Up @@ -80,6 +80,7 @@ enum xvidc_cea861_extended_tag_type_data_block {
XVIDC_CEA861_EXT_TAG_TYPE_ROOM_CONFIGURATION,
XVIDC_CEA861_EXT_TAG_TYPE_SPEAKER_LOCATION,
XVIDC_CEA861_EXT_TAG_TYPE_INFOFRAME = 32,
XVIDC_CEA861_EXT_TAG_TYPE_HDMI_FORUM_SINK_CAPABILITY = 121,
/* Can be extend to 255, refer table 46 cea data block tag codes cea-861-f */
};

Expand Down Expand Up @@ -518,4 +519,62 @@ struct _Pragma ("pack()") xvidc_cea861_hdmi_hf_vendor_specific_data_block {
u8 reserved[];
};

#if defined(__GNUC__)
struct __attribute__ (( packed )) xvidc_cea861_hdmi_hf_sink_capability_data_block {
#elif defined(__ICCARM__)
struct _Pragma ("pack()") xvidc_cea861_hdmi_hf_sink_capability_data_block {
#endif
struct xvidc_cea861_data_block_header header;
/* Extended Tag Code = 121 (0x79) */
u8 Extended_tag_code;
u8 reserved1[2];
/* PB1 */
u8 version;
/* PB2 */
u8 max_tmds_char_rate;
/* PB3 */
unsigned osd_disparity_3d : 1;
unsigned dual_view_3d : 1;
unsigned independent_view_3d : 1;
unsigned lte_340mcsc_scramble : 1;
unsigned ccbpci : 1;
unsigned cable_status : 1;
unsigned rr_capable : 1;
unsigned scdc_present : 1;
/* PB4 */
unsigned dc_30bit_yuv420 : 1;
unsigned dc_36bit_yuv420 : 1;
unsigned dc_48bit_yuv420 : 1;
unsigned uhd_vic : 1;
unsigned max_frl_rate : 4;
/* PB5 */
unsigned fapa_start_location : 1;
unsigned allm : 1;
unsigned fva : 1;
unsigned neg_mvrr : 1;
unsigned : 1;
unsigned m_delta : 1;
unsigned qms : 1;
unsigned fapa_end_extended : 1;
/* PB6 - PB7 */
unsigned vrr_min : 6;
unsigned vrr_max : 10;
/* PB8 */
unsigned dsc_10bpc : 1;
unsigned dsc_12bpc : 1;
unsigned dsc_16bpc : 1;
unsigned dsc_all_bpp : 1;
unsigned qms_tfr_min : 1;
unsigned dsc_native_420 : 1;
unsigned dsc_1p2 : 1;
/* PB9 */
unsigned dsc_maxslices : 4;
unsigned dsc_max_frl_rate : 4;
/* PB10*/
unsigned dsc_total_chunk_bytes : 6;
unsigned : 2;
/* PB11 - PB28 */
u8 reserved[18];
};

#endif
17 changes: 17 additions & 0 deletions XilinxProcessorIPLib/drivers/video_common/src/xvidc_edid_ext.h
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Original file line number Diff line number Diff line change
Expand Up @@ -663,6 +663,23 @@ typedef struct {
u8 SuppCeaVIC[32];
/*VESA Sink Preffered Timing Support*/
XV_VidC_TimingParam PreferedTiming[4];
XV_VidC_Supp Is3dOsdDisparitySupp;
XV_VidC_Supp IsDualViewSupp;
XV_VidC_Supp IsIndependentViewSupp;
XV_VidC_Supp IsLte340McscScamble;
XV_VidC_Supp IsCCBPCISupp;
XV_VidC_Supp IsCableAssemblyStatusSupp;
XV_VidC_Supp IsFapaStartLocationSupp;
XV_VidC_Supp IsAllmSupp;
XV_VidC_Supp IsfavSupp;
XV_VidC_Supp IsQmsVrrSupp;
XV_VidC_Supp IsDsc10bpcSupp;
XV_VidC_Supp IsDsc12bpcSupp;
XV_VidC_Supp IsDsc16bpcSupp;
XV_VidC_Supp IsFapaEndExtended;
XV_VidC_Supp IsDscNativeYCbCr420Supp;
XV_VidC_Supp IsVesaDsc12aSupp;
u8 DscTotalChunkBytes;
} XV_VidC_EdidCntrlParam;


Expand Down
201 changes: 201 additions & 0 deletions XilinxProcessorIPLib/drivers/video_common/src/xvidc_parse_edid.c
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Original file line number Diff line number Diff line change
Expand Up @@ -88,6 +88,12 @@ xvidc_disp_cea861_extended_data(
XV_VidC_EdidCntrlParam *EdidCtrlParam,
XV_VidC_Verbose VerboseEn);

static void
xvidc_disp_cea861_hf_sink_capability_data(
const struct xvidc_cea861_extended_data_block * const edb,
XV_VidC_EdidCntrlParam *EdidCtrlParam,
XV_VidC_Verbose VerboseEn);

static void
xvidc_disp_cea861_vendor_data(
const struct xvidc_cea861_vendor_specific_data_block * vsdb,
Expand Down Expand Up @@ -759,6 +765,12 @@ xvidc_disp_cea861_extended_data(
}
break;
#endif
case XVIDC_CEA861_EXT_TAG_TYPE_HDMI_FORUM_SINK_CAPABILITY:
if (VerboseEn) {
xil_printf(" HDMI Forum Sink Capability Data Block\r\n");
}
xvidc_disp_cea861_hf_sink_capability_data(edb, EdidCtrlParam, VerboseEn);
break;
case XVIDC_CEA861_EXT_TAG_TYPE_YCBCR420_VIDEO:
#if XVIDC_EDID_VERBOSITY > 1
if (VerboseEn) {
Expand Down Expand Up @@ -933,6 +945,195 @@ xvidc_disp_cea861_video_data(
}
#endif

/*****************************************************************************/
/**
*
* This function parse EDID on CEA 861 Vendor Specific Data
*
* @param data is a pointer to the EDID array.
* @param EdidCtrlParam is a pointer the EDID Control parameter
* @param VerboseEn is a pointer to the XV_HdmiTxSs core instance.
*
* @return None
*
* @note None.
*
******************************************************************************/
static void
xvidc_disp_cea861_hf_sink_capability_data(
const struct xvidc_cea861_extended_data_block * const edb,
XV_VidC_EdidCntrlParam *EdidCtrlParam,
XV_VidC_Verbose VerboseEn) {

/* During Verbosity 0, VerboseEn won't be used */
/* To avoid compilation warnings */
VerboseEn = VerboseEn;
const struct xvidc_cea861_hdmi_hf_sink_capability_data_block * const hdmi =
(struct xvidc_cea861_extended_data_block *) edb;

#if XVIDC_EDID_VERBOSITY > 0
if (VerboseEn) {
xil_printf("HF - Sink Capability Data block (SCDB)\r\n");
xil_printf("Cea Extended Tag: %d\r\n",edb->Extended_tag_code);
}
#endif

#if XVIDC_EDID_VERBOSITY > 0
if (VerboseEn) {
xil_printf(" Version.................. %d\r\n",hdmi->version);
}
#endif
if (hdmi->max_tmds_char_rate) {
#if XVIDC_EDID_VERBOSITY > 0
if (VerboseEn) {
xil_printf(" Maximum TMDS clock....... %uMHz\r\n",
hdmi->max_tmds_char_rate * 5);
}
#endif
EdidCtrlParam->MaxTmdsMhz = (hdmi->max_tmds_char_rate * 5);
} else {
#if XVIDC_EDID_VERBOSITY > 0
if (VerboseEn) {
xil_printf(" Max. Supp. TMDS clock (<=340MHz)\r\n");
}
#endif
}

EdidCtrlParam->Is3dOsdDisparitySupp = hdmi->osd_disparity_3d;
EdidCtrlParam->IsDualViewSupp = hdmi->dual_view_3d;
EdidCtrlParam->IsIndependentViewSupp = hdmi->independent_view_3d;
EdidCtrlParam->IsLte340McscScamble = hdmi->lte_340mcsc_scramble;
if(!hdmi->scdc_present) {
EdidCtrlParam->IsLte340McscScamble = 0;
}

EdidCtrlParam->IsCCBPCISupp = hdmi->ccbpci;
EdidCtrlParam->IsCableAssemblyStatusSupp = hdmi->cable_status;

EdidCtrlParam->IsSCDCReadRequestReady = hdmi->rr_capable;
EdidCtrlParam->IsSCDCPresent = hdmi->scdc_present;
EdidCtrlParam->IsYCbCr420dc30bppSupp = hdmi->dc_30bit_yuv420;
EdidCtrlParam->IsYCbCr420dc36bppSupp = hdmi->dc_36bit_yuv420;
EdidCtrlParam->IsYCbCr420dc48bppSupp = hdmi->dc_48bit_yuv420;

switch (hdmi->max_frl_rate) {
case XVIDC_MAXFRLRATE_NOT_SUPPORTED:
EdidCtrlParam->MaxFrlLanesSupp = 0;
EdidCtrlParam->MaxFrlLineRateSupp = 0;
break;

case XVIDC_MAXFRLRATE_3X3GBITSPS:
EdidCtrlParam->MaxFrlLanesSupp = 3;
EdidCtrlParam->MaxFrlLineRateSupp = 3;
break;

case XVIDC_MAXFRLRATE_3X6GBITSPS:
EdidCtrlParam->MaxFrlLanesSupp = 3;
EdidCtrlParam->MaxFrlLineRateSupp = 6;
break;

case XVIDC_MAXFRLRATE_4X6GBITSPS:
EdidCtrlParam->MaxFrlLanesSupp = 4;
EdidCtrlParam->MaxFrlLineRateSupp = 6;
break;

case XVIDC_MAXFRLRATE_4X8GBITSPS:
EdidCtrlParam->MaxFrlLanesSupp = 4;
EdidCtrlParam->MaxFrlLineRateSupp = 8;
break;

case XVIDC_MAXFRLRATE_4X10GBITSPS:
EdidCtrlParam->MaxFrlLanesSupp = 4;
EdidCtrlParam->MaxFrlLineRateSupp = 10;
break;

case XVIDC_MAXFRLRATE_4X12GBITSPS:
EdidCtrlParam->MaxFrlLanesSupp = 4;
EdidCtrlParam->MaxFrlLineRateSupp = 12;
break;

default:
EdidCtrlParam->MaxFrlLanesSupp = 0;
EdidCtrlParam->MaxFrlLineRateSupp = 0;
break;
}

EdidCtrlParam->MaxFrlRateSupp = hdmi->max_frl_rate;

if (hdmi->header.length >= HDMI_VSDB_EXTENSION_FLAGS_OFFSET) {
#if XVIDC_EDID_VERBOSITY > 0
if (VerboseEn) {
#if XVIDC_EDID_VERBOSITY > 1
xil_printf(" RRC Capable Support...... %s\r\n",
hdmi->rr_capable ? "Yes" : "No");
xil_printf(" SCDC Present............. %s\r\n",
hdmi->scdc_present ? "Yes" : "No");
xil_printf(" HDMI1.4 Scramble Support. %s\r\n",
hdmi->lte_340mcsc_scramble ? "Yes" : "No");
#endif
xil_printf(" YUV 420 Deep.C. Support..\r\n");
xil_printf(" Supports 48bpp......... %s\r\n",
hdmi->dc_48bit_yuv420 ? "Yes" : "No");
xil_printf(" Supports 36bpp......... %s\r\n",
hdmi->dc_36bit_yuv420 ? "Yes" : "No");
xil_printf(" Supports 30bpp......... %s\r\n",
hdmi->dc_30bit_yuv420 ? "Yes" : "No");

xil_printf(" Supports 3D_OSD_Disparity......... %s\r\n",
hdmi->osd_disparity_3d ? "Yes" : "No");
xil_printf(" Supports Dual_Video......... %s\r\n",
hdmi->dual_view_3d ? "Yes" : "No");
xil_printf(" Supports Independent_view......... %s\r\n",
hdmi->independent_view_3d ? "Yes" : "No");
xil_printf(" Supports Independent_view......... %s\r\n",
hdmi->independent_view_3d ? "Yes" : "No");
xil_printf(" Supports CCBPCI......... %s\r\n",
hdmi->ccbpci ? "Yes" : "No");
xil_printf(" Supports cable_status......... %s\r\n",
hdmi->cable_status ? "Yes" : "No");

xil_printf(" Supports Auto Low-Latency Mode......... %s\r\n",
hdmi->allm ? "Yes" : "No");
xil_printf(" Supports Fast VActive........ %s\r\n",
hdmi->fva ? "Yes" : "No");
xil_printf(" Supports QMS-VRR........ %s\r\n",
hdmi->qms ? "Yes" : "No");

xil_printf(" Compressed Video Transport Support..\r\n");
xil_printf(" Supports DSC 10bpc........ %s\r\n",
hdmi->dsc_10bpc ? "Yes" : "No");
xil_printf(" Supports DSC 12bpc........ %s\r\n",
hdmi->dsc_12bpc ? "Yes" : "No");


xil_printf(" Max FRL Rate Support... %u\r\n",
EdidCtrlParam->MaxFrlRateSupp);
xil_printf(" FRL Lanes Support...... %u\r\n",
EdidCtrlParam->MaxFrlLanesSupp);
xil_printf(" Max FRL Line Rate Support. %u\r\n",
EdidCtrlParam->MaxFrlLineRateSupp);
}
#endif
EdidCtrlParam->IsFapaStartLocationSupp = hdmi->fapa_start_location;
EdidCtrlParam->IsAllmSupp = hdmi->allm;
EdidCtrlParam->IsfavSupp = hdmi->fva;
EdidCtrlParam->IsQmsVrrSupp = hdmi->qms;

EdidCtrlParam->IsDsc10bpcSupp = hdmi->dsc_10bpc;
EdidCtrlParam->IsDsc12bpcSupp = hdmi->dsc_12bpc;
EdidCtrlParam->IsDsc16bpcSupp = hdmi->dsc_16bpc;
EdidCtrlParam->IsFapaEndExtended = hdmi->fapa_end_extended;
EdidCtrlParam->IsDscNativeYCbCr420Supp = hdmi->dsc_native_420;
EdidCtrlParam->IsVesaDsc12aSupp = hdmi->dsc_1p2;
EdidCtrlParam->DscTotalChunkBytes = (1024 * (hdmi->dsc_total_chunk_bytes +1));
}
#if XVIDC_EDID_VERBOSITY > 0
if (VerboseEn) {
xil_printf("\r\n");
}
#endif
}

/*****************************************************************************/
/**
*
Expand Down

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