[GPU] Internal Convolution op and asymmetric quantization fusion pass (…

…openvinotoolkit#23144)

### Details:
- Added internal `Convolution` op with bias and zero-points semantics
which covers both grouped and non-grouped case
- Added internal `Placeholder` op which indicates that port has no input
- Added `{v1::Convolution, v1::GroupConvolution} ->
internal::Convolution` conversion pass.
 - Added fusion pass for convolution with asymmetric quantization
 - Added pass for broadcasting and alignment of quantization parameters
 - Removed `prepare_aymmetric_quantization` cldnn pass

src/plugins/intel_gpu/include/intel_gpu/op/convolution.hpp

@@ -0,0 +1,81 @@
+// Copyright (C) 2024 Intel Corporation
+// SPDX-License-Identifier: Apache-2.0
+//
+
+#pragma once
+
+#include "openvino/op/util/convolution_base.hpp"
+
+namespace ov {
+namespace intel_gpu {
+namespace op {
+
+// Common node for v1::Convolution and v1::GroupConvolution with few extensions
+//  - Relaxed type requirements
+//  - Bias support
+//  - Asymmetric quantization support
+class Convolution : public ov::op::util::ConvolutionFwdPropBase {
+public:
+    OPENVINO_OP("Convolution", "gpu_opset", ov::op::util::ConvolutionFwdPropBase);
+
+    Convolution() = default;
+
+    Convolution(const ov::Output<Node>& data_batch,
+                const ov::Output<Node>& filters,
+                const ov::Output<Node>& bias,
+                const ov::Strides& strides,
+                const ov::CoordinateDiff& pads_begin,
+                const ov::CoordinateDiff& pads_end,
+                const ov::Strides& dilations,
+                const int64_t& groups,
+                const ov::op::PadType& auto_pad,
+                const ov::element::Type& output_type);
+
+    Convolution(const ov::Output<Node>& data_batch,
+                const ov::Output<Node>& filters,
+                const ov::Output<Node>& bias,
+                const ov::Output<Node>& activations_zero_point,
+                const ov::Output<Node>& weights_zero_point,
+                const ov::Output<Node>& compensations,
+                const ov::Strides& strides,
+                const ov::CoordinateDiff& pads_begin,
+                const ov::CoordinateDiff& pads_end,
+                const ov::Strides& dilations,
+                const int64_t& groups,
+                const ov::op::PadType& auto_pad,
+                const ov::element::Type& output_type);
+
+
+    void validate_and_infer_types() override;
+    bool visit_attributes(AttributeVisitor& visitor) override;
+
+    std::shared_ptr<Node> clone_with_new_inputs(const OutputVector& new_args) const override;
+
+    bool has_groups() const;
+    int64_t get_groups() const;
+
+    bool is_asymmetric() const;
+
+    struct Args {
+        static constexpr const size_t INPUT = 0;
+        static constexpr const size_t WEIGHTS = 1;
+        static constexpr const size_t BIAS = 2;
+        static constexpr const size_t AZP = 3;
+        static constexpr const size_t WZP = 4;
+        static constexpr const size_t COMPENSATION = 5;
+    };
+
+protected:
+    int64_t m_groups = -1; // negative value means no groups
+    bool m_asymmetric = false;
+    ov::element::Type m_output_type = ov::element::undefined;
+};
+
+std::vector<ov::PartialShape> shape_infer(const Convolution* op,
+                                          const std::vector<ov::PartialShape>& input_shapes,
+                                          CoordinateDiff& pads_begin,
+                                          CoordinateDiff& pads_end);
+
+}   // namespace op
+}   // namespace intel_gpu
+}   // namespace ov

src/plugins/intel_gpu/include/intel_gpu/op/placeholder.hpp

@@ -0,0 +1,26 @@
+// Copyright (C) 2024 Intel Corporation
+// SPDX-License-Identifier: Apache-2.0
+//
+
+#pragma once
+
+#include "openvino/op/op.hpp"
+
+namespace ov {
+namespace intel_gpu {
+namespace op {
+
+class Placeholder : public ov::op::Op {
+public:
+    OPENVINO_OP("Placeholder", "gpu_opset");
+
+    Placeholder();
+
+    bool visit_attributes(ov::AttributeVisitor& visitor) override;
+    void validate_and_infer_types() override;
+    std::shared_ptr<Node> clone_with_new_inputs(const ov::OutputVector& new_args) const override;
+};
+
+}   // namespace op
+}   // namespace intel_gpu
+}   // namespace ov

src/plugins/intel_gpu/include/intel_gpu/plugin/primitives_list.hpp

@@ -97,7 +97,7 @@ REGISTER_FACTORY(v1, BatchToSpace);
 // REGISTER_FACTORY(v1, BinaryConvolution); Supported via BinaryConvolution->Convolution conversion
 REGISTER_FACTORY(v1, Broadcast);
 REGISTER_FACTORY(v1, ConvertLike);
-REGISTER_FACTORY(v1, Convolution);
+// REGISTER_FACTORY(v1, Convolution); Supported via Convolution->internal::Convolution conversion
 REGISTER_FACTORY(v1, ConvolutionBackpropData);
 REGISTER_FACTORY(v1, DeformableConvolution);
 REGISTER_FACTORY(v1, DeformablePSROIPooling);
@@ -108,7 +108,7 @@ REGISTER_FACTORY(v1, Gather);
 REGISTER_FACTORY(v1, GatherTree);
 REGISTER_FACTORY(v1, Greater);
 REGISTER_FACTORY(v1, GreaterEqual);
-REGISTER_FACTORY(v1, GroupConvolution);
+// REGISTER_FACTORY(v1, GroupConvolution);  Supported via GroupConvolution->internal::Convolution conversion
 REGISTER_FACTORY(v1, GroupConvolutionBackpropData);
 REGISTER_FACTORY(v1, Less);
 REGISTER_FACTORY(v1, LessEqual);
@@ -278,3 +278,5 @@ REGISTER_FACTORY(internal, ReadValue);
 REGISTER_FACTORY(internal, Gemm);
 REGISTER_FACTORY(internal, SwiGLU);
 REGISTER_FACTORY(internal, IndirectGemm);
+REGISTER_FACTORY(internal, Convolution);
+REGISTER_FACTORY(internal, Placeholder);