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securechip/optiga: limit unlock to 10 failed attempts
The MCU limits unlock attempts to 10 before resetting. The ATECC securechip further limits the total unlock attempts (successful or failed) to a large monotonic counter, ~730k. In the Optiga we have the same, but with a lower limit due to the chip spec (~600k). This commit additionally adds a small counter that limits the unlocks to 10 failed attempts, same as the MCU. When the counte reaches the limit, no further attempts are possible until reset. When the correct password is entered, the small counter resets to 0. To achieve this, three new slots are added that specifically deal with this small counter. The PASSWORD_SECRET is a key included in the password key stretch, so overwriting/resetting invalidates the password and makes it impossible to unlock or brute force. The PASSWORD_SECRET is initialized to a random value when a password is set. It also authorizes changing the PASSWORD object and the PASSWORD_COUNTER small counter in order to reset it. It can only be read when authorized using the PASSWORD object, i.e. when entering the correct password, which allows us to reset the counter and also to use the PASSWORD_SECRET in the password stretching. securechip_init_new_password and securechip_reset_keys are added to the securechip interface to set the new password and to reset all keys involved in the key stretch and the password. When the small counter threshold is reached, further attempts always fail until reset. The MCU also keeps track of the 10 attempts and resets after 10 failed ones, so the securechip error condition is never exercised, similar to the large lifetime counter.
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