drivers/perf: apple_m1: Add mapping for branch counters

Apple released their performance counters definition in
/usr/share/kpep/a14.plist file on macOS. The file lists the branch
counters (number of branch instructions and branch mispredictions):

"INST_BRANCH" => {
  "counters_mask" => 224
  "description" => "Retired branch instructions including calls and
returns"
  "number" => 141
}

and

"BRANCH_MISPRED_NONSPEC" => {
  "counters_mask" => 224
  "description" => "Retired branch instructions including calls and
returns that mispredicted"
  "number" => 203
}

In this commit, the performance counters numbered 0x8d(141) and
0xcb(203) are renamed to their actual names and the mappings from
generalized performence event types in `enum perf_hw_id` to hardware
performance counters are added respectively.

Signed-off-by: Jiajie Chen <[email protected]>

drivers/perf/apple_m1_cpu_pmu.c

@@ -50,7 +50,7 @@ enum m1_pmu_events {
 	M1_PMU_PERFCTR_UNKNOWN_01	= 0x01,
 	M1_PMU_PERFCTR_CPU_CYCLES	= 0x02,
 	M1_PMU_PERFCTR_INSTRUCTIONS	= 0x8c,
-	M1_PMU_PERFCTR_UNKNOWN_8d	= 0x8d,
+	M1_PMU_PERFCTR_BRANCH_INSTS	= 0x8d,
 	M1_PMU_PERFCTR_UNKNOWN_8e	= 0x8e,
 	M1_PMU_PERFCTR_UNKNOWN_8f	= 0x8f,
 	M1_PMU_PERFCTR_UNKNOWN_90	= 0x90,
@@ -73,7 +73,7 @@ enum m1_pmu_events {
 	M1_PMU_PERFCTR_UNKNOWN_c6	= 0xc6,
 	M1_PMU_PERFCTR_UNKNOWN_c8	= 0xc8,
 	M1_PMU_PERFCTR_UNKNOWN_ca	= 0xca,
-	M1_PMU_PERFCTR_UNKNOWN_cb	= 0xcb,
+	M1_PMU_PERFCTR_BRANCH_MISSES	= 0xcb,
 	M1_PMU_PERFCTR_UNKNOWN_f5	= 0xf5,
 	M1_PMU_PERFCTR_UNKNOWN_f6	= 0xf6,
 	M1_PMU_PERFCTR_UNKNOWN_f7	= 0xf7,
@@ -100,7 +100,7 @@ static const u16 m1_pmu_event_affinity[M1_PMU_PERFCTR_LAST + 1] = {
 	[M1_PMU_PERFCTR_UNKNOWN_01]	= BIT(7),
 	[M1_PMU_PERFCTR_CPU_CYCLES]	= ANY_BUT_0_1 | BIT(0),
 	[M1_PMU_PERFCTR_INSTRUCTIONS]	= BIT(7) | BIT(1),
-	[M1_PMU_PERFCTR_UNKNOWN_8d]	= ONLY_5_6_7,
+	[M1_PMU_PERFCTR_BRANCH_INSTS]	= ONLY_5_6_7,
 	[M1_PMU_PERFCTR_UNKNOWN_8e]	= ONLY_5_6_7,
 	[M1_PMU_PERFCTR_UNKNOWN_8f]	= ONLY_5_6_7,
 	[M1_PMU_PERFCTR_UNKNOWN_90]	= ONLY_5_6_7,
@@ -123,7 +123,7 @@ static const u16 m1_pmu_event_affinity[M1_PMU_PERFCTR_LAST + 1] = {
 	[M1_PMU_PERFCTR_UNKNOWN_c6]	= ONLY_5_6_7,
 	[M1_PMU_PERFCTR_UNKNOWN_c8]	= ONLY_5_6_7,
 	[M1_PMU_PERFCTR_UNKNOWN_ca]	= ONLY_5_6_7,
-	[M1_PMU_PERFCTR_UNKNOWN_cb]	= ONLY_5_6_7,
+	[M1_PMU_PERFCTR_BRANCH_MISSES]	= ONLY_5_6_7,
 	[M1_PMU_PERFCTR_UNKNOWN_f5]	= ONLY_2_4_6,
 	[M1_PMU_PERFCTR_UNKNOWN_f6]	= ONLY_2_4_6,
 	[M1_PMU_PERFCTR_UNKNOWN_f7]	= ONLY_2_4_6,
@@ -133,8 +133,10 @@ static const u16 m1_pmu_event_affinity[M1_PMU_PERFCTR_LAST + 1] = {
 
 static const unsigned m1_pmu_perf_map[PERF_COUNT_HW_MAX] = {
 	PERF_MAP_ALL_UNSUPPORTED,
-	[PERF_COUNT_HW_CPU_CYCLES]	= M1_PMU_PERFCTR_CPU_CYCLES,
-	[PERF_COUNT_HW_INSTRUCTIONS]	= M1_PMU_PERFCTR_INSTRUCTIONS,
+	[PERF_COUNT_HW_CPU_CYCLES]		= M1_PMU_PERFCTR_CPU_CYCLES,
+	[PERF_COUNT_HW_INSTRUCTIONS]		= M1_PMU_PERFCTR_INSTRUCTIONS,
+	[PERF_COUNT_HW_BRANCH_INSTRUCTIONS]	= M1_PMU_PERFCTR_BRANCH_INSTS,
+	[PERF_COUNT_HW_BRANCH_MISSES]		= M1_PMU_PERFCTR_BRANCH_MISSES,
 	/* No idea about the rest yet */
 };