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ports/psoc6: Modify i2s.
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Signed-off-by: IFX-Anusha <[email protected]>
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@IFX-Anusha
IFX-Anusha committed Oct 17, 2024
1 parent dc4da3c commit 4c0454b
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Showing 2 changed files with 40 additions and 36 deletions.
74 changes: 38 additions & 36 deletions ports/psoc6/machine_i2s.c
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Original file line number Diff line number Diff line change
Expand Up @@ -29,6 +29,7 @@
#include "py/runtime.h"
#include "py/mphal.h"
#include "machine_pin_phy.h"
#include "modmachine.h"

#define i2s_assert_raise_val(msg, ret) if (ret != CY_RSLT_SUCCESS) { \
mp_raise_msg_varg(&mp_type_ValueError, MP_ERROR_TEXT(msg), ret); \
Expand Down Expand Up @@ -103,50 +104,50 @@ static int8_t get_frame_mapping_index(int8_t bits, format_t format) {
}
}

void i2s_audio_clock_init(uint32_t audio_clock_freq_hz) {
cyhal_clock_t clock_pll;
cy_rslt_t result;
// void i2s_audio_clock_init(uint32_t audio_clock_freq_hz) {
// cyhal_clock_t clock_pll;
// cy_rslt_t result;

static bool clock_set = false;
// static bool clock_set = false;

result = cyhal_clock_reserve(&clock_pll, &CYHAL_CLOCK_PLL[0]);
i2s_assert_raise_val("PLL clock reserve failed with error code: %lx", result);
// result = cyhal_clock_reserve(&clock_pll, &CYHAL_CLOCK_PLL[0]);
// i2s_assert_raise_val("PLL clock reserve failed with error code: %lx", result);

uint32_t pll_source_clock_freq_hz = cyhal_clock_get_frequency(&clock_pll);
// uint32_t pll_source_clock_freq_hz = cyhal_clock_get_frequency(&clock_pll);

if (audio_clock_freq_hz != pll_source_clock_freq_hz) {
mp_printf(&mp_plat_print, "machine.I2S: PLL0 freq is changed from %lu to %lu. This will affect all resources clock freq sourced by PLL0.\n", pll_source_clock_freq_hz, audio_clock_freq_hz);
clock_set = false;
pll_source_clock_freq_hz = audio_clock_freq_hz;
}
// if (audio_clock_freq_hz != pll_source_clock_freq_hz) {
// mp_printf(&mp_plat_print, "machine.I2S: PLL0 freq is changed from %lu to %lu. This will affect all resources clock freq sourced by PLL0.\n", pll_source_clock_freq_hz, audio_clock_freq_hz);
// clock_set = false;
// pll_source_clock_freq_hz = audio_clock_freq_hz;
// }

if (!clock_set) {
result = cyhal_clock_set_frequency(&clock_pll, pll_source_clock_freq_hz, NULL);
i2s_assert_raise_val("Set PLL clock frequency failed with error code: %lx", result);
if (!cyhal_clock_is_enabled(&clock_pll)) {
result = cyhal_clock_set_enabled(&clock_pll, true, true);
i2s_assert_raise_val("PLL clock enable failed with error code: %lx", result);
}
// if (!clock_set) {
// result = cyhal_clock_set_frequency(&clock_pll, pll_source_clock_freq_hz, NULL);
// i2s_assert_raise_val("Set PLL clock frequency failed with error code: %lx", result);
// if (!cyhal_clock_is_enabled(&clock_pll)) {
// result = cyhal_clock_set_enabled(&clock_pll, true, true);
// i2s_assert_raise_val("PLL clock enable failed with error code: %lx", result);
// }

result = cyhal_clock_reserve(&audio_clock, &CYHAL_CLOCK_HF[1]);
i2s_assert_raise_val("HF1 clock reserve failed with error code: %lx", result);
result = cyhal_clock_set_source(&audio_clock, &clock_pll);
i2s_assert_raise_val("HF1 clock sourcing failed with error code: %lx", result);
result = cyhal_clock_set_divider(&audio_clock, 2);
i2s_assert_raise_val("HF1 clock set divider failed with error code: %lx", result);
if (!cyhal_clock_is_enabled(&audio_clock)) {
result = cyhal_clock_set_enabled(&audio_clock, true, true);
i2s_assert_raise_val("HF1 clock enable failed with error code: %lx", result);
}
cyhal_clock_free(&audio_clock);
// result = cyhal_clock_reserve(&audio_clock, &CYHAL_CLOCK_HF[1]);
// i2s_assert_raise_val("HF1 clock reserve failed with error code: %lx", result);
// result = cyhal_clock_set_source(&audio_clock, &clock_pll);
// i2s_assert_raise_val("HF1 clock sourcing failed with error code: %lx", result);
// result = cyhal_clock_set_divider(&audio_clock, 2);
// i2s_assert_raise_val("HF1 clock set divider failed with error code: %lx", result);
// if (!cyhal_clock_is_enabled(&audio_clock)) {
// result = cyhal_clock_set_enabled(&audio_clock, true, true);
// i2s_assert_raise_val("HF1 clock enable failed with error code: %lx", result);
// }
// cyhal_clock_free(&audio_clock);

clock_set = true;
}
// clock_set = true;
// }

cyhal_clock_free(&clock_pll);
// cyhal_clock_free(&clock_pll);

cyhal_system_delay_ms(1);
}
// cyhal_system_delay_ms(1);
// }

static inline bool i2s_dma_is_tx_complete(cyhal_i2s_event_t event) {
return 0u != (event & CYHAL_I2S_ASYNC_TX_COMPLETE);
Expand Down Expand Up @@ -401,7 +402,8 @@ static void mp_machine_i2s_init_helper(machine_i2s_obj_t *self, mp_arg_val_t *ar
self->ring_buffer_storage = m_new(uint8_t, ring_buffer_len);

ringbuf_init(&self->ring_buffer, self->ring_buffer_storage, ring_buffer_len);
i2s_audio_clock_init(audio_clock_freq_hz);
// i2s_audio_clock_init(audio_clock_freq_hz);
audio_i2s_set_frequency(audio_clock_freq_hz);
i2s_init(self, &audio_clock);
i2s_dma_init(self);
}
Expand Down
2 changes: 2 additions & 0 deletions ports/psoc6/modmachine.h
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Original file line number Diff line number Diff line change
Expand Up @@ -72,4 +72,6 @@ void machine_init(void);
void machine_deinit(void);
mp_obj_t system_reset_cause(void);

extern void audio_i2s_set_frequency(uint32_t audio_clock_freq_hz);

#endif // MICROPY_INCLUDED_PSOC6_MODMACHINE_H

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