diff --git a/lib/std/build.zig b/lib/std/build.zig index ad4be9e4ca3c..72d26ff0475e 100644 --- a/lib/std/build.zig +++ b/lib/std/build.zig @@ -1199,6 +1199,8 @@ pub const LibExeObjStep = struct { subsystem: ?builtin.SubSystem = null, + target_details: ?std.target.TargetDetails = null, + const LinkObject = union(enum) { StaticPath: []const u8, OtherStep: *LibExeObjStep, @@ -1384,6 +1386,10 @@ pub const LibExeObjStep = struct { self.computeOutFileNames(); } + pub fn setTargetDetails(self: *LibExeObjStep, target_details: std.target.TargetDetails) void { + self.target_details = target_details; + } + pub fn setTargetGLibC(self: *LibExeObjStep, major: u32, minor: u32, patch: u32) void { self.target_glibc = Version{ .major = major, @@ -1974,6 +1980,28 @@ pub const LibExeObjStep = struct { }, } + if (self.target_details) |td| { + switch (td) { + .cpu => |cpu| { + try zig_args.append("--cpu"); + try zig_args.append(cpu.name); + }, + .features => |features| { + try zig_args.append("--features"); + + var feature_str_buffer = try std.Buffer.initSize(builder.allocator, 0); + defer feature_str_buffer.deinit(); + + for (features) |feature| { + try feature_str_buffer.append(feature.name); + try feature_str_buffer.append(","); + } + + try zig_args.append(feature_str_buffer.toOwnedSlice()); + }, + } + } + if (self.target_glibc) |ver| { try zig_args.append("-target-glibc"); try zig_args.append(builder.fmt("{}.{}.{}", .{ ver.major, ver.minor, ver.patch })); diff --git a/lib/std/std.zig b/lib/std/std.zig index dd4d968efbc9..f268bfe848e6 100644 --- a/lib/std/std.zig +++ b/lib/std/std.zig @@ -60,6 +60,7 @@ pub const rand = @import("rand.zig"); pub const rb = @import("rb.zig"); pub const sort = @import("sort.zig"); pub const ascii = @import("ascii.zig"); +pub const target = @import("target.zig"); pub const testing = @import("testing.zig"); pub const time = @import("time.zig"); pub const unicode = @import("unicode.zig"); diff --git a/lib/std/target.zig b/lib/std/target.zig index 22fea691c4b5..1f0536e1c639 100644 --- a/lib/std/target.zig +++ b/lib/std/target.zig @@ -458,7 +458,7 @@ pub const Target = union(enum) { pub fn parseArchSub(text: []const u8) ParseArchSubError!Arch { const info = @typeInfo(Arch); inline for (info.Union.fields) |field| { - if (mem.eql(u8, text, field.name)) { + if (text.len >= field.name.len and mem.eql(u8, text[0..field.name.len], field.name)) { if (field.field_type == void) { return @as(Arch, @field(Arch, field.name)); } else { @@ -476,6 +476,31 @@ pub const Target = union(enum) { return error.UnknownArchitecture; } + pub fn parseArchTag(text: []const u8) ParseArchSubError!@TagType(Arch) { + const info = @typeInfo(Arch); + inline for (info.Union.fields) |field| { + if (text.len >= field.name.len and mem.eql(u8, text[0..field.name.len], field.name)) { + if (text.len == field.name.len) return @as(@TagType(Arch), @field(Arch, field.name)); + + if (field.field_type == void) { + return error.UnknownArchitecture; + } + + const sub_info = @typeInfo(field.field_type); + inline for (sub_info.Enum.fields) |sub_field| { + const combined = field.name ++ sub_field.name; + if (mem.eql(u8, text, combined)) { + return @as(@TagType(Arch), @field(Arch, field.name)); + } + } + + return error.UnknownSubArchitecture; + } + } + + return error.UnknownArchitecture; + } + pub fn parseOs(text: []const u8) !Os { const info = @typeInfo(Os); inline for (info.Enum.fields) |field| { @@ -778,3 +803,83 @@ pub const Target = union(enum) { return .unavailable; } }; + +pub const aarch64 = @import("target/aarch64.zig"); +pub const amdgpu = @import("target/amdgpu.zig"); +pub const arm = @import("target/arm.zig"); +pub const avr = @import("target/avr.zig"); +pub const bpf = @import("target/bpf.zig"); +pub const hexagon = @import("target/hexagon.zig"); +pub const mips = @import("target/mips.zig"); +pub const msp430 = @import("target/msp430.zig"); +pub const nvptx = @import("target/nvptx.zig"); +pub const powerpc = @import("target/powerpc.zig"); +pub const riscv = @import("target/riscv.zig"); +pub const sparc = @import("target/sparc.zig"); +pub const systemz = @import("target/systemz.zig"); +pub const wasm = @import("target/wasm.zig"); +pub const x86 = @import("target/x86.zig"); + +pub const Feature = struct { + name: []const u8, + llvm_name: ?[]const u8, + description: []const u8, + + dependencies: []*const Feature, +}; + +pub const Cpu = struct { + name: []const u8, + llvm_name: ?[]const u8, + + dependencies: []*const Feature, +}; + +pub const TargetDetails = union(enum) { + cpu: *const Cpu, + features: []*const Feature, +}; + +pub fn getFeaturesForArch(arch: @TagType(Target.Arch)) []*const Feature { + return switch (arch) { + .arm, .armeb, .thumb, .thumbeb => arm.features, + .aarch64, .aarch64_be, .aarch64_32 => aarch64.features, + .avr => avr.features, + .bpfel, .bpfeb => bpf.features, + .hexagon => hexagon.features, + .mips, .mipsel, .mips64, .mips64el => mips.features, + .msp430 => msp430.features, + .powerpc, .powerpc64, .powerpc64le => powerpc.features, + .amdgcn => amdgpu.features, + .riscv32, .riscv64 => riscv.features, + .sparc, .sparcv9, .sparcel => sparc.features, + .s390x => systemz.features, + .i386, .x86_64 => x86.features, + .nvptx, .nvptx64 => nvptx.features, + .wasm32, .wasm64 => wasm.features, + + else => &[_]*const Feature{}, + }; +} + +pub fn getCpusForArch(arch: @TagType(Target.Arch)) []*const Cpu { + return switch (arch) { + .arm, .armeb, .thumb, .thumbeb => arm.cpus, + .aarch64, .aarch64_be, .aarch64_32 => aarch64.cpus, + .avr => avr.cpus, + .bpfel, .bpfeb => bpf.cpus, + .hexagon => hexagon.cpus, + .mips, .mipsel, .mips64, .mips64el => mips.cpus, + .msp430 => msp430.cpus, + .powerpc, .powerpc64, .powerpc64le => powerpc.cpus, + .amdgcn => amdgpu.cpus, + .riscv32, .riscv64 => riscv.cpus, + .sparc, .sparcv9, .sparcel => sparc.cpus, + .s390x => systemz.cpus, + .i386, .x86_64 => x86.cpus, + .nvptx, .nvptx64 => nvptx.cpus, + .wasm32, .wasm64 => wasm.cpus, + + else => &[_]*const Cpu{}, + }; +} diff --git a/lib/std/target/aarch64.zig b/lib/std/target/aarch64.zig new file mode 100644 index 000000000000..56101f20e772 --- /dev/null +++ b/lib/std/target/aarch64.zig @@ -0,0 +1,1603 @@ +const Feature = @import("std").target.Feature; +const Cpu = @import("std").target.Cpu; + +pub const feature_aes = Feature{ + .name = "aes", + .llvm_name = "aes", + .description = "Enable AES support", + .dependencies = &[_]*const Feature { + &feature_fpArmv8, + }, +}; + +pub const feature_am = Feature{ + .name = "am", + .llvm_name = "am", + .description = "Enable v8.4-A Activity Monitors extension", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_aggressiveFma = Feature{ + .name = "aggressiveFma", + .llvm_name = "aggressive-fma", + .description = "Enable Aggressive FMA for floating-point.", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_altnzcv = Feature{ + .name = "altnzcv", + .llvm_name = "altnzcv", + .description = "Enable alternative NZCV format for floating point comparisons", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_alternateSextloadCvtF32Pattern = Feature{ + .name = "alternateSextloadCvtF32Pattern", + .llvm_name = "alternate-sextload-cvt-f32-pattern", + .description = "Use alternative pattern for sextload convert to f32", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_arithBccFusion = Feature{ + .name = "arithBccFusion", + .llvm_name = "arith-bcc-fusion", + .description = "CPU fuses arithmetic+bcc operations", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_arithCbzFusion = Feature{ + .name = "arithCbzFusion", + .llvm_name = "arith-cbz-fusion", + .description = "CPU fuses arithmetic + cbz/cbnz operations", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_balanceFpOps = Feature{ + .name = "balanceFpOps", + .llvm_name = "balance-fp-ops", + .description = "balance mix of odd and even D-registers for fp multiply(-accumulate) ops", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_bti = Feature{ + .name = "bti", + .llvm_name = "bti", + .description = "Enable Branch Target Identification", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_ccidx = Feature{ + .name = "ccidx", + .llvm_name = "ccidx", + .description = "Enable v8.3-A Extend of the CCSIDR number of sets", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_ccpp = Feature{ + .name = "ccpp", + .llvm_name = "ccpp", + .description = "Enable v8.2 data Cache Clean to Point of Persistence", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_crc = Feature{ + .name = "crc", + .llvm_name = "crc", + .description = "Enable ARMv8 CRC-32 checksum instructions", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_ccdp = Feature{ + .name = "ccdp", + .llvm_name = "ccdp", + .description = "Enable v8.5 Cache Clean to Point of Deep Persistence", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_callSavedX8 = Feature{ + .name = "callSavedX8", + .llvm_name = "call-saved-x8", + .description = "Make X8 callee saved.", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_callSavedX9 = Feature{ + .name = "callSavedX9", + .llvm_name = "call-saved-x9", + .description = "Make X9 callee saved.", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_callSavedX10 = Feature{ + .name = "callSavedX10", + .llvm_name = "call-saved-x10", + .description = "Make X10 callee saved.", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_callSavedX11 = Feature{ + .name = "callSavedX11", + .llvm_name = "call-saved-x11", + .description = "Make X11 callee saved.", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_callSavedX12 = Feature{ + .name = "callSavedX12", + .llvm_name = "call-saved-x12", + .description = "Make X12 callee saved.", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_callSavedX13 = Feature{ + .name = "callSavedX13", + .llvm_name = "call-saved-x13", + .description = "Make X13 callee saved.", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_callSavedX14 = Feature{ + .name = "callSavedX14", + .llvm_name = "call-saved-x14", + .description = "Make X14 callee saved.", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_callSavedX15 = Feature{ + .name = "callSavedX15", + .llvm_name = "call-saved-x15", + .description = "Make X15 callee saved.", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_callSavedX18 = Feature{ + .name = "callSavedX18", + .llvm_name = "call-saved-x18", + .description = "Make X18 callee saved.", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_complxnum = Feature{ + .name = "complxnum", + .llvm_name = "complxnum", + .description = "Enable v8.3-A Floating-point complex number support", + .dependencies = &[_]*const Feature { + &feature_fpArmv8, + }, +}; + +pub const feature_crypto = Feature{ + .name = "crypto", + .llvm_name = "crypto", + .description = "Enable cryptographic instructions", + .dependencies = &[_]*const Feature { + &feature_fpArmv8, + }, +}; + +pub const feature_customCheapAsMove = Feature{ + .name = "customCheapAsMove", + .llvm_name = "custom-cheap-as-move", + .description = "Use custom handling of cheap instructions", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_dit = Feature{ + .name = "dit", + .llvm_name = "dit", + .description = "Enable v8.4-A Data Independent Timing instructions", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_disableLatencySchedHeuristic = Feature{ + .name = "disableLatencySchedHeuristic", + .llvm_name = "disable-latency-sched-heuristic", + .description = "Disable latency scheduling heuristic", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_dotprod = Feature{ + .name = "dotprod", + .llvm_name = "dotprod", + .description = "Enable dot product support", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_exynosCheapAsMove = Feature{ + .name = "exynosCheapAsMove", + .llvm_name = "exynos-cheap-as-move", + .description = "Use Exynos specific handling of cheap instructions", + .dependencies = &[_]*const Feature { + &feature_customCheapAsMove, + }, +}; + +pub const feature_fmi = Feature{ + .name = "fmi", + .llvm_name = "fmi", + .description = "Enable v8.4-A Flag Manipulation Instructions", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_fp16fml = Feature{ + .name = "fp16fml", + .llvm_name = "fp16fml", + .description = "Enable FP16 FML instructions", + .dependencies = &[_]*const Feature { + &feature_fpArmv8, + }, +}; + +pub const feature_fpArmv8 = Feature{ + .name = "fpArmv8", + .llvm_name = "fp-armv8", + .description = "Enable ARMv8 FP", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_fptoint = Feature{ + .name = "fptoint", + .llvm_name = "fptoint", + .description = "Enable FRInt[32|64][Z|X] instructions that round a floating-point number to an integer (in FP format) forcing it to fit into a 32- or 64-bit int", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_force32bitJumpTables = Feature{ + .name = "force32bitJumpTables", + .llvm_name = "force-32bit-jump-tables", + .description = "Force jump table entries to be 32-bits wide except at MinSize", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_fullfp16 = Feature{ + .name = "fullfp16", + .llvm_name = "fullfp16", + .description = "Full FP16", + .dependencies = &[_]*const Feature { + &feature_fpArmv8, + }, +}; + +pub const feature_fuseAes = Feature{ + .name = "fuseAes", + .llvm_name = "fuse-aes", + .description = "CPU fuses AES crypto operations", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_fuseAddress = Feature{ + .name = "fuseAddress", + .llvm_name = "fuse-address", + .description = "CPU fuses address generation and memory operations", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_fuseArithLogic = Feature{ + .name = "fuseArithLogic", + .llvm_name = "fuse-arith-logic", + .description = "CPU fuses arithmetic and logic operations", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_fuseCsel = Feature{ + .name = "fuseCsel", + .llvm_name = "fuse-csel", + .description = "CPU fuses conditional select operations", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_fuseCryptoEor = Feature{ + .name = "fuseCryptoEor", + .llvm_name = "fuse-crypto-eor", + .description = "CPU fuses AES/PMULL and EOR operations", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_fuseLiterals = Feature{ + .name = "fuseLiterals", + .llvm_name = "fuse-literals", + .description = "CPU fuses literal generation operations", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_jsconv = Feature{ + .name = "jsconv", + .llvm_name = "jsconv", + .description = "Enable v8.3-A JavaScript FP conversion enchancement", + .dependencies = &[_]*const Feature { + &feature_fpArmv8, + }, +}; + +pub const feature_lor = Feature{ + .name = "lor", + .llvm_name = "lor", + .description = "Enables ARM v8.1 Limited Ordering Regions extension", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_lse = Feature{ + .name = "lse", + .llvm_name = "lse", + .description = "Enable ARMv8.1 Large System Extension (LSE) atomic instructions", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_lslFast = Feature{ + .name = "lslFast", + .llvm_name = "lsl-fast", + .description = "CPU has a fastpath logical shift of up to 3 places", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_mpam = Feature{ + .name = "mpam", + .llvm_name = "mpam", + .description = "Enable v8.4-A Memory system Partitioning and Monitoring extension", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_mte = Feature{ + .name = "mte", + .llvm_name = "mte", + .description = "Enable Memory Tagging Extension", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_neon = Feature{ + .name = "neon", + .llvm_name = "neon", + .description = "Enable Advanced SIMD instructions", + .dependencies = &[_]*const Feature { + &feature_fpArmv8, + }, +}; + +pub const feature_nv = Feature{ + .name = "nv", + .llvm_name = "nv", + .description = "Enable v8.4-A Nested Virtualization Enchancement", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_noNegImmediates = Feature{ + .name = "noNegImmediates", + .llvm_name = "no-neg-immediates", + .description = "Convert immediates and instructions to their negated or complemented equivalent when the immediate does not fit in the encoding.", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_pa = Feature{ + .name = "pa", + .llvm_name = "pa", + .description = "Enable v8.3-A Pointer Authentication enchancement", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_pan = Feature{ + .name = "pan", + .llvm_name = "pan", + .description = "Enables ARM v8.1 Privileged Access-Never extension", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_panRwv = Feature{ + .name = "panRwv", + .llvm_name = "pan-rwv", + .description = "Enable v8.2 PAN s1e1R and s1e1W Variants", + .dependencies = &[_]*const Feature { + &feature_pan, + }, +}; + +pub const feature_perfmon = Feature{ + .name = "perfmon", + .llvm_name = "perfmon", + .description = "Enable ARMv8 PMUv3 Performance Monitors extension", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_usePostraScheduler = Feature{ + .name = "usePostraScheduler", + .llvm_name = "use-postra-scheduler", + .description = "Schedule again after register allocation", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_predres = Feature{ + .name = "predres", + .llvm_name = "predres", + .description = "Enable v8.5a execution and data prediction invalidation instructions", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_predictableSelectExpensive = Feature{ + .name = "predictableSelectExpensive", + .llvm_name = "predictable-select-expensive", + .description = "Prefer likely predicted branches over selects", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_uaops = Feature{ + .name = "uaops", + .llvm_name = "uaops", + .description = "Enable v8.2 UAO PState", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_ras = Feature{ + .name = "ras", + .llvm_name = "ras", + .description = "Enable ARMv8 Reliability, Availability and Serviceability Extensions", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_rasv8_4 = Feature{ + .name = "rasv8_4", + .llvm_name = "rasv8_4", + .description = "Enable v8.4-A Reliability, Availability and Serviceability extension", + .dependencies = &[_]*const Feature { + &feature_ras, + }, +}; + +pub const feature_rcpc = Feature{ + .name = "rcpc", + .llvm_name = "rcpc", + .description = "Enable support for RCPC extension", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_rcpcImmo = Feature{ + .name = "rcpcImmo", + .llvm_name = "rcpc-immo", + .description = "Enable v8.4-A RCPC instructions with Immediate Offsets", + .dependencies = &[_]*const Feature { + &feature_rcpc, + }, +}; + +pub const feature_rdm = Feature{ + .name = "rdm", + .llvm_name = "rdm", + .description = "Enable ARMv8.1 Rounding Double Multiply Add/Subtract instructions", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_rand = Feature{ + .name = "rand", + .llvm_name = "rand", + .description = "Enable Random Number generation instructions", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_reserveX1 = Feature{ + .name = "reserveX1", + .llvm_name = "reserve-x1", + .description = "Reserve X1, making it unavailable as a GPR", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_reserveX2 = Feature{ + .name = "reserveX2", + .llvm_name = "reserve-x2", + .description = "Reserve X2, making it unavailable as a GPR", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_reserveX3 = Feature{ + .name = "reserveX3", + .llvm_name = "reserve-x3", + .description = "Reserve X3, making it unavailable as a GPR", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_reserveX4 = Feature{ + .name = "reserveX4", + .llvm_name = "reserve-x4", + .description = "Reserve X4, making it unavailable as a GPR", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_reserveX5 = Feature{ + .name = "reserveX5", + .llvm_name = "reserve-x5", + .description = "Reserve X5, making it unavailable as a GPR", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_reserveX6 = Feature{ + .name = "reserveX6", + .llvm_name = "reserve-x6", + .description = "Reserve X6, making it unavailable as a GPR", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_reserveX7 = Feature{ + .name = "reserveX7", + .llvm_name = "reserve-x7", + .description = "Reserve X7, making it unavailable as a GPR", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_reserveX9 = Feature{ + .name = "reserveX9", + .llvm_name = "reserve-x9", + .description = "Reserve X9, making it unavailable as a GPR", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_reserveX10 = Feature{ + .name = "reserveX10", + .llvm_name = "reserve-x10", + .description = "Reserve X10, making it unavailable as a GPR", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_reserveX11 = Feature{ + .name = "reserveX11", + .llvm_name = "reserve-x11", + .description = "Reserve X11, making it unavailable as a GPR", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_reserveX12 = Feature{ + .name = "reserveX12", + .llvm_name = "reserve-x12", + .description = "Reserve X12, making it unavailable as a GPR", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_reserveX13 = Feature{ + .name = "reserveX13", + .llvm_name = "reserve-x13", + .description = "Reserve X13, making it unavailable as a GPR", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_reserveX14 = Feature{ + .name = "reserveX14", + .llvm_name = "reserve-x14", + .description = "Reserve X14, making it unavailable as a GPR", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_reserveX15 = Feature{ + .name = "reserveX15", + .llvm_name = "reserve-x15", + .description = "Reserve X15, making it unavailable as a GPR", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_reserveX18 = Feature{ + .name = "reserveX18", + .llvm_name = "reserve-x18", + .description = "Reserve X18, making it unavailable as a GPR", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_reserveX20 = Feature{ + .name = "reserveX20", + .llvm_name = "reserve-x20", + .description = "Reserve X20, making it unavailable as a GPR", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_reserveX21 = Feature{ + .name = "reserveX21", + .llvm_name = "reserve-x21", + .description = "Reserve X21, making it unavailable as a GPR", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_reserveX22 = Feature{ + .name = "reserveX22", + .llvm_name = "reserve-x22", + .description = "Reserve X22, making it unavailable as a GPR", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_reserveX23 = Feature{ + .name = "reserveX23", + .llvm_name = "reserve-x23", + .description = "Reserve X23, making it unavailable as a GPR", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_reserveX24 = Feature{ + .name = "reserveX24", + .llvm_name = "reserve-x24", + .description = "Reserve X24, making it unavailable as a GPR", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_reserveX25 = Feature{ + .name = "reserveX25", + .llvm_name = "reserve-x25", + .description = "Reserve X25, making it unavailable as a GPR", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_reserveX26 = Feature{ + .name = "reserveX26", + .llvm_name = "reserve-x26", + .description = "Reserve X26, making it unavailable as a GPR", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_reserveX27 = Feature{ + .name = "reserveX27", + .llvm_name = "reserve-x27", + .description = "Reserve X27, making it unavailable as a GPR", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_reserveX28 = Feature{ + .name = "reserveX28", + .llvm_name = "reserve-x28", + .description = "Reserve X28, making it unavailable as a GPR", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_sb = Feature{ + .name = "sb", + .llvm_name = "sb", + .description = "Enable v8.5 Speculation Barrier", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_sel2 = Feature{ + .name = "sel2", + .llvm_name = "sel2", + .description = "Enable v8.4-A Secure Exception Level 2 extension", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_sha2 = Feature{ + .name = "sha2", + .llvm_name = "sha2", + .description = "Enable SHA1 and SHA256 support", + .dependencies = &[_]*const Feature { + &feature_fpArmv8, + }, +}; + +pub const feature_sha3 = Feature{ + .name = "sha3", + .llvm_name = "sha3", + .description = "Enable SHA512 and SHA3 support", + .dependencies = &[_]*const Feature { + &feature_fpArmv8, + }, +}; + +pub const feature_sm4 = Feature{ + .name = "sm4", + .llvm_name = "sm4", + .description = "Enable SM3 and SM4 support", + .dependencies = &[_]*const Feature { + &feature_fpArmv8, + }, +}; + +pub const feature_spe = Feature{ + .name = "spe", + .llvm_name = "spe", + .description = "Enable Statistical Profiling extension", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_ssbs = Feature{ + .name = "ssbs", + .llvm_name = "ssbs", + .description = "Enable Speculative Store Bypass Safe bit", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_sve = Feature{ + .name = "sve", + .llvm_name = "sve", + .description = "Enable Scalable Vector Extension (SVE) instructions", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_sve2 = Feature{ + .name = "sve2", + .llvm_name = "sve2", + .description = "Enable Scalable Vector Extension 2 (SVE2) instructions", + .dependencies = &[_]*const Feature { + &feature_sve, + }, +}; + +pub const feature_sve2Aes = Feature{ + .name = "sve2Aes", + .llvm_name = "sve2-aes", + .description = "Enable AES SVE2 instructions", + .dependencies = &[_]*const Feature { + &feature_sve, + &feature_fpArmv8, + }, +}; + +pub const feature_sve2Bitperm = Feature{ + .name = "sve2Bitperm", + .llvm_name = "sve2-bitperm", + .description = "Enable bit permutation SVE2 instructions", + .dependencies = &[_]*const Feature { + &feature_sve, + }, +}; + +pub const feature_sve2Sha3 = Feature{ + .name = "sve2Sha3", + .llvm_name = "sve2-sha3", + .description = "Enable SHA3 SVE2 instructions", + .dependencies = &[_]*const Feature { + &feature_sve, + &feature_fpArmv8, + }, +}; + +pub const feature_sve2Sm4 = Feature{ + .name = "sve2Sm4", + .llvm_name = "sve2-sm4", + .description = "Enable SM4 SVE2 instructions", + .dependencies = &[_]*const Feature { + &feature_sve, + &feature_fpArmv8, + }, +}; + +pub const feature_slowMisaligned128store = Feature{ + .name = "slowMisaligned128store", + .llvm_name = "slow-misaligned-128store", + .description = "Misaligned 128 bit stores are slow", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_slowPaired128 = Feature{ + .name = "slowPaired128", + .llvm_name = "slow-paired-128", + .description = "Paired 128 bit loads and stores are slow", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_slowStrqroStore = Feature{ + .name = "slowStrqroStore", + .llvm_name = "slow-strqro-store", + .description = "STR of Q register with register offset is slow", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_specrestrict = Feature{ + .name = "specrestrict", + .llvm_name = "specrestrict", + .description = "Enable architectural speculation restriction", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_strictAlign = Feature{ + .name = "strictAlign", + .llvm_name = "strict-align", + .description = "Disallow all unaligned memory access", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_tlbRmi = Feature{ + .name = "tlbRmi", + .llvm_name = "tlb-rmi", + .description = "Enable v8.4-A TLB Range and Maintenance Instructions", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_tracev84 = Feature{ + .name = "tracev84", + .llvm_name = "tracev8.4", + .description = "Enable v8.4-A Trace extension", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_useAa = Feature{ + .name = "useAa", + .llvm_name = "use-aa", + .description = "Use alias analysis during codegen", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_tpidrEl1 = Feature{ + .name = "tpidrEl1", + .llvm_name = "tpidr-el1", + .description = "Permit use of TPIDR_EL1 for the TLS base", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_tpidrEl2 = Feature{ + .name = "tpidrEl2", + .llvm_name = "tpidr-el2", + .description = "Permit use of TPIDR_EL2 for the TLS base", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_tpidrEl3 = Feature{ + .name = "tpidrEl3", + .llvm_name = "tpidr-el3", + .description = "Permit use of TPIDR_EL3 for the TLS base", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_useReciprocalSquareRoot = Feature{ + .name = "useReciprocalSquareRoot", + .llvm_name = "use-reciprocal-square-root", + .description = "Use the reciprocal square root approximation", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_vh = Feature{ + .name = "vh", + .llvm_name = "vh", + .description = "Enables ARM v8.1 Virtual Host extension", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_zcm = Feature{ + .name = "zcm", + .llvm_name = "zcm", + .description = "Has zero-cycle register moves", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_zcz = Feature{ + .name = "zcz", + .llvm_name = "zcz", + .description = "Has zero-cycle zeroing instructions", + .dependencies = &[_]*const Feature { + &feature_zczFp, + &feature_zczGp, + }, +}; + +pub const feature_zczFp = Feature{ + .name = "zczFp", + .llvm_name = "zcz-fp", + .description = "Has zero-cycle zeroing instructions for FP registers", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_zczFpWorkaround = Feature{ + .name = "zczFpWorkaround", + .llvm_name = "zcz-fp-workaround", + .description = "The zero-cycle floating-point zeroing instruction has a bug", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_zczGp = Feature{ + .name = "zczGp", + .llvm_name = "zcz-gp", + .description = "Has zero-cycle zeroing instructions for generic registers", + .dependencies = &[_]*const Feature { + }, +}; + +pub const features = &[_]*const Feature { + &feature_aes, + &feature_am, + &feature_aggressiveFma, + &feature_altnzcv, + &feature_alternateSextloadCvtF32Pattern, + &feature_arithBccFusion, + &feature_arithCbzFusion, + &feature_balanceFpOps, + &feature_bti, + &feature_ccidx, + &feature_ccpp, + &feature_crc, + &feature_ccdp, + &feature_callSavedX8, + &feature_callSavedX9, + &feature_callSavedX10, + &feature_callSavedX11, + &feature_callSavedX12, + &feature_callSavedX13, + &feature_callSavedX14, + &feature_callSavedX15, + &feature_callSavedX18, + &feature_complxnum, + &feature_crypto, + &feature_customCheapAsMove, + &feature_dit, + &feature_disableLatencySchedHeuristic, + &feature_dotprod, + &feature_exynosCheapAsMove, + &feature_fmi, + &feature_fp16fml, + &feature_fpArmv8, + &feature_fptoint, + &feature_force32bitJumpTables, + &feature_fullfp16, + &feature_fuseAes, + &feature_fuseAddress, + &feature_fuseArithLogic, + &feature_fuseCsel, + &feature_fuseCryptoEor, + &feature_fuseLiterals, + &feature_jsconv, + &feature_lor, + &feature_lse, + &feature_lslFast, + &feature_mpam, + &feature_mte, + &feature_neon, + &feature_nv, + &feature_noNegImmediates, + &feature_pa, + &feature_pan, + &feature_panRwv, + &feature_perfmon, + &feature_usePostraScheduler, + &feature_predres, + &feature_predictableSelectExpensive, + &feature_uaops, + &feature_ras, + &feature_rasv8_4, + &feature_rcpc, + &feature_rcpcImmo, + &feature_rdm, + &feature_rand, + &feature_reserveX1, + &feature_reserveX2, + &feature_reserveX3, + &feature_reserveX4, + &feature_reserveX5, + &feature_reserveX6, + &feature_reserveX7, + &feature_reserveX9, + &feature_reserveX10, + &feature_reserveX11, + &feature_reserveX12, + &feature_reserveX13, + &feature_reserveX14, + &feature_reserveX15, + &feature_reserveX18, + &feature_reserveX20, + &feature_reserveX21, + &feature_reserveX22, + &feature_reserveX23, + &feature_reserveX24, + &feature_reserveX25, + &feature_reserveX26, + &feature_reserveX27, + &feature_reserveX28, + &feature_sb, + &feature_sel2, + &feature_sha2, + &feature_sha3, + &feature_sm4, + &feature_spe, + &feature_ssbs, + &feature_sve, + &feature_sve2, + &feature_sve2Aes, + &feature_sve2Bitperm, + &feature_sve2Sha3, + &feature_sve2Sm4, + &feature_slowMisaligned128store, + &feature_slowPaired128, + &feature_slowStrqroStore, + &feature_specrestrict, + &feature_strictAlign, + &feature_tlbRmi, + &feature_tracev84, + &feature_useAa, + &feature_tpidrEl1, + &feature_tpidrEl2, + &feature_tpidrEl3, + &feature_useReciprocalSquareRoot, + &feature_vh, + &feature_zcm, + &feature_zcz, + &feature_zczFp, + &feature_zczFpWorkaround, + &feature_zczGp, +}; + +pub const cpu_appleLatest = Cpu{ + .name = "appleLatest", + .llvm_name = "apple-latest", + .dependencies = &[_]*const Feature { + &feature_arithCbzFusion, + &feature_zczFpWorkaround, + &feature_alternateSextloadCvtF32Pattern, + &feature_fuseCryptoEor, + &feature_zcm, + &feature_zczGp, + &feature_perfmon, + &feature_disableLatencySchedHeuristic, + &feature_fpArmv8, + &feature_zczFp, + &feature_arithBccFusion, + &feature_fuseAes, + }, +}; + +pub const cpu_cortexA35 = Cpu{ + .name = "cortexA35", + .llvm_name = "cortex-a35", + .dependencies = &[_]*const Feature { + &feature_perfmon, + &feature_fpArmv8, + &feature_crc, + }, +}; + +pub const cpu_cortexA53 = Cpu{ + .name = "cortexA53", + .llvm_name = "cortex-a53", + .dependencies = &[_]*const Feature { + &feature_customCheapAsMove, + &feature_crc, + &feature_perfmon, + &feature_useAa, + &feature_fpArmv8, + &feature_fuseAes, + &feature_balanceFpOps, + &feature_usePostraScheduler, + }, +}; + +pub const cpu_cortexA55 = Cpu{ + .name = "cortexA55", + .llvm_name = "cortex-a55", + .dependencies = &[_]*const Feature { + &feature_ccpp, + &feature_rcpc, + &feature_uaops, + &feature_rdm, + &feature_ras, + &feature_lse, + &feature_crc, + &feature_perfmon, + &feature_fpArmv8, + &feature_vh, + &feature_fuseAes, + &feature_lor, + &feature_dotprod, + &feature_pan, + }, +}; + +pub const cpu_cortexA57 = Cpu{ + .name = "cortexA57", + .llvm_name = "cortex-a57", + .dependencies = &[_]*const Feature { + &feature_fuseLiterals, + &feature_predictableSelectExpensive, + &feature_customCheapAsMove, + &feature_crc, + &feature_perfmon, + &feature_fpArmv8, + &feature_fuseAes, + &feature_balanceFpOps, + &feature_usePostraScheduler, + }, +}; + +pub const cpu_cortexA72 = Cpu{ + .name = "cortexA72", + .llvm_name = "cortex-a72", + .dependencies = &[_]*const Feature { + &feature_fuseAes, + &feature_fpArmv8, + &feature_perfmon, + &feature_crc, + }, +}; + +pub const cpu_cortexA73 = Cpu{ + .name = "cortexA73", + .llvm_name = "cortex-a73", + .dependencies = &[_]*const Feature { + &feature_fuseAes, + &feature_fpArmv8, + &feature_perfmon, + &feature_crc, + }, +}; + +pub const cpu_cortexA75 = Cpu{ + .name = "cortexA75", + .llvm_name = "cortex-a75", + .dependencies = &[_]*const Feature { + &feature_ccpp, + &feature_rcpc, + &feature_uaops, + &feature_rdm, + &feature_ras, + &feature_lse, + &feature_crc, + &feature_perfmon, + &feature_fpArmv8, + &feature_vh, + &feature_fuseAes, + &feature_lor, + &feature_dotprod, + &feature_pan, + }, +}; + +pub const cpu_cortexA76 = Cpu{ + .name = "cortexA76", + .llvm_name = "cortex-a76", + .dependencies = &[_]*const Feature { + &feature_ccpp, + &feature_rcpc, + &feature_uaops, + &feature_rdm, + &feature_ras, + &feature_lse, + &feature_crc, + &feature_fpArmv8, + &feature_vh, + &feature_lor, + &feature_ssbs, + &feature_dotprod, + &feature_pan, + }, +}; + +pub const cpu_cortexA76ae = Cpu{ + .name = "cortexA76ae", + .llvm_name = "cortex-a76ae", + .dependencies = &[_]*const Feature { + &feature_ccpp, + &feature_rcpc, + &feature_uaops, + &feature_rdm, + &feature_ras, + &feature_lse, + &feature_crc, + &feature_fpArmv8, + &feature_vh, + &feature_lor, + &feature_ssbs, + &feature_dotprod, + &feature_pan, + }, +}; + +pub const cpu_cyclone = Cpu{ + .name = "cyclone", + .llvm_name = "cyclone", + .dependencies = &[_]*const Feature { + &feature_arithCbzFusion, + &feature_zczFpWorkaround, + &feature_alternateSextloadCvtF32Pattern, + &feature_fuseCryptoEor, + &feature_zcm, + &feature_zczGp, + &feature_perfmon, + &feature_disableLatencySchedHeuristic, + &feature_fpArmv8, + &feature_zczFp, + &feature_arithBccFusion, + &feature_fuseAes, + }, +}; + +pub const cpu_exynosM1 = Cpu{ + .name = "exynosM1", + .llvm_name = "exynos-m1", + .dependencies = &[_]*const Feature { + &feature_customCheapAsMove, + &feature_crc, + &feature_force32bitJumpTables, + &feature_perfmon, + &feature_slowMisaligned128store, + &feature_useReciprocalSquareRoot, + &feature_fpArmv8, + &feature_zczFp, + &feature_fuseAes, + &feature_slowPaired128, + &feature_usePostraScheduler, + }, +}; + +pub const cpu_exynosM2 = Cpu{ + .name = "exynosM2", + .llvm_name = "exynos-m2", + .dependencies = &[_]*const Feature { + &feature_customCheapAsMove, + &feature_crc, + &feature_force32bitJumpTables, + &feature_perfmon, + &feature_slowMisaligned128store, + &feature_fpArmv8, + &feature_zczFp, + &feature_fuseAes, + &feature_slowPaired128, + &feature_usePostraScheduler, + }, +}; + +pub const cpu_exynosM3 = Cpu{ + .name = "exynosM3", + .llvm_name = "exynos-m3", + .dependencies = &[_]*const Feature { + &feature_fuseLiterals, + &feature_predictableSelectExpensive, + &feature_customCheapAsMove, + &feature_crc, + &feature_force32bitJumpTables, + &feature_fuseAddress, + &feature_fuseCsel, + &feature_perfmon, + &feature_fpArmv8, + &feature_zczFp, + &feature_fuseAes, + &feature_lslFast, + &feature_usePostraScheduler, + }, +}; + +pub const cpu_exynosM4 = Cpu{ + .name = "exynosM4", + .llvm_name = "exynos-m4", + .dependencies = &[_]*const Feature { + &feature_arithCbzFusion, + &feature_customCheapAsMove, + &feature_lse, + &feature_zczFp, + &feature_lslFast, + &feature_lor, + &feature_fuseLiterals, + &feature_ccpp, + &feature_ras, + &feature_fpArmv8, + &feature_fuseAes, + &feature_pan, + &feature_fuseArithLogic, + &feature_crc, + &feature_force32bitJumpTables, + &feature_fuseAddress, + &feature_fuseCsel, + &feature_arithBccFusion, + &feature_uaops, + &feature_rdm, + &feature_zczGp, + &feature_perfmon, + &feature_vh, + &feature_usePostraScheduler, + &feature_dotprod, + }, +}; + +pub const cpu_exynosM5 = Cpu{ + .name = "exynosM5", + .llvm_name = "exynos-m5", + .dependencies = &[_]*const Feature { + &feature_arithCbzFusion, + &feature_customCheapAsMove, + &feature_lse, + &feature_zczFp, + &feature_lslFast, + &feature_lor, + &feature_fuseLiterals, + &feature_ccpp, + &feature_ras, + &feature_fpArmv8, + &feature_fuseAes, + &feature_pan, + &feature_fuseArithLogic, + &feature_crc, + &feature_force32bitJumpTables, + &feature_fuseAddress, + &feature_fuseCsel, + &feature_arithBccFusion, + &feature_uaops, + &feature_rdm, + &feature_zczGp, + &feature_perfmon, + &feature_vh, + &feature_usePostraScheduler, + &feature_dotprod, + }, +}; + +pub const cpu_falkor = Cpu{ + .name = "falkor", + .llvm_name = "falkor", + .dependencies = &[_]*const Feature { + &feature_predictableSelectExpensive, + &feature_customCheapAsMove, + &feature_rdm, + &feature_slowStrqroStore, + &feature_zczGp, + &feature_crc, + &feature_perfmon, + &feature_fpArmv8, + &feature_zczFp, + &feature_lslFast, + &feature_usePostraScheduler, + }, +}; + +pub const cpu_generic = Cpu{ + .name = "generic", + .llvm_name = "generic", + .dependencies = &[_]*const Feature { + &feature_fpArmv8, + &feature_fuseAes, + &feature_neon, + &feature_perfmon, + &feature_usePostraScheduler, + }, +}; + +pub const cpu_kryo = Cpu{ + .name = "kryo", + .llvm_name = "kryo", + .dependencies = &[_]*const Feature { + &feature_predictableSelectExpensive, + &feature_customCheapAsMove, + &feature_zczGp, + &feature_crc, + &feature_perfmon, + &feature_fpArmv8, + &feature_zczFp, + &feature_lslFast, + &feature_usePostraScheduler, + }, +}; + +pub const cpu_saphira = Cpu{ + .name = "saphira", + .llvm_name = "saphira", + .dependencies = &[_]*const Feature { + &feature_predictableSelectExpensive, + &feature_customCheapAsMove, + &feature_fmi, + &feature_lse, + &feature_zczFp, + &feature_lslFast, + &feature_lor, + &feature_dit, + &feature_pa, + &feature_ccpp, + &feature_sel2, + &feature_ras, + &feature_fpArmv8, + &feature_ccidx, + &feature_pan, + &feature_rcpc, + &feature_crc, + &feature_tracev84, + &feature_mpam, + &feature_am, + &feature_nv, + &feature_tlbRmi, + &feature_uaops, + &feature_rdm, + &feature_zczGp, + &feature_perfmon, + &feature_vh, + &feature_usePostraScheduler, + &feature_dotprod, + &feature_spe, + }, +}; + +pub const cpu_thunderx = Cpu{ + .name = "thunderx", + .llvm_name = "thunderx", + .dependencies = &[_]*const Feature { + &feature_predictableSelectExpensive, + &feature_crc, + &feature_perfmon, + &feature_fpArmv8, + &feature_usePostraScheduler, + }, +}; + +pub const cpu_thunderx2t99 = Cpu{ + .name = "thunderx2t99", + .llvm_name = "thunderx2t99", + .dependencies = &[_]*const Feature { + &feature_predictableSelectExpensive, + &feature_aggressiveFma, + &feature_rdm, + &feature_lse, + &feature_crc, + &feature_fpArmv8, + &feature_vh, + &feature_arithBccFusion, + &feature_lor, + &feature_usePostraScheduler, + &feature_pan, + }, +}; + +pub const cpu_thunderxt81 = Cpu{ + .name = "thunderxt81", + .llvm_name = "thunderxt81", + .dependencies = &[_]*const Feature { + &feature_predictableSelectExpensive, + &feature_crc, + &feature_perfmon, + &feature_fpArmv8, + &feature_usePostraScheduler, + }, +}; + +pub const cpu_thunderxt83 = Cpu{ + .name = "thunderxt83", + .llvm_name = "thunderxt83", + .dependencies = &[_]*const Feature { + &feature_predictableSelectExpensive, + &feature_crc, + &feature_perfmon, + &feature_fpArmv8, + &feature_usePostraScheduler, + }, +}; + +pub const cpu_thunderxt88 = Cpu{ + .name = "thunderxt88", + .llvm_name = "thunderxt88", + .dependencies = &[_]*const Feature { + &feature_predictableSelectExpensive, + &feature_crc, + &feature_perfmon, + &feature_fpArmv8, + &feature_usePostraScheduler, + }, +}; + +pub const cpu_tsv110 = Cpu{ + .name = "tsv110", + .llvm_name = "tsv110", + .dependencies = &[_]*const Feature { + &feature_ccpp, + &feature_customCheapAsMove, + &feature_uaops, + &feature_rdm, + &feature_ras, + &feature_lse, + &feature_crc, + &feature_perfmon, + &feature_fpArmv8, + &feature_vh, + &feature_fuseAes, + &feature_lor, + &feature_usePostraScheduler, + &feature_dotprod, + &feature_pan, + &feature_spe, + }, +}; + +pub const cpus = &[_]*const Cpu { + &cpu_appleLatest, + &cpu_cortexA35, + &cpu_cortexA53, + &cpu_cortexA55, + &cpu_cortexA57, + &cpu_cortexA72, + &cpu_cortexA73, + &cpu_cortexA75, + &cpu_cortexA76, + &cpu_cortexA76ae, + &cpu_cyclone, + &cpu_exynosM1, + &cpu_exynosM2, + &cpu_exynosM3, + &cpu_exynosM4, + &cpu_exynosM5, + &cpu_falkor, + &cpu_generic, + &cpu_kryo, + &cpu_saphira, + &cpu_thunderx, + &cpu_thunderx2t99, + &cpu_thunderxt81, + &cpu_thunderxt83, + &cpu_thunderxt88, + &cpu_tsv110, +}; diff --git a/lib/std/target/amdgpu.zig b/lib/std/target/amdgpu.zig new file mode 100644 index 000000000000..5efc6e177f5c --- /dev/null +++ b/lib/std/target/amdgpu.zig @@ -0,0 +1,2132 @@ +const Feature = @import("std").target.Feature; +const Cpu = @import("std").target.Cpu; + +pub const feature_BitInsts16 = Feature{ + .name = "BitInsts16", + .llvm_name = "16-bit-insts", + .description = "Has i16/f16 instructions", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_addNoCarryInsts = Feature{ + .name = "addNoCarryInsts", + .llvm_name = "add-no-carry-insts", + .description = "Have VALU add/sub instructions without carry out", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_apertureRegs = Feature{ + .name = "apertureRegs", + .llvm_name = "aperture-regs", + .description = "Has Memory Aperture Base and Size Registers", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_atomicFaddInsts = Feature{ + .name = "atomicFaddInsts", + .llvm_name = "atomic-fadd-insts", + .description = "Has buffer_atomic_add_f32, buffer_atomic_pk_add_f16, global_atomic_add_f32, global_atomic_pk_add_f16 instructions", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_autoWaitcntBeforeBarrier = Feature{ + .name = "autoWaitcntBeforeBarrier", + .llvm_name = "auto-waitcnt-before-barrier", + .description = "Hardware automatically inserts waitcnt before barrier", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_ciInsts = Feature{ + .name = "ciInsts", + .llvm_name = "ci-insts", + .description = "Additional instructions for CI+", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_codeObjectV3 = Feature{ + .name = "codeObjectV3", + .llvm_name = "code-object-v3", + .description = "Generate code object version 3", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_cumode = Feature{ + .name = "cumode", + .llvm_name = "cumode", + .description = "Enable CU wavefront execution mode", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_dlInsts = Feature{ + .name = "dlInsts", + .llvm_name = "dl-insts", + .description = "Has v_fmac_f32 and v_xnor_b32 instructions", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_dpp = Feature{ + .name = "dpp", + .llvm_name = "dpp", + .description = "Support DPP (Data Parallel Primitives) extension", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_dpp8 = Feature{ + .name = "dpp8", + .llvm_name = "dpp8", + .description = "Support DPP8 (Data Parallel Primitives) extension", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_noSramEccSupport = Feature{ + .name = "noSramEccSupport", + .llvm_name = "no-sram-ecc-support", + .description = "Hardware does not support SRAM ECC", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_noXnackSupport = Feature{ + .name = "noXnackSupport", + .llvm_name = "no-xnack-support", + .description = "Hardware does not support XNACK", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_dot1Insts = Feature{ + .name = "dot1Insts", + .llvm_name = "dot1-insts", + .description = "Has v_dot4_i32_i8 and v_dot8_i32_i4 instructions", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_dot2Insts = Feature{ + .name = "dot2Insts", + .llvm_name = "dot2-insts", + .description = "Has v_dot2_f32_f16, v_dot2_i32_i16, v_dot2_u32_u16, v_dot4_u32_u8, v_dot8_u32_u4 instructions", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_dot3Insts = Feature{ + .name = "dot3Insts", + .llvm_name = "dot3-insts", + .description = "Has v_dot8c_i32_i4 instruction", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_dot4Insts = Feature{ + .name = "dot4Insts", + .llvm_name = "dot4-insts", + .description = "Has v_dot2c_i32_i16 instruction", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_dot5Insts = Feature{ + .name = "dot5Insts", + .llvm_name = "dot5-insts", + .description = "Has v_dot2c_f32_f16 instruction", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_dot6Insts = Feature{ + .name = "dot6Insts", + .llvm_name = "dot6-insts", + .description = "Has v_dot4c_i32_i8 instruction", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_DumpCode = Feature{ + .name = "DumpCode", + .llvm_name = "DumpCode", + .description = "Dump MachineInstrs in the CodeEmitter", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_dumpcode = Feature{ + .name = "dumpcode", + .llvm_name = "dumpcode", + .description = "Dump MachineInstrs in the CodeEmitter", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_enableDs128 = Feature{ + .name = "enableDs128", + .llvm_name = "enable-ds128", + .description = "Use ds_{read|write}_b128", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_loadStoreOpt = Feature{ + .name = "loadStoreOpt", + .llvm_name = "load-store-opt", + .description = "Enable SI load/store optimizer pass", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_enablePrtStrictNull = Feature{ + .name = "enablePrtStrictNull", + .llvm_name = "enable-prt-strict-null", + .description = "Enable zeroing of result registers for sparse texture fetches", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_siScheduler = Feature{ + .name = "siScheduler", + .llvm_name = "si-scheduler", + .description = "Enable SI Machine Scheduler", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_unsafeDsOffsetFolding = Feature{ + .name = "unsafeDsOffsetFolding", + .llvm_name = "unsafe-ds-offset-folding", + .description = "Force using DS instruction immediate offsets on SI", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_fmaf = Feature{ + .name = "fmaf", + .llvm_name = "fmaf", + .description = "Enable single precision FMA (not as fast as mul+add, but fused)", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_fp16Denormals = Feature{ + .name = "fp16Denormals", + .llvm_name = "fp16-denormals", + .description = "Enable half precision denormal handling", + .dependencies = &[_]*const Feature { + &feature_fp64, + }, +}; + +pub const feature_fp32Denormals = Feature{ + .name = "fp32Denormals", + .llvm_name = "fp32-denormals", + .description = "Enable single precision denormal handling", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_fp64 = Feature{ + .name = "fp64", + .llvm_name = "fp64", + .description = "Enable double precision operations", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_fp64Denormals = Feature{ + .name = "fp64Denormals", + .llvm_name = "fp64-denormals", + .description = "Enable double and half precision denormal handling", + .dependencies = &[_]*const Feature { + &feature_fp64, + }, +}; + +pub const feature_fp64Fp16Denormals = Feature{ + .name = "fp64Fp16Denormals", + .llvm_name = "fp64-fp16-denormals", + .description = "Enable double and half precision denormal handling", + .dependencies = &[_]*const Feature { + &feature_fp64, + }, +}; + +pub const feature_fpExceptions = Feature{ + .name = "fpExceptions", + .llvm_name = "fp-exceptions", + .description = "Enable floating point exceptions", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_fastFmaf = Feature{ + .name = "fastFmaf", + .llvm_name = "fast-fmaf", + .description = "Assuming f32 fma is at least as fast as mul + add", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_flatAddressSpace = Feature{ + .name = "flatAddressSpace", + .llvm_name = "flat-address-space", + .description = "Support flat address space", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_flatForGlobal = Feature{ + .name = "flatForGlobal", + .llvm_name = "flat-for-global", + .description = "Force to generate flat instruction for global", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_flatGlobalInsts = Feature{ + .name = "flatGlobalInsts", + .llvm_name = "flat-global-insts", + .description = "Have global_* flat memory instructions", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_flatInstOffsets = Feature{ + .name = "flatInstOffsets", + .llvm_name = "flat-inst-offsets", + .description = "Flat instructions have immediate offset addressing mode", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_flatScratchInsts = Feature{ + .name = "flatScratchInsts", + .llvm_name = "flat-scratch-insts", + .description = "Have scratch_* flat memory instructions", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_flatSegmentOffsetBug = Feature{ + .name = "flatSegmentOffsetBug", + .llvm_name = "flat-segment-offset-bug", + .description = "GFX10 bug, inst_offset ignored in flat segment", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_fmaMixInsts = Feature{ + .name = "fmaMixInsts", + .llvm_name = "fma-mix-insts", + .description = "Has v_fma_mix_f32, v_fma_mixlo_f16, v_fma_mixhi_f16 instructions", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_gcn3Encoding = Feature{ + .name = "gcn3Encoding", + .llvm_name = "gcn3-encoding", + .description = "Encoding format for VI", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_gfx7Gfx8Gfx9Insts = Feature{ + .name = "gfx7Gfx8Gfx9Insts", + .llvm_name = "gfx7-gfx8-gfx9-insts", + .description = "Instructions shared in GFX7, GFX8, GFX9", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_gfx8Insts = Feature{ + .name = "gfx8Insts", + .llvm_name = "gfx8-insts", + .description = "Additional instructions for GFX8+", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_gfx9Insts = Feature{ + .name = "gfx9Insts", + .llvm_name = "gfx9-insts", + .description = "Additional instructions for GFX9+", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_gfx10Insts = Feature{ + .name = "gfx10Insts", + .llvm_name = "gfx10-insts", + .description = "Additional instructions for GFX10+", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_instFwdPrefetchBug = Feature{ + .name = "instFwdPrefetchBug", + .llvm_name = "inst-fwd-prefetch-bug", + .description = "S_INST_PREFETCH instruction causes shader to hang", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_intClampInsts = Feature{ + .name = "intClampInsts", + .llvm_name = "int-clamp-insts", + .description = "Support clamp for integer destination", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_inv2piInlineImm = Feature{ + .name = "inv2piInlineImm", + .llvm_name = "inv-2pi-inline-imm", + .description = "Has 1 / (2 * pi) as inline immediate", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_ldsbankcount16 = Feature{ + .name = "ldsbankcount16", + .llvm_name = "ldsbankcount16", + .description = "The number of LDS banks per compute unit.", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_ldsbankcount32 = Feature{ + .name = "ldsbankcount32", + .llvm_name = "ldsbankcount32", + .description = "The number of LDS banks per compute unit.", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_ldsBranchVmemWarHazard = Feature{ + .name = "ldsBranchVmemWarHazard", + .llvm_name = "lds-branch-vmem-war-hazard", + .description = "Switching between LDS and VMEM-tex not waiting VM_VSRC=0", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_ldsMisalignedBug = Feature{ + .name = "ldsMisalignedBug", + .llvm_name = "lds-misaligned-bug", + .description = "Some GFX10 bug with misaligned multi-dword LDS access in WGP mode", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_localmemorysize0 = Feature{ + .name = "localmemorysize0", + .llvm_name = "localmemorysize0", + .description = "The size of local memory in bytes", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_localmemorysize32768 = Feature{ + .name = "localmemorysize32768", + .llvm_name = "localmemorysize32768", + .description = "The size of local memory in bytes", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_localmemorysize65536 = Feature{ + .name = "localmemorysize65536", + .llvm_name = "localmemorysize65536", + .description = "The size of local memory in bytes", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_maiInsts = Feature{ + .name = "maiInsts", + .llvm_name = "mai-insts", + .description = "Has mAI instructions", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_mimgR128 = Feature{ + .name = "mimgR128", + .llvm_name = "mimg-r128", + .description = "Support 128-bit texture resources", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_madMixInsts = Feature{ + .name = "madMixInsts", + .llvm_name = "mad-mix-insts", + .description = "Has v_mad_mix_f32, v_mad_mixlo_f16, v_mad_mixhi_f16 instructions", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_maxPrivateElementSize4 = Feature{ + .name = "maxPrivateElementSize4", + .llvm_name = "max-private-element-size-4", + .description = "Maximum private access size may be 4", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_maxPrivateElementSize8 = Feature{ + .name = "maxPrivateElementSize8", + .llvm_name = "max-private-element-size-8", + .description = "Maximum private access size may be 8", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_maxPrivateElementSize16 = Feature{ + .name = "maxPrivateElementSize16", + .llvm_name = "max-private-element-size-16", + .description = "Maximum private access size may be 16", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_movrel = Feature{ + .name = "movrel", + .llvm_name = "movrel", + .description = "Has v_movrel*_b32 instructions", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_nsaEncoding = Feature{ + .name = "nsaEncoding", + .llvm_name = "nsa-encoding", + .description = "Support NSA encoding for image instructions", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_nsaToVmemBug = Feature{ + .name = "nsaToVmemBug", + .llvm_name = "nsa-to-vmem-bug", + .description = "MIMG-NSA followed by VMEM fail if EXEC_LO or EXEC_HI equals zero", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_noDataDepHazard = Feature{ + .name = "noDataDepHazard", + .llvm_name = "no-data-dep-hazard", + .description = "Does not need SW waitstates", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_noSdstCmpx = Feature{ + .name = "noSdstCmpx", + .llvm_name = "no-sdst-cmpx", + .description = "V_CMPX does not write VCC/SGPR in addition to EXEC", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_offset3fBug = Feature{ + .name = "offset3fBug", + .llvm_name = "offset-3f-bug", + .description = "Branch offset of 3f hardware bug", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_pkFmacF16Inst = Feature{ + .name = "pkFmacF16Inst", + .llvm_name = "pk-fmac-f16-inst", + .description = "Has v_pk_fmac_f16 instruction", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_promoteAlloca = Feature{ + .name = "promoteAlloca", + .llvm_name = "promote-alloca", + .description = "Enable promote alloca pass", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_r128A16 = Feature{ + .name = "r128A16", + .llvm_name = "r128-a16", + .description = "Support 16 bit coordindates/gradients/lod/clamp/mip types on gfx9", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_registerBanking = Feature{ + .name = "registerBanking", + .llvm_name = "register-banking", + .description = "Has register banking", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_sdwa = Feature{ + .name = "sdwa", + .llvm_name = "sdwa", + .description = "Support SDWA (Sub-DWORD Addressing) extension", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_sdwaMav = Feature{ + .name = "sdwaMav", + .llvm_name = "sdwa-mav", + .description = "Support v_mac_f32/f16 with SDWA (Sub-DWORD Addressing) extension", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_sdwaOmod = Feature{ + .name = "sdwaOmod", + .llvm_name = "sdwa-omod", + .description = "Support OMod with SDWA (Sub-DWORD Addressing) extension", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_sdwaOutModsVopc = Feature{ + .name = "sdwaOutModsVopc", + .llvm_name = "sdwa-out-mods-vopc", + .description = "Support clamp for VOPC with SDWA (Sub-DWORD Addressing) extension", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_sdwaScalar = Feature{ + .name = "sdwaScalar", + .llvm_name = "sdwa-scalar", + .description = "Support scalar register with SDWA (Sub-DWORD Addressing) extension", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_sdwaSdst = Feature{ + .name = "sdwaSdst", + .llvm_name = "sdwa-sdst", + .description = "Support scalar dst for VOPC with SDWA (Sub-DWORD Addressing) extension", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_sgprInitBug = Feature{ + .name = "sgprInitBug", + .llvm_name = "sgpr-init-bug", + .description = "VI SGPR initialization bug requiring a fixed SGPR allocation size", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_smemToVectorWriteHazard = Feature{ + .name = "smemToVectorWriteHazard", + .llvm_name = "smem-to-vector-write-hazard", + .description = "s_load_dword followed by v_cmp page faults", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_sMemrealtime = Feature{ + .name = "sMemrealtime", + .llvm_name = "s-memrealtime", + .description = "Has s_memrealtime instruction", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_sramEcc = Feature{ + .name = "sramEcc", + .llvm_name = "sram-ecc", + .description = "Enable SRAM ECC", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_scalarAtomics = Feature{ + .name = "scalarAtomics", + .llvm_name = "scalar-atomics", + .description = "Has atomic scalar memory instructions", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_scalarFlatScratchInsts = Feature{ + .name = "scalarFlatScratchInsts", + .llvm_name = "scalar-flat-scratch-insts", + .description = "Have s_scratch_* flat memory instructions", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_scalarStores = Feature{ + .name = "scalarStores", + .llvm_name = "scalar-stores", + .description = "Has store scalar memory instructions", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_trapHandler = Feature{ + .name = "trapHandler", + .llvm_name = "trap-handler", + .description = "Trap handler support", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_trigReducedRange = Feature{ + .name = "trigReducedRange", + .llvm_name = "trig-reduced-range", + .description = "Requires use of fract on arguments to trig instructions", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_unalignedBufferAccess = Feature{ + .name = "unalignedBufferAccess", + .llvm_name = "unaligned-buffer-access", + .description = "Support unaligned global loads and stores", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_unalignedScratchAccess = Feature{ + .name = "unalignedScratchAccess", + .llvm_name = "unaligned-scratch-access", + .description = "Support unaligned scratch loads and stores", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_unpackedD16Vmem = Feature{ + .name = "unpackedD16Vmem", + .llvm_name = "unpacked-d16-vmem", + .description = "Has unpacked d16 vmem instructions", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_vgprIndexMode = Feature{ + .name = "vgprIndexMode", + .llvm_name = "vgpr-index-mode", + .description = "Has VGPR mode register indexing", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_vmemToScalarWriteHazard = Feature{ + .name = "vmemToScalarWriteHazard", + .llvm_name = "vmem-to-scalar-write-hazard", + .description = "VMEM instruction followed by scalar writing to EXEC mask, M0 or SGPR leads to incorrect execution.", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_vop3Literal = Feature{ + .name = "vop3Literal", + .llvm_name = "vop3-literal", + .description = "Can use one literal in VOP3", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_vop3p = Feature{ + .name = "vop3p", + .llvm_name = "vop3p", + .description = "Has VOP3P packed instructions", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_vcmpxExecWarHazard = Feature{ + .name = "vcmpxExecWarHazard", + .llvm_name = "vcmpx-exec-war-hazard", + .description = "V_CMPX WAR hazard on EXEC (V_CMPX issue ONLY)", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_vcmpxPermlaneHazard = Feature{ + .name = "vcmpxPermlaneHazard", + .llvm_name = "vcmpx-permlane-hazard", + .description = "TODO: describe me", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_vscnt = Feature{ + .name = "vscnt", + .llvm_name = "vscnt", + .description = "Has separate store vscnt counter", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_wavefrontsize16 = Feature{ + .name = "wavefrontsize16", + .llvm_name = "wavefrontsize16", + .description = "The number of threads per wavefront", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_wavefrontsize32 = Feature{ + .name = "wavefrontsize32", + .llvm_name = "wavefrontsize32", + .description = "The number of threads per wavefront", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_wavefrontsize64 = Feature{ + .name = "wavefrontsize64", + .llvm_name = "wavefrontsize64", + .description = "The number of threads per wavefront", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_xnack = Feature{ + .name = "xnack", + .llvm_name = "xnack", + .description = "Enable XNACK support", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_halfRate64Ops = Feature{ + .name = "halfRate64Ops", + .llvm_name = "half-rate-64-ops", + .description = "Most fp64 instructions are half rate instead of quarter", + .dependencies = &[_]*const Feature { + }, +}; + +pub const features = &[_]*const Feature { + &feature_BitInsts16, + &feature_addNoCarryInsts, + &feature_apertureRegs, + &feature_atomicFaddInsts, + &feature_autoWaitcntBeforeBarrier, + &feature_ciInsts, + &feature_codeObjectV3, + &feature_cumode, + &feature_dlInsts, + &feature_dpp, + &feature_dpp8, + &feature_noSramEccSupport, + &feature_noXnackSupport, + &feature_dot1Insts, + &feature_dot2Insts, + &feature_dot3Insts, + &feature_dot4Insts, + &feature_dot5Insts, + &feature_dot6Insts, + &feature_DumpCode, + &feature_dumpcode, + &feature_enableDs128, + &feature_loadStoreOpt, + &feature_enablePrtStrictNull, + &feature_siScheduler, + &feature_unsafeDsOffsetFolding, + &feature_fmaf, + &feature_fp16Denormals, + &feature_fp32Denormals, + &feature_fp64, + &feature_fp64Denormals, + &feature_fp64Fp16Denormals, + &feature_fpExceptions, + &feature_fastFmaf, + &feature_flatAddressSpace, + &feature_flatForGlobal, + &feature_flatGlobalInsts, + &feature_flatInstOffsets, + &feature_flatScratchInsts, + &feature_flatSegmentOffsetBug, + &feature_fmaMixInsts, + &feature_gcn3Encoding, + &feature_gfx7Gfx8Gfx9Insts, + &feature_gfx8Insts, + &feature_gfx9Insts, + &feature_gfx10Insts, + &feature_instFwdPrefetchBug, + &feature_intClampInsts, + &feature_inv2piInlineImm, + &feature_ldsbankcount16, + &feature_ldsbankcount32, + &feature_ldsBranchVmemWarHazard, + &feature_ldsMisalignedBug, + &feature_localmemorysize0, + &feature_localmemorysize32768, + &feature_localmemorysize65536, + &feature_maiInsts, + &feature_mimgR128, + &feature_madMixInsts, + &feature_maxPrivateElementSize4, + &feature_maxPrivateElementSize8, + &feature_maxPrivateElementSize16, + &feature_movrel, + &feature_nsaEncoding, + &feature_nsaToVmemBug, + &feature_noDataDepHazard, + &feature_noSdstCmpx, + &feature_offset3fBug, + &feature_pkFmacF16Inst, + &feature_promoteAlloca, + &feature_r128A16, + &feature_registerBanking, + &feature_sdwa, + &feature_sdwaMav, + &feature_sdwaOmod, + &feature_sdwaOutModsVopc, + &feature_sdwaScalar, + &feature_sdwaSdst, + &feature_sgprInitBug, + &feature_smemToVectorWriteHazard, + &feature_sMemrealtime, + &feature_sramEcc, + &feature_scalarAtomics, + &feature_scalarFlatScratchInsts, + &feature_scalarStores, + &feature_trapHandler, + &feature_trigReducedRange, + &feature_unalignedBufferAccess, + &feature_unalignedScratchAccess, + &feature_unpackedD16Vmem, + &feature_vgprIndexMode, + &feature_vmemToScalarWriteHazard, + &feature_vop3Literal, + &feature_vop3p, + &feature_vcmpxExecWarHazard, + &feature_vcmpxPermlaneHazard, + &feature_vscnt, + &feature_wavefrontsize16, + &feature_wavefrontsize32, + &feature_wavefrontsize64, + &feature_xnack, + &feature_halfRate64Ops, +}; + +pub const cpu_bonaire = Cpu{ + .name = "bonaire", + .llvm_name = "bonaire", + .dependencies = &[_]*const Feature { + &feature_codeObjectV3, + &feature_noXnackSupport, + &feature_ldsbankcount32, + &feature_trigReducedRange, + &feature_gfx7Gfx8Gfx9Insts, + &feature_movrel, + &feature_flatAddressSpace, + &feature_wavefrontsize64, + &feature_fp64, + &feature_mimgR128, + &feature_noSramEccSupport, + &feature_ciInsts, + &feature_localmemorysize65536, + }, +}; + +pub const cpu_carrizo = Cpu{ + .name = "carrizo", + .llvm_name = "carrizo", + .dependencies = &[_]*const Feature { + &feature_codeObjectV3, + &feature_fastFmaf, + &feature_ldsbankcount32, + &feature_unpackedD16Vmem, + &feature_trigReducedRange, + &feature_vgprIndexMode, + &feature_movrel, + &feature_fp64, + &feature_gcn3Encoding, + &feature_mimgR128, + &feature_sdwa, + &feature_gfx7Gfx8Gfx9Insts, + &feature_intClampInsts, + &feature_ciInsts, + &feature_sdwaOutModsVopc, + &feature_sMemrealtime, + &feature_flatAddressSpace, + &feature_inv2piInlineImm, + &feature_wavefrontsize64, + &feature_noSramEccSupport, + &feature_sdwaMav, + &feature_localmemorysize65536, + &feature_scalarStores, + &feature_gfx8Insts, + &feature_dpp, + &feature_BitInsts16, + &feature_xnack, + &feature_halfRate64Ops, + }, +}; + +pub const cpu_fiji = Cpu{ + .name = "fiji", + .llvm_name = "fiji", + .dependencies = &[_]*const Feature { + &feature_codeObjectV3, + &feature_noXnackSupport, + &feature_ldsbankcount32, + &feature_unpackedD16Vmem, + &feature_trigReducedRange, + &feature_vgprIndexMode, + &feature_movrel, + &feature_fp64, + &feature_gcn3Encoding, + &feature_mimgR128, + &feature_sdwa, + &feature_gfx7Gfx8Gfx9Insts, + &feature_intClampInsts, + &feature_ciInsts, + &feature_sdwaOutModsVopc, + &feature_sMemrealtime, + &feature_flatAddressSpace, + &feature_inv2piInlineImm, + &feature_wavefrontsize64, + &feature_noSramEccSupport, + &feature_sdwaMav, + &feature_localmemorysize65536, + &feature_scalarStores, + &feature_gfx8Insts, + &feature_dpp, + &feature_BitInsts16, + }, +}; + +pub const cpu_generic = Cpu{ + .name = "generic", + .llvm_name = "generic", + .dependencies = &[_]*const Feature { + &feature_wavefrontsize64, + }, +}; + +pub const cpu_genericHsa = Cpu{ + .name = "genericHsa", + .llvm_name = "generic-hsa", + .dependencies = &[_]*const Feature { + &feature_flatAddressSpace, + &feature_wavefrontsize64, + }, +}; + +pub const cpu_gfx1010 = Cpu{ + .name = "gfx1010", + .llvm_name = "gfx1010", + .dependencies = &[_]*const Feature { + &feature_codeObjectV3, + &feature_dlInsts, + &feature_noXnackSupport, + &feature_flatSegmentOffsetBug, + &feature_fmaMixInsts, + &feature_movrel, + &feature_registerBanking, + &feature_addNoCarryInsts, + &feature_fp64, + &feature_sdwaScalar, + &feature_flatGlobalInsts, + &feature_mimgR128, + &feature_flatInstOffsets, + &feature_apertureRegs, + &feature_noSdstCmpx, + &feature_vop3p, + &feature_sdwa, + &feature_intClampInsts, + &feature_sdwaSdst, + &feature_noDataDepHazard, + &feature_flatScratchInsts, + &feature_ciInsts, + &feature_sMemrealtime, + &feature_pkFmacF16Inst, + &feature_dpp8, + &feature_flatAddressSpace, + &feature_inv2piInlineImm, + &feature_fastFmaf, + &feature_noSramEccSupport, + &feature_gfx10Insts, + &feature_localmemorysize65536, + &feature_gfx9Insts, + &feature_gfx8Insts, + &feature_dpp, + &feature_BitInsts16, + &feature_vop3Literal, + &feature_sdwaOmod, + &feature_vscnt, + &feature_instFwdPrefetchBug, + &feature_ldsbankcount32, + &feature_ldsBranchVmemWarHazard, + &feature_ldsMisalignedBug, + &feature_nsaEncoding, + &feature_nsaToVmemBug, + &feature_offset3fBug, + &feature_smemToVectorWriteHazard, + &feature_scalarAtomics, + &feature_scalarFlatScratchInsts, + &feature_scalarStores, + &feature_vmemToScalarWriteHazard, + &feature_vcmpxExecWarHazard, + &feature_vcmpxPermlaneHazard, + &feature_wavefrontsize32, + }, +}; + +pub const cpu_gfx1011 = Cpu{ + .name = "gfx1011", + .llvm_name = "gfx1011", + .dependencies = &[_]*const Feature { + &feature_codeObjectV3, + &feature_dlInsts, + &feature_noXnackSupport, + &feature_dot1Insts, + &feature_dot2Insts, + &feature_dot5Insts, + &feature_dot6Insts, + &feature_flatSegmentOffsetBug, + &feature_fmaMixInsts, + &feature_movrel, + &feature_registerBanking, + &feature_addNoCarryInsts, + &feature_fp64, + &feature_sdwaScalar, + &feature_flatGlobalInsts, + &feature_mimgR128, + &feature_flatInstOffsets, + &feature_apertureRegs, + &feature_noSdstCmpx, + &feature_vop3p, + &feature_sdwa, + &feature_intClampInsts, + &feature_sdwaSdst, + &feature_noDataDepHazard, + &feature_flatScratchInsts, + &feature_ciInsts, + &feature_sMemrealtime, + &feature_pkFmacF16Inst, + &feature_dpp8, + &feature_flatAddressSpace, + &feature_inv2piInlineImm, + &feature_fastFmaf, + &feature_noSramEccSupport, + &feature_gfx10Insts, + &feature_localmemorysize65536, + &feature_gfx9Insts, + &feature_gfx8Insts, + &feature_dpp, + &feature_BitInsts16, + &feature_vop3Literal, + &feature_sdwaOmod, + &feature_vscnt, + &feature_instFwdPrefetchBug, + &feature_ldsbankcount32, + &feature_ldsBranchVmemWarHazard, + &feature_nsaEncoding, + &feature_nsaToVmemBug, + &feature_offset3fBug, + &feature_smemToVectorWriteHazard, + &feature_scalarAtomics, + &feature_scalarFlatScratchInsts, + &feature_scalarStores, + &feature_vmemToScalarWriteHazard, + &feature_vcmpxExecWarHazard, + &feature_vcmpxPermlaneHazard, + &feature_wavefrontsize32, + }, +}; + +pub const cpu_gfx1012 = Cpu{ + .name = "gfx1012", + .llvm_name = "gfx1012", + .dependencies = &[_]*const Feature { + &feature_codeObjectV3, + &feature_dlInsts, + &feature_noXnackSupport, + &feature_dot1Insts, + &feature_dot2Insts, + &feature_dot5Insts, + &feature_dot6Insts, + &feature_flatSegmentOffsetBug, + &feature_fmaMixInsts, + &feature_movrel, + &feature_registerBanking, + &feature_addNoCarryInsts, + &feature_fp64, + &feature_sdwaScalar, + &feature_flatGlobalInsts, + &feature_mimgR128, + &feature_flatInstOffsets, + &feature_apertureRegs, + &feature_noSdstCmpx, + &feature_vop3p, + &feature_sdwa, + &feature_intClampInsts, + &feature_sdwaSdst, + &feature_noDataDepHazard, + &feature_flatScratchInsts, + &feature_ciInsts, + &feature_sMemrealtime, + &feature_pkFmacF16Inst, + &feature_dpp8, + &feature_flatAddressSpace, + &feature_inv2piInlineImm, + &feature_fastFmaf, + &feature_noSramEccSupport, + &feature_gfx10Insts, + &feature_localmemorysize65536, + &feature_gfx9Insts, + &feature_gfx8Insts, + &feature_dpp, + &feature_BitInsts16, + &feature_vop3Literal, + &feature_sdwaOmod, + &feature_vscnt, + &feature_instFwdPrefetchBug, + &feature_ldsbankcount32, + &feature_ldsBranchVmemWarHazard, + &feature_ldsMisalignedBug, + &feature_nsaEncoding, + &feature_nsaToVmemBug, + &feature_offset3fBug, + &feature_smemToVectorWriteHazard, + &feature_scalarAtomics, + &feature_scalarFlatScratchInsts, + &feature_scalarStores, + &feature_vmemToScalarWriteHazard, + &feature_vcmpxExecWarHazard, + &feature_vcmpxPermlaneHazard, + &feature_wavefrontsize32, + }, +}; + +pub const cpu_gfx600 = Cpu{ + .name = "gfx600", + .llvm_name = "gfx600", + .dependencies = &[_]*const Feature { + &feature_codeObjectV3, + &feature_noXnackSupport, + &feature_fastFmaf, + &feature_ldsbankcount32, + &feature_trigReducedRange, + &feature_movrel, + &feature_wavefrontsize64, + &feature_fp64, + &feature_mimgR128, + &feature_noSramEccSupport, + &feature_localmemorysize32768, + &feature_halfRate64Ops, + }, +}; + +pub const cpu_gfx601 = Cpu{ + .name = "gfx601", + .llvm_name = "gfx601", + .dependencies = &[_]*const Feature { + &feature_codeObjectV3, + &feature_noXnackSupport, + &feature_ldsbankcount32, + &feature_trigReducedRange, + &feature_movrel, + &feature_wavefrontsize64, + &feature_fp64, + &feature_mimgR128, + &feature_noSramEccSupport, + &feature_localmemorysize32768, + }, +}; + +pub const cpu_gfx700 = Cpu{ + .name = "gfx700", + .llvm_name = "gfx700", + .dependencies = &[_]*const Feature { + &feature_codeObjectV3, + &feature_noXnackSupport, + &feature_ldsbankcount32, + &feature_trigReducedRange, + &feature_gfx7Gfx8Gfx9Insts, + &feature_movrel, + &feature_flatAddressSpace, + &feature_wavefrontsize64, + &feature_fp64, + &feature_mimgR128, + &feature_noSramEccSupport, + &feature_ciInsts, + &feature_localmemorysize65536, + }, +}; + +pub const cpu_gfx701 = Cpu{ + .name = "gfx701", + .llvm_name = "gfx701", + .dependencies = &[_]*const Feature { + &feature_codeObjectV3, + &feature_noXnackSupport, + &feature_fastFmaf, + &feature_ldsbankcount32, + &feature_trigReducedRange, + &feature_gfx7Gfx8Gfx9Insts, + &feature_movrel, + &feature_flatAddressSpace, + &feature_wavefrontsize64, + &feature_fp64, + &feature_mimgR128, + &feature_noSramEccSupport, + &feature_ciInsts, + &feature_localmemorysize65536, + &feature_halfRate64Ops, + }, +}; + +pub const cpu_gfx702 = Cpu{ + .name = "gfx702", + .llvm_name = "gfx702", + .dependencies = &[_]*const Feature { + &feature_codeObjectV3, + &feature_noXnackSupport, + &feature_fastFmaf, + &feature_ldsbankcount16, + &feature_trigReducedRange, + &feature_gfx7Gfx8Gfx9Insts, + &feature_movrel, + &feature_flatAddressSpace, + &feature_wavefrontsize64, + &feature_fp64, + &feature_mimgR128, + &feature_noSramEccSupport, + &feature_ciInsts, + &feature_localmemorysize65536, + }, +}; + +pub const cpu_gfx703 = Cpu{ + .name = "gfx703", + .llvm_name = "gfx703", + .dependencies = &[_]*const Feature { + &feature_codeObjectV3, + &feature_noXnackSupport, + &feature_ldsbankcount16, + &feature_trigReducedRange, + &feature_gfx7Gfx8Gfx9Insts, + &feature_movrel, + &feature_flatAddressSpace, + &feature_wavefrontsize64, + &feature_fp64, + &feature_mimgR128, + &feature_noSramEccSupport, + &feature_ciInsts, + &feature_localmemorysize65536, + }, +}; + +pub const cpu_gfx704 = Cpu{ + .name = "gfx704", + .llvm_name = "gfx704", + .dependencies = &[_]*const Feature { + &feature_codeObjectV3, + &feature_noXnackSupport, + &feature_ldsbankcount32, + &feature_trigReducedRange, + &feature_gfx7Gfx8Gfx9Insts, + &feature_movrel, + &feature_flatAddressSpace, + &feature_wavefrontsize64, + &feature_fp64, + &feature_mimgR128, + &feature_noSramEccSupport, + &feature_ciInsts, + &feature_localmemorysize65536, + }, +}; + +pub const cpu_gfx801 = Cpu{ + .name = "gfx801", + .llvm_name = "gfx801", + .dependencies = &[_]*const Feature { + &feature_codeObjectV3, + &feature_fastFmaf, + &feature_ldsbankcount32, + &feature_unpackedD16Vmem, + &feature_trigReducedRange, + &feature_vgprIndexMode, + &feature_movrel, + &feature_fp64, + &feature_gcn3Encoding, + &feature_mimgR128, + &feature_sdwa, + &feature_gfx7Gfx8Gfx9Insts, + &feature_intClampInsts, + &feature_ciInsts, + &feature_sdwaOutModsVopc, + &feature_sMemrealtime, + &feature_flatAddressSpace, + &feature_inv2piInlineImm, + &feature_wavefrontsize64, + &feature_noSramEccSupport, + &feature_sdwaMav, + &feature_localmemorysize65536, + &feature_scalarStores, + &feature_gfx8Insts, + &feature_dpp, + &feature_BitInsts16, + &feature_xnack, + &feature_halfRate64Ops, + }, +}; + +pub const cpu_gfx802 = Cpu{ + .name = "gfx802", + .llvm_name = "gfx802", + .dependencies = &[_]*const Feature { + &feature_codeObjectV3, + &feature_noXnackSupport, + &feature_ldsbankcount32, + &feature_sgprInitBug, + &feature_unpackedD16Vmem, + &feature_trigReducedRange, + &feature_vgprIndexMode, + &feature_movrel, + &feature_fp64, + &feature_gcn3Encoding, + &feature_mimgR128, + &feature_sdwa, + &feature_gfx7Gfx8Gfx9Insts, + &feature_intClampInsts, + &feature_ciInsts, + &feature_sdwaOutModsVopc, + &feature_sMemrealtime, + &feature_flatAddressSpace, + &feature_inv2piInlineImm, + &feature_wavefrontsize64, + &feature_noSramEccSupport, + &feature_sdwaMav, + &feature_localmemorysize65536, + &feature_scalarStores, + &feature_gfx8Insts, + &feature_dpp, + &feature_BitInsts16, + }, +}; + +pub const cpu_gfx803 = Cpu{ + .name = "gfx803", + .llvm_name = "gfx803", + .dependencies = &[_]*const Feature { + &feature_codeObjectV3, + &feature_noXnackSupport, + &feature_ldsbankcount32, + &feature_unpackedD16Vmem, + &feature_trigReducedRange, + &feature_vgprIndexMode, + &feature_movrel, + &feature_fp64, + &feature_gcn3Encoding, + &feature_mimgR128, + &feature_sdwa, + &feature_gfx7Gfx8Gfx9Insts, + &feature_intClampInsts, + &feature_ciInsts, + &feature_sdwaOutModsVopc, + &feature_sMemrealtime, + &feature_flatAddressSpace, + &feature_inv2piInlineImm, + &feature_wavefrontsize64, + &feature_noSramEccSupport, + &feature_sdwaMav, + &feature_localmemorysize65536, + &feature_scalarStores, + &feature_gfx8Insts, + &feature_dpp, + &feature_BitInsts16, + }, +}; + +pub const cpu_gfx810 = Cpu{ + .name = "gfx810", + .llvm_name = "gfx810", + .dependencies = &[_]*const Feature { + &feature_codeObjectV3, + &feature_ldsbankcount16, + &feature_trigReducedRange, + &feature_vgprIndexMode, + &feature_movrel, + &feature_fp64, + &feature_gcn3Encoding, + &feature_mimgR128, + &feature_sdwa, + &feature_gfx7Gfx8Gfx9Insts, + &feature_intClampInsts, + &feature_ciInsts, + &feature_sdwaOutModsVopc, + &feature_sMemrealtime, + &feature_flatAddressSpace, + &feature_inv2piInlineImm, + &feature_wavefrontsize64, + &feature_noSramEccSupport, + &feature_sdwaMav, + &feature_localmemorysize65536, + &feature_scalarStores, + &feature_gfx8Insts, + &feature_dpp, + &feature_BitInsts16, + &feature_xnack, + }, +}; + +pub const cpu_gfx900 = Cpu{ + .name = "gfx900", + .llvm_name = "gfx900", + .dependencies = &[_]*const Feature { + &feature_codeObjectV3, + &feature_noSramEccSupport, + &feature_noXnackSupport, + &feature_vgprIndexMode, + &feature_addNoCarryInsts, + &feature_fp64, + &feature_gcn3Encoding, + &feature_sdwaScalar, + &feature_flatGlobalInsts, + &feature_scalarFlatScratchInsts, + &feature_flatInstOffsets, + &feature_apertureRegs, + &feature_vop3p, + &feature_sdwa, + &feature_gfx7Gfx8Gfx9Insts, + &feature_intClampInsts, + &feature_sdwaSdst, + &feature_flatScratchInsts, + &feature_ciInsts, + &feature_r128A16, + &feature_sMemrealtime, + &feature_flatAddressSpace, + &feature_scalarAtomics, + &feature_inv2piInlineImm, + &feature_fastFmaf, + &feature_wavefrontsize64, + &feature_localmemorysize65536, + &feature_scalarStores, + &feature_gfx9Insts, + &feature_gfx8Insts, + &feature_dpp, + &feature_BitInsts16, + &feature_sdwaOmod, + &feature_ldsbankcount32, + &feature_madMixInsts, + }, +}; + +pub const cpu_gfx902 = Cpu{ + .name = "gfx902", + .llvm_name = "gfx902", + .dependencies = &[_]*const Feature { + &feature_codeObjectV3, + &feature_noSramEccSupport, + &feature_vgprIndexMode, + &feature_addNoCarryInsts, + &feature_fp64, + &feature_gcn3Encoding, + &feature_sdwaScalar, + &feature_flatGlobalInsts, + &feature_scalarFlatScratchInsts, + &feature_flatInstOffsets, + &feature_apertureRegs, + &feature_vop3p, + &feature_sdwa, + &feature_gfx7Gfx8Gfx9Insts, + &feature_intClampInsts, + &feature_sdwaSdst, + &feature_flatScratchInsts, + &feature_ciInsts, + &feature_r128A16, + &feature_sMemrealtime, + &feature_flatAddressSpace, + &feature_scalarAtomics, + &feature_inv2piInlineImm, + &feature_fastFmaf, + &feature_wavefrontsize64, + &feature_localmemorysize65536, + &feature_scalarStores, + &feature_gfx9Insts, + &feature_gfx8Insts, + &feature_dpp, + &feature_BitInsts16, + &feature_sdwaOmod, + &feature_ldsbankcount32, + &feature_madMixInsts, + &feature_xnack, + }, +}; + +pub const cpu_gfx904 = Cpu{ + .name = "gfx904", + .llvm_name = "gfx904", + .dependencies = &[_]*const Feature { + &feature_codeObjectV3, + &feature_noSramEccSupport, + &feature_noXnackSupport, + &feature_fmaMixInsts, + &feature_vgprIndexMode, + &feature_addNoCarryInsts, + &feature_fp64, + &feature_gcn3Encoding, + &feature_sdwaScalar, + &feature_flatGlobalInsts, + &feature_scalarFlatScratchInsts, + &feature_flatInstOffsets, + &feature_apertureRegs, + &feature_vop3p, + &feature_sdwa, + &feature_gfx7Gfx8Gfx9Insts, + &feature_intClampInsts, + &feature_sdwaSdst, + &feature_flatScratchInsts, + &feature_ciInsts, + &feature_r128A16, + &feature_sMemrealtime, + &feature_flatAddressSpace, + &feature_scalarAtomics, + &feature_inv2piInlineImm, + &feature_fastFmaf, + &feature_wavefrontsize64, + &feature_localmemorysize65536, + &feature_scalarStores, + &feature_gfx9Insts, + &feature_gfx8Insts, + &feature_dpp, + &feature_BitInsts16, + &feature_sdwaOmod, + &feature_ldsbankcount32, + }, +}; + +pub const cpu_gfx906 = Cpu{ + .name = "gfx906", + .llvm_name = "gfx906", + .dependencies = &[_]*const Feature { + &feature_codeObjectV3, + &feature_dlInsts, + &feature_noXnackSupport, + &feature_dot1Insts, + &feature_dot2Insts, + &feature_fmaMixInsts, + &feature_vgprIndexMode, + &feature_addNoCarryInsts, + &feature_fp64, + &feature_gcn3Encoding, + &feature_sdwaScalar, + &feature_flatGlobalInsts, + &feature_scalarFlatScratchInsts, + &feature_flatInstOffsets, + &feature_apertureRegs, + &feature_vop3p, + &feature_sdwa, + &feature_gfx7Gfx8Gfx9Insts, + &feature_intClampInsts, + &feature_sdwaSdst, + &feature_flatScratchInsts, + &feature_ciInsts, + &feature_r128A16, + &feature_sMemrealtime, + &feature_flatAddressSpace, + &feature_scalarAtomics, + &feature_inv2piInlineImm, + &feature_fastFmaf, + &feature_wavefrontsize64, + &feature_localmemorysize65536, + &feature_scalarStores, + &feature_gfx9Insts, + &feature_gfx8Insts, + &feature_dpp, + &feature_BitInsts16, + &feature_sdwaOmod, + &feature_ldsbankcount32, + &feature_halfRate64Ops, + }, +}; + +pub const cpu_gfx908 = Cpu{ + .name = "gfx908", + .llvm_name = "gfx908", + .dependencies = &[_]*const Feature { + &feature_atomicFaddInsts, + &feature_codeObjectV3, + &feature_dlInsts, + &feature_dot1Insts, + &feature_dot2Insts, + &feature_dot3Insts, + &feature_dot4Insts, + &feature_dot5Insts, + &feature_dot6Insts, + &feature_fmaMixInsts, + &feature_vgprIndexMode, + &feature_addNoCarryInsts, + &feature_fp64, + &feature_gcn3Encoding, + &feature_sdwaScalar, + &feature_flatGlobalInsts, + &feature_scalarFlatScratchInsts, + &feature_flatInstOffsets, + &feature_apertureRegs, + &feature_vop3p, + &feature_sdwa, + &feature_gfx7Gfx8Gfx9Insts, + &feature_intClampInsts, + &feature_sdwaSdst, + &feature_flatScratchInsts, + &feature_ciInsts, + &feature_r128A16, + &feature_sMemrealtime, + &feature_flatAddressSpace, + &feature_scalarAtomics, + &feature_inv2piInlineImm, + &feature_fastFmaf, + &feature_wavefrontsize64, + &feature_localmemorysize65536, + &feature_scalarStores, + &feature_gfx9Insts, + &feature_gfx8Insts, + &feature_dpp, + &feature_BitInsts16, + &feature_sdwaOmod, + &feature_ldsbankcount32, + &feature_maiInsts, + &feature_pkFmacF16Inst, + &feature_sramEcc, + &feature_halfRate64Ops, + }, +}; + +pub const cpu_gfx909 = Cpu{ + .name = "gfx909", + .llvm_name = "gfx909", + .dependencies = &[_]*const Feature { + &feature_codeObjectV3, + &feature_vgprIndexMode, + &feature_addNoCarryInsts, + &feature_fp64, + &feature_gcn3Encoding, + &feature_sdwaScalar, + &feature_flatGlobalInsts, + &feature_scalarFlatScratchInsts, + &feature_flatInstOffsets, + &feature_apertureRegs, + &feature_vop3p, + &feature_sdwa, + &feature_gfx7Gfx8Gfx9Insts, + &feature_intClampInsts, + &feature_sdwaSdst, + &feature_flatScratchInsts, + &feature_ciInsts, + &feature_r128A16, + &feature_sMemrealtime, + &feature_flatAddressSpace, + &feature_scalarAtomics, + &feature_inv2piInlineImm, + &feature_fastFmaf, + &feature_wavefrontsize64, + &feature_localmemorysize65536, + &feature_scalarStores, + &feature_gfx9Insts, + &feature_gfx8Insts, + &feature_dpp, + &feature_BitInsts16, + &feature_sdwaOmod, + &feature_ldsbankcount32, + &feature_madMixInsts, + &feature_xnack, + }, +}; + +pub const cpu_hainan = Cpu{ + .name = "hainan", + .llvm_name = "hainan", + .dependencies = &[_]*const Feature { + &feature_codeObjectV3, + &feature_noXnackSupport, + &feature_ldsbankcount32, + &feature_trigReducedRange, + &feature_movrel, + &feature_wavefrontsize64, + &feature_fp64, + &feature_mimgR128, + &feature_noSramEccSupport, + &feature_localmemorysize32768, + }, +}; + +pub const cpu_hawaii = Cpu{ + .name = "hawaii", + .llvm_name = "hawaii", + .dependencies = &[_]*const Feature { + &feature_codeObjectV3, + &feature_noXnackSupport, + &feature_fastFmaf, + &feature_ldsbankcount32, + &feature_trigReducedRange, + &feature_gfx7Gfx8Gfx9Insts, + &feature_movrel, + &feature_flatAddressSpace, + &feature_wavefrontsize64, + &feature_fp64, + &feature_mimgR128, + &feature_noSramEccSupport, + &feature_ciInsts, + &feature_localmemorysize65536, + &feature_halfRate64Ops, + }, +}; + +pub const cpu_iceland = Cpu{ + .name = "iceland", + .llvm_name = "iceland", + .dependencies = &[_]*const Feature { + &feature_codeObjectV3, + &feature_noXnackSupport, + &feature_ldsbankcount32, + &feature_sgprInitBug, + &feature_unpackedD16Vmem, + &feature_trigReducedRange, + &feature_vgprIndexMode, + &feature_movrel, + &feature_fp64, + &feature_gcn3Encoding, + &feature_mimgR128, + &feature_sdwa, + &feature_gfx7Gfx8Gfx9Insts, + &feature_intClampInsts, + &feature_ciInsts, + &feature_sdwaOutModsVopc, + &feature_sMemrealtime, + &feature_flatAddressSpace, + &feature_inv2piInlineImm, + &feature_wavefrontsize64, + &feature_noSramEccSupport, + &feature_sdwaMav, + &feature_localmemorysize65536, + &feature_scalarStores, + &feature_gfx8Insts, + &feature_dpp, + &feature_BitInsts16, + }, +}; + +pub const cpu_kabini = Cpu{ + .name = "kabini", + .llvm_name = "kabini", + .dependencies = &[_]*const Feature { + &feature_codeObjectV3, + &feature_noXnackSupport, + &feature_ldsbankcount16, + &feature_trigReducedRange, + &feature_gfx7Gfx8Gfx9Insts, + &feature_movrel, + &feature_flatAddressSpace, + &feature_wavefrontsize64, + &feature_fp64, + &feature_mimgR128, + &feature_noSramEccSupport, + &feature_ciInsts, + &feature_localmemorysize65536, + }, +}; + +pub const cpu_kaveri = Cpu{ + .name = "kaveri", + .llvm_name = "kaveri", + .dependencies = &[_]*const Feature { + &feature_codeObjectV3, + &feature_noXnackSupport, + &feature_ldsbankcount32, + &feature_trigReducedRange, + &feature_gfx7Gfx8Gfx9Insts, + &feature_movrel, + &feature_flatAddressSpace, + &feature_wavefrontsize64, + &feature_fp64, + &feature_mimgR128, + &feature_noSramEccSupport, + &feature_ciInsts, + &feature_localmemorysize65536, + }, +}; + +pub const cpu_mullins = Cpu{ + .name = "mullins", + .llvm_name = "mullins", + .dependencies = &[_]*const Feature { + &feature_codeObjectV3, + &feature_noXnackSupport, + &feature_ldsbankcount16, + &feature_trigReducedRange, + &feature_gfx7Gfx8Gfx9Insts, + &feature_movrel, + &feature_flatAddressSpace, + &feature_wavefrontsize64, + &feature_fp64, + &feature_mimgR128, + &feature_noSramEccSupport, + &feature_ciInsts, + &feature_localmemorysize65536, + }, +}; + +pub const cpu_oland = Cpu{ + .name = "oland", + .llvm_name = "oland", + .dependencies = &[_]*const Feature { + &feature_codeObjectV3, + &feature_noXnackSupport, + &feature_ldsbankcount32, + &feature_trigReducedRange, + &feature_movrel, + &feature_wavefrontsize64, + &feature_fp64, + &feature_mimgR128, + &feature_noSramEccSupport, + &feature_localmemorysize32768, + }, +}; + +pub const cpu_pitcairn = Cpu{ + .name = "pitcairn", + .llvm_name = "pitcairn", + .dependencies = &[_]*const Feature { + &feature_codeObjectV3, + &feature_noXnackSupport, + &feature_ldsbankcount32, + &feature_trigReducedRange, + &feature_movrel, + &feature_wavefrontsize64, + &feature_fp64, + &feature_mimgR128, + &feature_noSramEccSupport, + &feature_localmemorysize32768, + }, +}; + +pub const cpu_polaris10 = Cpu{ + .name = "polaris10", + .llvm_name = "polaris10", + .dependencies = &[_]*const Feature { + &feature_codeObjectV3, + &feature_noXnackSupport, + &feature_ldsbankcount32, + &feature_unpackedD16Vmem, + &feature_trigReducedRange, + &feature_vgprIndexMode, + &feature_movrel, + &feature_fp64, + &feature_gcn3Encoding, + &feature_mimgR128, + &feature_sdwa, + &feature_gfx7Gfx8Gfx9Insts, + &feature_intClampInsts, + &feature_ciInsts, + &feature_sdwaOutModsVopc, + &feature_sMemrealtime, + &feature_flatAddressSpace, + &feature_inv2piInlineImm, + &feature_wavefrontsize64, + &feature_noSramEccSupport, + &feature_sdwaMav, + &feature_localmemorysize65536, + &feature_scalarStores, + &feature_gfx8Insts, + &feature_dpp, + &feature_BitInsts16, + }, +}; + +pub const cpu_polaris11 = Cpu{ + .name = "polaris11", + .llvm_name = "polaris11", + .dependencies = &[_]*const Feature { + &feature_codeObjectV3, + &feature_noXnackSupport, + &feature_ldsbankcount32, + &feature_unpackedD16Vmem, + &feature_trigReducedRange, + &feature_vgprIndexMode, + &feature_movrel, + &feature_fp64, + &feature_gcn3Encoding, + &feature_mimgR128, + &feature_sdwa, + &feature_gfx7Gfx8Gfx9Insts, + &feature_intClampInsts, + &feature_ciInsts, + &feature_sdwaOutModsVopc, + &feature_sMemrealtime, + &feature_flatAddressSpace, + &feature_inv2piInlineImm, + &feature_wavefrontsize64, + &feature_noSramEccSupport, + &feature_sdwaMav, + &feature_localmemorysize65536, + &feature_scalarStores, + &feature_gfx8Insts, + &feature_dpp, + &feature_BitInsts16, + }, +}; + +pub const cpu_stoney = Cpu{ + .name = "stoney", + .llvm_name = "stoney", + .dependencies = &[_]*const Feature { + &feature_codeObjectV3, + &feature_ldsbankcount16, + &feature_trigReducedRange, + &feature_vgprIndexMode, + &feature_movrel, + &feature_fp64, + &feature_gcn3Encoding, + &feature_mimgR128, + &feature_sdwa, + &feature_gfx7Gfx8Gfx9Insts, + &feature_intClampInsts, + &feature_ciInsts, + &feature_sdwaOutModsVopc, + &feature_sMemrealtime, + &feature_flatAddressSpace, + &feature_inv2piInlineImm, + &feature_wavefrontsize64, + &feature_noSramEccSupport, + &feature_sdwaMav, + &feature_localmemorysize65536, + &feature_scalarStores, + &feature_gfx8Insts, + &feature_dpp, + &feature_BitInsts16, + &feature_xnack, + }, +}; + +pub const cpu_tahiti = Cpu{ + .name = "tahiti", + .llvm_name = "tahiti", + .dependencies = &[_]*const Feature { + &feature_codeObjectV3, + &feature_noXnackSupport, + &feature_fastFmaf, + &feature_ldsbankcount32, + &feature_trigReducedRange, + &feature_movrel, + &feature_wavefrontsize64, + &feature_fp64, + &feature_mimgR128, + &feature_noSramEccSupport, + &feature_localmemorysize32768, + &feature_halfRate64Ops, + }, +}; + +pub const cpu_tonga = Cpu{ + .name = "tonga", + .llvm_name = "tonga", + .dependencies = &[_]*const Feature { + &feature_codeObjectV3, + &feature_noXnackSupport, + &feature_ldsbankcount32, + &feature_sgprInitBug, + &feature_unpackedD16Vmem, + &feature_trigReducedRange, + &feature_vgprIndexMode, + &feature_movrel, + &feature_fp64, + &feature_gcn3Encoding, + &feature_mimgR128, + &feature_sdwa, + &feature_gfx7Gfx8Gfx9Insts, + &feature_intClampInsts, + &feature_ciInsts, + &feature_sdwaOutModsVopc, + &feature_sMemrealtime, + &feature_flatAddressSpace, + &feature_inv2piInlineImm, + &feature_wavefrontsize64, + &feature_noSramEccSupport, + &feature_sdwaMav, + &feature_localmemorysize65536, + &feature_scalarStores, + &feature_gfx8Insts, + &feature_dpp, + &feature_BitInsts16, + }, +}; + +pub const cpu_verde = Cpu{ + .name = "verde", + .llvm_name = "verde", + .dependencies = &[_]*const Feature { + &feature_codeObjectV3, + &feature_noXnackSupport, + &feature_ldsbankcount32, + &feature_trigReducedRange, + &feature_movrel, + &feature_wavefrontsize64, + &feature_fp64, + &feature_mimgR128, + &feature_noSramEccSupport, + &feature_localmemorysize32768, + }, +}; + +pub const cpus = &[_]*const Cpu { + &cpu_bonaire, + &cpu_carrizo, + &cpu_fiji, + &cpu_generic, + &cpu_genericHsa, + &cpu_gfx1010, + &cpu_gfx1011, + &cpu_gfx1012, + &cpu_gfx600, + &cpu_gfx601, + &cpu_gfx700, + &cpu_gfx701, + &cpu_gfx702, + &cpu_gfx703, + &cpu_gfx704, + &cpu_gfx801, + &cpu_gfx802, + &cpu_gfx803, + &cpu_gfx810, + &cpu_gfx900, + &cpu_gfx902, + &cpu_gfx904, + &cpu_gfx906, + &cpu_gfx908, + &cpu_gfx909, + &cpu_hainan, + &cpu_hawaii, + &cpu_iceland, + &cpu_kabini, + &cpu_kaveri, + &cpu_mullins, + &cpu_oland, + &cpu_pitcairn, + &cpu_polaris10, + &cpu_polaris11, + &cpu_stoney, + &cpu_tahiti, + &cpu_tonga, + &cpu_verde, +}; diff --git a/lib/std/target/arm.zig b/lib/std/target/arm.zig new file mode 100644 index 000000000000..d83be5cc48db --- /dev/null +++ b/lib/std/target/arm.zig @@ -0,0 +1,2296 @@ +const Feature = @import("std").target.Feature; +const Cpu = @import("std").target.Cpu; + +pub const feature_msecext8 = Feature{ + .name = "msecext8", + .llvm_name = "8msecext", + .description = "Enable support for ARMv8-M Security Extensions", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_aclass = Feature{ + .name = "aclass", + .llvm_name = "aclass", + .description = "Is application profile ('A' series)", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_aes = Feature{ + .name = "aes", + .llvm_name = "aes", + .description = "Enable AES support", + .dependencies = &[_]*const Feature { + &feature_fpregs, + &feature_d32, + }, +}; + +pub const feature_acquireRelease = Feature{ + .name = "acquireRelease", + .llvm_name = "acquire-release", + .description = "Has v8 acquire/release (lda/ldaex etc) instructions", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_avoidMovsShop = Feature{ + .name = "avoidMovsShop", + .llvm_name = "avoid-movs-shop", + .description = "Avoid movs instructions with shifter operand", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_avoidPartialCpsr = Feature{ + .name = "avoidPartialCpsr", + .llvm_name = "avoid-partial-cpsr", + .description = "Avoid CPSR partial update for OOO execution", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_crc = Feature{ + .name = "crc", + .llvm_name = "crc", + .description = "Enable support for CRC instructions", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_cheapPredicableCpsr = Feature{ + .name = "cheapPredicableCpsr", + .llvm_name = "cheap-predicable-cpsr", + .description = "Disable +1 predication cost for instructions updating CPSR", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_vldnAlign = Feature{ + .name = "vldnAlign", + .llvm_name = "vldn-align", + .description = "Check for VLDn unaligned access", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_crypto = Feature{ + .name = "crypto", + .llvm_name = "crypto", + .description = "Enable support for Cryptography extensions", + .dependencies = &[_]*const Feature { + &feature_d32, + &feature_fpregs, + }, +}; + +pub const feature_d32 = Feature{ + .name = "d32", + .llvm_name = "d32", + .description = "Extend FP to 32 double registers", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_db = Feature{ + .name = "db", + .llvm_name = "db", + .description = "Has data barrier (dmb/dsb) instructions", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_dfb = Feature{ + .name = "dfb", + .llvm_name = "dfb", + .description = "Has full data barrier (dfb) instruction", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_dsp = Feature{ + .name = "dsp", + .llvm_name = "dsp", + .description = "Supports DSP instructions in ARM and/or Thumb2", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_dontWidenVmovs = Feature{ + .name = "dontWidenVmovs", + .llvm_name = "dont-widen-vmovs", + .description = "Don't widen VMOVS to VMOVD", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_dotprod = Feature{ + .name = "dotprod", + .llvm_name = "dotprod", + .description = "Enable support for dot product instructions", + .dependencies = &[_]*const Feature { + &feature_fpregs, + &feature_d32, + }, +}; + +pub const feature_executeOnly = Feature{ + .name = "executeOnly", + .llvm_name = "execute-only", + .description = "Enable the generation of execute only code.", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_expandFpMlx = Feature{ + .name = "expandFpMlx", + .llvm_name = "expand-fp-mlx", + .description = "Expand VFP/NEON MLA/MLS instructions", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_fp16 = Feature{ + .name = "fp16", + .llvm_name = "fp16", + .description = "Enable half-precision floating point", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_fp16fml = Feature{ + .name = "fp16fml", + .llvm_name = "fp16fml", + .description = "Enable full half-precision floating point fml instructions", + .dependencies = &[_]*const Feature { + &feature_fp16, + &feature_fpregs, + }, +}; + +pub const feature_fp64 = Feature{ + .name = "fp64", + .llvm_name = "fp64", + .description = "Floating point unit supports double precision", + .dependencies = &[_]*const Feature { + &feature_fpregs, + }, +}; + +pub const feature_fpao = Feature{ + .name = "fpao", + .llvm_name = "fpao", + .description = "Enable fast computation of positive address offsets", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_fpArmv8 = Feature{ + .name = "fpArmv8", + .llvm_name = "fp-armv8", + .description = "Enable ARMv8 FP", + .dependencies = &[_]*const Feature { + &feature_fp16, + &feature_d32, + &feature_fpregs, + }, +}; + +pub const feature_fpArmv8d16 = Feature{ + .name = "fpArmv8d16", + .llvm_name = "fp-armv8d16", + .description = "Enable ARMv8 FP with only 16 d-registers", + .dependencies = &[_]*const Feature { + &feature_fp16, + &feature_fpregs, + }, +}; + +pub const feature_fpArmv8d16sp = Feature{ + .name = "fpArmv8d16sp", + .llvm_name = "fp-armv8d16sp", + .description = "Enable ARMv8 FP with only 16 d-registers and no double precision", + .dependencies = &[_]*const Feature { + &feature_fp16, + &feature_fpregs, + }, +}; + +pub const feature_fpArmv8sp = Feature{ + .name = "fpArmv8sp", + .llvm_name = "fp-armv8sp", + .description = "Enable ARMv8 FP with no double precision", + .dependencies = &[_]*const Feature { + &feature_fp16, + &feature_fpregs, + &feature_d32, + }, +}; + +pub const feature_fpregs = Feature{ + .name = "fpregs", + .llvm_name = "fpregs", + .description = "Enable FP registers", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_fpregs16 = Feature{ + .name = "fpregs16", + .llvm_name = "fpregs16", + .description = "Enable 16-bit FP registers", + .dependencies = &[_]*const Feature { + &feature_fpregs, + }, +}; + +pub const feature_fpregs64 = Feature{ + .name = "fpregs64", + .llvm_name = "fpregs64", + .description = "Enable 64-bit FP registers", + .dependencies = &[_]*const Feature { + &feature_fpregs, + }, +}; + +pub const feature_fullfp16 = Feature{ + .name = "fullfp16", + .llvm_name = "fullfp16", + .description = "Enable full half-precision floating point", + .dependencies = &[_]*const Feature { + &feature_fp16, + &feature_fpregs, + }, +}; + +pub const feature_fuseAes = Feature{ + .name = "fuseAes", + .llvm_name = "fuse-aes", + .description = "CPU fuses AES crypto operations", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_fuseLiterals = Feature{ + .name = "fuseLiterals", + .llvm_name = "fuse-literals", + .description = "CPU fuses literal generation operations", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_hwdivArm = Feature{ + .name = "hwdivArm", + .llvm_name = "hwdiv-arm", + .description = "Enable divide instructions in ARM mode", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_hwdiv = Feature{ + .name = "hwdiv", + .llvm_name = "hwdiv", + .description = "Enable divide instructions in Thumb", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_noBranchPredictor = Feature{ + .name = "noBranchPredictor", + .llvm_name = "no-branch-predictor", + .description = "Has no branch predictor", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_retAddrStack = Feature{ + .name = "retAddrStack", + .llvm_name = "ret-addr-stack", + .description = "Has return address stack", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_slowfpvmlx = Feature{ + .name = "slowfpvmlx", + .llvm_name = "slowfpvmlx", + .description = "Disable VFP / NEON MAC instructions", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_vmlxHazards = Feature{ + .name = "vmlxHazards", + .llvm_name = "vmlx-hazards", + .description = "Has VMLx hazards", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_lob = Feature{ + .name = "lob", + .llvm_name = "lob", + .description = "Enable Low Overhead Branch extensions", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_longCalls = Feature{ + .name = "longCalls", + .llvm_name = "long-calls", + .description = "Generate calls via indirect call instructions", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_mclass = Feature{ + .name = "mclass", + .llvm_name = "mclass", + .description = "Is microcontroller profile ('M' series)", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_mp = Feature{ + .name = "mp", + .llvm_name = "mp", + .description = "Supports Multiprocessing extension", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_muxedUnits = Feature{ + .name = "muxedUnits", + .llvm_name = "muxed-units", + .description = "Has muxed AGU and NEON/FPU", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_neon = Feature{ + .name = "neon", + .llvm_name = "neon", + .description = "Enable NEON instructions", + .dependencies = &[_]*const Feature { + &feature_d32, + &feature_fpregs, + }, +}; + +pub const feature_neonfp = Feature{ + .name = "neonfp", + .llvm_name = "neonfp", + .description = "Use NEON for single precision FP", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_neonFpmovs = Feature{ + .name = "neonFpmovs", + .llvm_name = "neon-fpmovs", + .description = "Convert VMOVSR, VMOVRS, VMOVS to NEON", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_naclTrap = Feature{ + .name = "naclTrap", + .llvm_name = "nacl-trap", + .description = "NaCl trap", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_noarm = Feature{ + .name = "noarm", + .llvm_name = "noarm", + .description = "Does not support ARM mode execution", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_noMovt = Feature{ + .name = "noMovt", + .llvm_name = "no-movt", + .description = "Don't use movt/movw pairs for 32-bit imms", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_noNegImmediates = Feature{ + .name = "noNegImmediates", + .llvm_name = "no-neg-immediates", + .description = "Convert immediates and instructions to their negated or complemented equivalent when the immediate does not fit in the encoding.", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_disablePostraScheduler = Feature{ + .name = "disablePostraScheduler", + .llvm_name = "disable-postra-scheduler", + .description = "Don't schedule again after register allocation", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_nonpipelinedVfp = Feature{ + .name = "nonpipelinedVfp", + .llvm_name = "nonpipelined-vfp", + .description = "VFP instructions are not pipelined", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_perfmon = Feature{ + .name = "perfmon", + .llvm_name = "perfmon", + .description = "Enable support for Performance Monitor extensions", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_bit32 = Feature{ + .name = "bit32", + .llvm_name = "32bit", + .description = "Prefer 32-bit Thumb instrs", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_preferIshst = Feature{ + .name = "preferIshst", + .llvm_name = "prefer-ishst", + .description = "Prefer ISHST barriers", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_loopAlign = Feature{ + .name = "loopAlign", + .llvm_name = "loop-align", + .description = "Prefer 32-bit alignment for loops", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_preferVmovsr = Feature{ + .name = "preferVmovsr", + .llvm_name = "prefer-vmovsr", + .description = "Prefer VMOVSR", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_profUnpr = Feature{ + .name = "profUnpr", + .llvm_name = "prof-unpr", + .description = "Is profitable to unpredicate", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_ras = Feature{ + .name = "ras", + .llvm_name = "ras", + .description = "Enable Reliability, Availability and Serviceability extensions", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_rclass = Feature{ + .name = "rclass", + .llvm_name = "rclass", + .description = "Is realtime profile ('R' series)", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_readTpHard = Feature{ + .name = "readTpHard", + .llvm_name = "read-tp-hard", + .description = "Reading thread pointer from register", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_reserveR9 = Feature{ + .name = "reserveR9", + .llvm_name = "reserve-r9", + .description = "Reserve R9, making it unavailable as GPR", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_sb = Feature{ + .name = "sb", + .llvm_name = "sb", + .description = "Enable v8.5a Speculation Barrier", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_sha2 = Feature{ + .name = "sha2", + .llvm_name = "sha2", + .description = "Enable SHA1 and SHA256 support", + .dependencies = &[_]*const Feature { + &feature_fpregs, + &feature_d32, + }, +}; + +pub const feature_slowFpBrcc = Feature{ + .name = "slowFpBrcc", + .llvm_name = "slow-fp-brcc", + .description = "FP compare + branch is slow", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_slowLoadDSubreg = Feature{ + .name = "slowLoadDSubreg", + .llvm_name = "slow-load-D-subreg", + .description = "Loading into D subregs is slow", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_slowOddReg = Feature{ + .name = "slowOddReg", + .llvm_name = "slow-odd-reg", + .description = "VLDM/VSTM starting with an odd register is slow", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_slowVdup32 = Feature{ + .name = "slowVdup32", + .llvm_name = "slow-vdup32", + .description = "Has slow VDUP32 - prefer VMOV", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_slowVgetlni32 = Feature{ + .name = "slowVgetlni32", + .llvm_name = "slow-vgetlni32", + .description = "Has slow VGETLNi32 - prefer VMOV", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_splatVfpNeon = Feature{ + .name = "splatVfpNeon", + .llvm_name = "splat-vfp-neon", + .description = "Splat register from VFP to NEON", + .dependencies = &[_]*const Feature { + &feature_dontWidenVmovs, + }, +}; + +pub const feature_strictAlign = Feature{ + .name = "strictAlign", + .llvm_name = "strict-align", + .description = "Disallow all unaligned memory access", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_thumb2 = Feature{ + .name = "thumb2", + .llvm_name = "thumb2", + .description = "Enable Thumb2 instructions", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_trustzone = Feature{ + .name = "trustzone", + .llvm_name = "trustzone", + .description = "Enable support for TrustZone security extensions", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_useAa = Feature{ + .name = "useAa", + .llvm_name = "use-aa", + .description = "Use alias analysis during codegen", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_useMisched = Feature{ + .name = "useMisched", + .llvm_name = "use-misched", + .description = "Use the MachineScheduler", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_wideStrideVfp = Feature{ + .name = "wideStrideVfp", + .llvm_name = "wide-stride-vfp", + .description = "Use a wide stride when allocating VFP registers", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_v7clrex = Feature{ + .name = "v7clrex", + .llvm_name = "v7clrex", + .description = "Has v7 clrex instruction", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_vfp2 = Feature{ + .name = "vfp2", + .llvm_name = "vfp2", + .description = "Enable VFP2 instructions", + .dependencies = &[_]*const Feature { + &feature_d32, + &feature_fpregs, + }, +}; + +pub const feature_vfp2d16 = Feature{ + .name = "vfp2d16", + .llvm_name = "vfp2d16", + .description = "Enable VFP2 instructions with only 16 d-registers", + .dependencies = &[_]*const Feature { + &feature_fpregs, + }, +}; + +pub const feature_vfp2d16sp = Feature{ + .name = "vfp2d16sp", + .llvm_name = "vfp2d16sp", + .description = "Enable VFP2 instructions with only 16 d-registers and no double precision", + .dependencies = &[_]*const Feature { + &feature_fpregs, + }, +}; + +pub const feature_vfp2sp = Feature{ + .name = "vfp2sp", + .llvm_name = "vfp2sp", + .description = "Enable VFP2 instructions with no double precision", + .dependencies = &[_]*const Feature { + &feature_fpregs, + &feature_d32, + }, +}; + +pub const feature_vfp3 = Feature{ + .name = "vfp3", + .llvm_name = "vfp3", + .description = "Enable VFP3 instructions", + .dependencies = &[_]*const Feature { + &feature_fpregs, + &feature_d32, + }, +}; + +pub const feature_vfp3d16 = Feature{ + .name = "vfp3d16", + .llvm_name = "vfp3d16", + .description = "Enable VFP3 instructions with only 16 d-registers", + .dependencies = &[_]*const Feature { + &feature_fpregs, + }, +}; + +pub const feature_vfp3d16sp = Feature{ + .name = "vfp3d16sp", + .llvm_name = "vfp3d16sp", + .description = "Enable VFP3 instructions with only 16 d-registers and no double precision", + .dependencies = &[_]*const Feature { + &feature_fpregs, + }, +}; + +pub const feature_vfp3sp = Feature{ + .name = "vfp3sp", + .llvm_name = "vfp3sp", + .description = "Enable VFP3 instructions with no double precision", + .dependencies = &[_]*const Feature { + &feature_fpregs, + &feature_d32, + }, +}; + +pub const feature_vfp4 = Feature{ + .name = "vfp4", + .llvm_name = "vfp4", + .description = "Enable VFP4 instructions", + .dependencies = &[_]*const Feature { + &feature_fp16, + &feature_d32, + &feature_fpregs, + }, +}; + +pub const feature_vfp4d16 = Feature{ + .name = "vfp4d16", + .llvm_name = "vfp4d16", + .description = "Enable VFP4 instructions with only 16 d-registers", + .dependencies = &[_]*const Feature { + &feature_fp16, + &feature_fpregs, + }, +}; + +pub const feature_vfp4d16sp = Feature{ + .name = "vfp4d16sp", + .llvm_name = "vfp4d16sp", + .description = "Enable VFP4 instructions with only 16 d-registers and no double precision", + .dependencies = &[_]*const Feature { + &feature_fp16, + &feature_fpregs, + }, +}; + +pub const feature_vfp4sp = Feature{ + .name = "vfp4sp", + .llvm_name = "vfp4sp", + .description = "Enable VFP4 instructions with no double precision", + .dependencies = &[_]*const Feature { + &feature_fp16, + &feature_fpregs, + &feature_d32, + }, +}; + +pub const feature_vmlxForwarding = Feature{ + .name = "vmlxForwarding", + .llvm_name = "vmlx-forwarding", + .description = "Has multiplier accumulator forwarding", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_virtualization = Feature{ + .name = "virtualization", + .llvm_name = "virtualization", + .description = "Supports Virtualization extension", + .dependencies = &[_]*const Feature { + &feature_hwdiv, + &feature_hwdivArm, + }, +}; + +pub const feature_zcz = Feature{ + .name = "zcz", + .llvm_name = "zcz", + .description = "Has zero-cycle zeroing instructions", + .dependencies = &[_]*const Feature { + }, +}; + +pub const features = &[_]*const Feature { + &feature_msecext8, + &feature_aclass, + &feature_aes, + &feature_acquireRelease, + &feature_avoidMovsShop, + &feature_avoidPartialCpsr, + &feature_crc, + &feature_cheapPredicableCpsr, + &feature_vldnAlign, + &feature_crypto, + &feature_d32, + &feature_db, + &feature_dfb, + &feature_dsp, + &feature_dontWidenVmovs, + &feature_dotprod, + &feature_executeOnly, + &feature_expandFpMlx, + &feature_fp16, + &feature_fp16fml, + &feature_fp64, + &feature_fpao, + &feature_fpArmv8, + &feature_fpArmv8d16, + &feature_fpArmv8d16sp, + &feature_fpArmv8sp, + &feature_fpregs, + &feature_fpregs16, + &feature_fpregs64, + &feature_fullfp16, + &feature_fuseAes, + &feature_fuseLiterals, + &feature_hwdivArm, + &feature_hwdiv, + &feature_noBranchPredictor, + &feature_retAddrStack, + &feature_slowfpvmlx, + &feature_vmlxHazards, + &feature_lob, + &feature_longCalls, + &feature_mclass, + &feature_mp, + &feature_muxedUnits, + &feature_neon, + &feature_neonfp, + &feature_neonFpmovs, + &feature_naclTrap, + &feature_noarm, + &feature_noMovt, + &feature_noNegImmediates, + &feature_disablePostraScheduler, + &feature_nonpipelinedVfp, + &feature_perfmon, + &feature_bit32, + &feature_preferIshst, + &feature_loopAlign, + &feature_preferVmovsr, + &feature_profUnpr, + &feature_ras, + &feature_rclass, + &feature_readTpHard, + &feature_reserveR9, + &feature_sb, + &feature_sha2, + &feature_slowFpBrcc, + &feature_slowLoadDSubreg, + &feature_slowOddReg, + &feature_slowVdup32, + &feature_slowVgetlni32, + &feature_splatVfpNeon, + &feature_strictAlign, + &feature_thumb2, + &feature_trustzone, + &feature_useAa, + &feature_useMisched, + &feature_wideStrideVfp, + &feature_v7clrex, + &feature_vfp2, + &feature_vfp2d16, + &feature_vfp2d16sp, + &feature_vfp2sp, + &feature_vfp3, + &feature_vfp3d16, + &feature_vfp3d16sp, + &feature_vfp3sp, + &feature_vfp4, + &feature_vfp4d16, + &feature_vfp4d16sp, + &feature_vfp4sp, + &feature_vmlxForwarding, + &feature_virtualization, + &feature_zcz, +}; + +pub const cpu_arm1020e = Cpu{ + .name = "arm1020e", + .llvm_name = "arm1020e", + .dependencies = &[_]*const Feature { + }, +}; + +pub const cpu_arm1020t = Cpu{ + .name = "arm1020t", + .llvm_name = "arm1020t", + .dependencies = &[_]*const Feature { + }, +}; + +pub const cpu_arm1022e = Cpu{ + .name = "arm1022e", + .llvm_name = "arm1022e", + .dependencies = &[_]*const Feature { + }, +}; + +pub const cpu_arm10e = Cpu{ + .name = "arm10e", + .llvm_name = "arm10e", + .dependencies = &[_]*const Feature { + }, +}; + +pub const cpu_arm10tdmi = Cpu{ + .name = "arm10tdmi", + .llvm_name = "arm10tdmi", + .dependencies = &[_]*const Feature { + }, +}; + +pub const cpu_arm1136jS = Cpu{ + .name = "arm1136jS", + .llvm_name = "arm1136j-s", + .dependencies = &[_]*const Feature { + &feature_dsp, + }, +}; + +pub const cpu_arm1136jfS = Cpu{ + .name = "arm1136jfS", + .llvm_name = "arm1136jf-s", + .dependencies = &[_]*const Feature { + &feature_dsp, + &feature_slowfpvmlx, + &feature_d32, + &feature_fpregs, + &feature_vfp2, + }, +}; + +pub const cpu_arm1156t2S = Cpu{ + .name = "arm1156t2S", + .llvm_name = "arm1156t2-s", + .dependencies = &[_]*const Feature { + &feature_dsp, + &feature_thumb2, + }, +}; + +pub const cpu_arm1156t2fS = Cpu{ + .name = "arm1156t2fS", + .llvm_name = "arm1156t2f-s", + .dependencies = &[_]*const Feature { + &feature_dsp, + &feature_thumb2, + &feature_slowfpvmlx, + &feature_d32, + &feature_fpregs, + &feature_vfp2, + }, +}; + +pub const cpu_arm1176jS = Cpu{ + .name = "arm1176jS", + .llvm_name = "arm1176j-s", + .dependencies = &[_]*const Feature { + &feature_trustzone, + }, +}; + +pub const cpu_arm1176jzS = Cpu{ + .name = "arm1176jzS", + .llvm_name = "arm1176jz-s", + .dependencies = &[_]*const Feature { + &feature_trustzone, + }, +}; + +pub const cpu_arm1176jzfS = Cpu{ + .name = "arm1176jzfS", + .llvm_name = "arm1176jzf-s", + .dependencies = &[_]*const Feature { + &feature_trustzone, + &feature_slowfpvmlx, + &feature_d32, + &feature_fpregs, + &feature_vfp2, + }, +}; + +pub const cpu_arm710t = Cpu{ + .name = "arm710t", + .llvm_name = "arm710t", + .dependencies = &[_]*const Feature { + }, +}; + +pub const cpu_arm720t = Cpu{ + .name = "arm720t", + .llvm_name = "arm720t", + .dependencies = &[_]*const Feature { + }, +}; + +pub const cpu_arm7tdmi = Cpu{ + .name = "arm7tdmi", + .llvm_name = "arm7tdmi", + .dependencies = &[_]*const Feature { + }, +}; + +pub const cpu_arm7tdmiS = Cpu{ + .name = "arm7tdmiS", + .llvm_name = "arm7tdmi-s", + .dependencies = &[_]*const Feature { + }, +}; + +pub const cpu_arm8 = Cpu{ + .name = "arm8", + .llvm_name = "arm8", + .dependencies = &[_]*const Feature { + }, +}; + +pub const cpu_arm810 = Cpu{ + .name = "arm810", + .llvm_name = "arm810", + .dependencies = &[_]*const Feature { + }, +}; + +pub const cpu_arm9 = Cpu{ + .name = "arm9", + .llvm_name = "arm9", + .dependencies = &[_]*const Feature { + }, +}; + +pub const cpu_arm920 = Cpu{ + .name = "arm920", + .llvm_name = "arm920", + .dependencies = &[_]*const Feature { + }, +}; + +pub const cpu_arm920t = Cpu{ + .name = "arm920t", + .llvm_name = "arm920t", + .dependencies = &[_]*const Feature { + }, +}; + +pub const cpu_arm922t = Cpu{ + .name = "arm922t", + .llvm_name = "arm922t", + .dependencies = &[_]*const Feature { + }, +}; + +pub const cpu_arm926ejS = Cpu{ + .name = "arm926ejS", + .llvm_name = "arm926ej-s", + .dependencies = &[_]*const Feature { + }, +}; + +pub const cpu_arm940t = Cpu{ + .name = "arm940t", + .llvm_name = "arm940t", + .dependencies = &[_]*const Feature { + }, +}; + +pub const cpu_arm946eS = Cpu{ + .name = "arm946eS", + .llvm_name = "arm946e-s", + .dependencies = &[_]*const Feature { + }, +}; + +pub const cpu_arm966eS = Cpu{ + .name = "arm966eS", + .llvm_name = "arm966e-s", + .dependencies = &[_]*const Feature { + }, +}; + +pub const cpu_arm968eS = Cpu{ + .name = "arm968eS", + .llvm_name = "arm968e-s", + .dependencies = &[_]*const Feature { + }, +}; + +pub const cpu_arm9e = Cpu{ + .name = "arm9e", + .llvm_name = "arm9e", + .dependencies = &[_]*const Feature { + }, +}; + +pub const cpu_arm9tdmi = Cpu{ + .name = "arm9tdmi", + .llvm_name = "arm9tdmi", + .dependencies = &[_]*const Feature { + }, +}; + +pub const cpu_cortexA12 = Cpu{ + .name = "cortexA12", + .llvm_name = "cortex-a12", + .dependencies = &[_]*const Feature { + &feature_d32, + &feature_dsp, + &feature_thumb2, + &feature_db, + &feature_aclass, + &feature_fpregs, + &feature_v7clrex, + &feature_perfmon, + &feature_avoidPartialCpsr, + &feature_retAddrStack, + &feature_mp, + &feature_trustzone, + &feature_fp16, + &feature_vfp4, + &feature_vmlxForwarding, + &feature_hwdiv, + &feature_hwdivArm, + &feature_virtualization, + }, +}; + +pub const cpu_cortexA15 = Cpu{ + .name = "cortexA15", + .llvm_name = "cortex-a15", + .dependencies = &[_]*const Feature { + &feature_d32, + &feature_dsp, + &feature_thumb2, + &feature_db, + &feature_aclass, + &feature_fpregs, + &feature_v7clrex, + &feature_perfmon, + &feature_avoidPartialCpsr, + &feature_vldnAlign, + &feature_dontWidenVmovs, + &feature_retAddrStack, + &feature_mp, + &feature_muxedUnits, + &feature_splatVfpNeon, + &feature_trustzone, + &feature_fp16, + &feature_vfp4, + &feature_hwdiv, + &feature_hwdivArm, + &feature_virtualization, + }, +}; + +pub const cpu_cortexA17 = Cpu{ + .name = "cortexA17", + .llvm_name = "cortex-a17", + .dependencies = &[_]*const Feature { + &feature_d32, + &feature_dsp, + &feature_thumb2, + &feature_db, + &feature_aclass, + &feature_fpregs, + &feature_v7clrex, + &feature_perfmon, + &feature_avoidPartialCpsr, + &feature_retAddrStack, + &feature_mp, + &feature_trustzone, + &feature_fp16, + &feature_vfp4, + &feature_vmlxForwarding, + &feature_hwdiv, + &feature_hwdivArm, + &feature_virtualization, + }, +}; + +pub const cpu_cortexA32 = Cpu{ + .name = "cortexA32", + .llvm_name = "cortex-a32", + .dependencies = &[_]*const Feature { + &feature_hwdiv, + &feature_mp, + &feature_d32, + &feature_dsp, + &feature_thumb2, + &feature_db, + &feature_aclass, + &feature_fpregs, + &feature_trustzone, + &feature_crc, + &feature_fp16, + &feature_acquireRelease, + &feature_v7clrex, + &feature_perfmon, + &feature_hwdivArm, + &feature_crypto, + }, +}; + +pub const cpu_cortexA35 = Cpu{ + .name = "cortexA35", + .llvm_name = "cortex-a35", + .dependencies = &[_]*const Feature { + &feature_hwdiv, + &feature_mp, + &feature_d32, + &feature_dsp, + &feature_thumb2, + &feature_db, + &feature_aclass, + &feature_fpregs, + &feature_trustzone, + &feature_crc, + &feature_fp16, + &feature_acquireRelease, + &feature_v7clrex, + &feature_perfmon, + &feature_hwdivArm, + &feature_crypto, + }, +}; + +pub const cpu_cortexA5 = Cpu{ + .name = "cortexA5", + .llvm_name = "cortex-a5", + .dependencies = &[_]*const Feature { + &feature_d32, + &feature_dsp, + &feature_thumb2, + &feature_db, + &feature_aclass, + &feature_fpregs, + &feature_v7clrex, + &feature_perfmon, + &feature_retAddrStack, + &feature_slowfpvmlx, + &feature_mp, + &feature_slowFpBrcc, + &feature_trustzone, + &feature_fp16, + &feature_vfp4, + &feature_vmlxForwarding, + }, +}; + +pub const cpu_cortexA53 = Cpu{ + .name = "cortexA53", + .llvm_name = "cortex-a53", + .dependencies = &[_]*const Feature { + &feature_hwdiv, + &feature_mp, + &feature_d32, + &feature_dsp, + &feature_thumb2, + &feature_db, + &feature_aclass, + &feature_fpregs, + &feature_trustzone, + &feature_crc, + &feature_fp16, + &feature_acquireRelease, + &feature_v7clrex, + &feature_perfmon, + &feature_hwdivArm, + &feature_crypto, + &feature_fpao, + }, +}; + +pub const cpu_cortexA55 = Cpu{ + .name = "cortexA55", + .llvm_name = "cortex-a55", + .dependencies = &[_]*const Feature { + &feature_hwdiv, + &feature_mp, + &feature_d32, + &feature_dsp, + &feature_thumb2, + &feature_db, + &feature_aclass, + &feature_fpregs, + &feature_trustzone, + &feature_crc, + &feature_fp16, + &feature_acquireRelease, + &feature_v7clrex, + &feature_perfmon, + &feature_hwdivArm, + &feature_ras, + &feature_dotprod, + }, +}; + +pub const cpu_cortexA57 = Cpu{ + .name = "cortexA57", + .llvm_name = "cortex-a57", + .dependencies = &[_]*const Feature { + &feature_hwdiv, + &feature_mp, + &feature_d32, + &feature_dsp, + &feature_thumb2, + &feature_db, + &feature_aclass, + &feature_fpregs, + &feature_trustzone, + &feature_crc, + &feature_fp16, + &feature_acquireRelease, + &feature_v7clrex, + &feature_perfmon, + &feature_hwdivArm, + &feature_avoidPartialCpsr, + &feature_cheapPredicableCpsr, + &feature_crypto, + &feature_fpao, + }, +}; + +pub const cpu_cortexA7 = Cpu{ + .name = "cortexA7", + .llvm_name = "cortex-a7", + .dependencies = &[_]*const Feature { + &feature_d32, + &feature_dsp, + &feature_thumb2, + &feature_db, + &feature_aclass, + &feature_fpregs, + &feature_v7clrex, + &feature_perfmon, + &feature_retAddrStack, + &feature_slowfpvmlx, + &feature_vmlxHazards, + &feature_mp, + &feature_slowFpBrcc, + &feature_trustzone, + &feature_fp16, + &feature_vfp4, + &feature_vmlxForwarding, + &feature_hwdiv, + &feature_hwdivArm, + &feature_virtualization, + }, +}; + +pub const cpu_cortexA72 = Cpu{ + .name = "cortexA72", + .llvm_name = "cortex-a72", + .dependencies = &[_]*const Feature { + &feature_hwdiv, + &feature_mp, + &feature_d32, + &feature_dsp, + &feature_thumb2, + &feature_db, + &feature_aclass, + &feature_fpregs, + &feature_trustzone, + &feature_crc, + &feature_fp16, + &feature_acquireRelease, + &feature_v7clrex, + &feature_perfmon, + &feature_hwdivArm, + &feature_crypto, + }, +}; + +pub const cpu_cortexA73 = Cpu{ + .name = "cortexA73", + .llvm_name = "cortex-a73", + .dependencies = &[_]*const Feature { + &feature_hwdiv, + &feature_mp, + &feature_d32, + &feature_dsp, + &feature_thumb2, + &feature_db, + &feature_aclass, + &feature_fpregs, + &feature_trustzone, + &feature_crc, + &feature_fp16, + &feature_acquireRelease, + &feature_v7clrex, + &feature_perfmon, + &feature_hwdivArm, + &feature_crypto, + }, +}; + +pub const cpu_cortexA75 = Cpu{ + .name = "cortexA75", + .llvm_name = "cortex-a75", + .dependencies = &[_]*const Feature { + &feature_hwdiv, + &feature_mp, + &feature_d32, + &feature_dsp, + &feature_thumb2, + &feature_db, + &feature_aclass, + &feature_fpregs, + &feature_trustzone, + &feature_crc, + &feature_fp16, + &feature_acquireRelease, + &feature_v7clrex, + &feature_perfmon, + &feature_hwdivArm, + &feature_ras, + &feature_dotprod, + }, +}; + +pub const cpu_cortexA76 = Cpu{ + .name = "cortexA76", + .llvm_name = "cortex-a76", + .dependencies = &[_]*const Feature { + &feature_hwdiv, + &feature_mp, + &feature_d32, + &feature_dsp, + &feature_thumb2, + &feature_db, + &feature_aclass, + &feature_fpregs, + &feature_trustzone, + &feature_crc, + &feature_fp16, + &feature_acquireRelease, + &feature_v7clrex, + &feature_perfmon, + &feature_hwdivArm, + &feature_ras, + &feature_crypto, + &feature_dotprod, + &feature_fullfp16, + }, +}; + +pub const cpu_cortexA76ae = Cpu{ + .name = "cortexA76ae", + .llvm_name = "cortex-a76ae", + .dependencies = &[_]*const Feature { + &feature_hwdiv, + &feature_mp, + &feature_d32, + &feature_dsp, + &feature_thumb2, + &feature_db, + &feature_aclass, + &feature_fpregs, + &feature_trustzone, + &feature_crc, + &feature_fp16, + &feature_acquireRelease, + &feature_v7clrex, + &feature_perfmon, + &feature_hwdivArm, + &feature_ras, + &feature_crypto, + &feature_dotprod, + &feature_fullfp16, + }, +}; + +pub const cpu_cortexA8 = Cpu{ + .name = "cortexA8", + .llvm_name = "cortex-a8", + .dependencies = &[_]*const Feature { + &feature_d32, + &feature_dsp, + &feature_thumb2, + &feature_db, + &feature_aclass, + &feature_fpregs, + &feature_v7clrex, + &feature_perfmon, + &feature_retAddrStack, + &feature_slowfpvmlx, + &feature_vmlxHazards, + &feature_nonpipelinedVfp, + &feature_slowFpBrcc, + &feature_trustzone, + &feature_vmlxForwarding, + }, +}; + +pub const cpu_cortexA9 = Cpu{ + .name = "cortexA9", + .llvm_name = "cortex-a9", + .dependencies = &[_]*const Feature { + &feature_d32, + &feature_dsp, + &feature_thumb2, + &feature_db, + &feature_aclass, + &feature_fpregs, + &feature_v7clrex, + &feature_perfmon, + &feature_avoidPartialCpsr, + &feature_vldnAlign, + &feature_expandFpMlx, + &feature_fp16, + &feature_retAddrStack, + &feature_vmlxHazards, + &feature_mp, + &feature_muxedUnits, + &feature_neonFpmovs, + &feature_preferVmovsr, + &feature_trustzone, + &feature_vmlxForwarding, + }, +}; + +pub const cpu_cortexM0 = Cpu{ + .name = "cortexM0", + .llvm_name = "cortex-m0", + .dependencies = &[_]*const Feature { + &feature_mclass, + &feature_db, + &feature_noarm, + &feature_strictAlign, + }, +}; + +pub const cpu_cortexM0plus = Cpu{ + .name = "cortexM0plus", + .llvm_name = "cortex-m0plus", + .dependencies = &[_]*const Feature { + &feature_mclass, + &feature_db, + &feature_noarm, + &feature_strictAlign, + }, +}; + +pub const cpu_cortexM1 = Cpu{ + .name = "cortexM1", + .llvm_name = "cortex-m1", + .dependencies = &[_]*const Feature { + &feature_mclass, + &feature_db, + &feature_noarm, + &feature_strictAlign, + }, +}; + +pub const cpu_cortexM23 = Cpu{ + .name = "cortexM23", + .llvm_name = "cortex-m23", + .dependencies = &[_]*const Feature { + &feature_hwdiv, + &feature_mclass, + &feature_db, + &feature_acquireRelease, + &feature_v7clrex, + &feature_noarm, + &feature_msecext8, + &feature_strictAlign, + &feature_noMovt, + }, +}; + +pub const cpu_cortexM3 = Cpu{ + .name = "cortexM3", + .llvm_name = "cortex-m3", + .dependencies = &[_]*const Feature { + &feature_hwdiv, + &feature_thumb2, + &feature_mclass, + &feature_db, + &feature_v7clrex, + &feature_perfmon, + &feature_noarm, + &feature_noBranchPredictor, + &feature_loopAlign, + &feature_useAa, + &feature_useMisched, + }, +}; + +pub const cpu_cortexM33 = Cpu{ + .name = "cortexM33", + .llvm_name = "cortex-m33", + .dependencies = &[_]*const Feature { + &feature_hwdiv, + &feature_thumb2, + &feature_mclass, + &feature_db, + &feature_acquireRelease, + &feature_v7clrex, + &feature_perfmon, + &feature_noarm, + &feature_msecext8, + &feature_dsp, + &feature_fp16, + &feature_fpregs, + &feature_fpArmv8d16sp, + &feature_noBranchPredictor, + &feature_slowfpvmlx, + &feature_loopAlign, + &feature_useAa, + &feature_useMisched, + }, +}; + +pub const cpu_cortexM35p = Cpu{ + .name = "cortexM35p", + .llvm_name = "cortex-m35p", + .dependencies = &[_]*const Feature { + &feature_hwdiv, + &feature_thumb2, + &feature_mclass, + &feature_db, + &feature_acquireRelease, + &feature_v7clrex, + &feature_perfmon, + &feature_noarm, + &feature_msecext8, + &feature_dsp, + &feature_fp16, + &feature_fpregs, + &feature_fpArmv8d16sp, + &feature_noBranchPredictor, + &feature_slowfpvmlx, + &feature_loopAlign, + &feature_useAa, + &feature_useMisched, + }, +}; + +pub const cpu_cortexM4 = Cpu{ + .name = "cortexM4", + .llvm_name = "cortex-m4", + .dependencies = &[_]*const Feature { + &feature_hwdiv, + &feature_dsp, + &feature_thumb2, + &feature_mclass, + &feature_db, + &feature_v7clrex, + &feature_perfmon, + &feature_noarm, + &feature_noBranchPredictor, + &feature_slowfpvmlx, + &feature_loopAlign, + &feature_useAa, + &feature_useMisched, + &feature_fp16, + &feature_fpregs, + &feature_vfp4d16sp, + }, +}; + +pub const cpu_cortexM7 = Cpu{ + .name = "cortexM7", + .llvm_name = "cortex-m7", + .dependencies = &[_]*const Feature { + &feature_hwdiv, + &feature_dsp, + &feature_thumb2, + &feature_mclass, + &feature_db, + &feature_v7clrex, + &feature_perfmon, + &feature_noarm, + &feature_fp16, + &feature_fpregs, + &feature_fpArmv8d16, + }, +}; + +pub const cpu_cortexR4 = Cpu{ + .name = "cortexR4", + .llvm_name = "cortex-r4", + .dependencies = &[_]*const Feature { + &feature_hwdiv, + &feature_dsp, + &feature_rclass, + &feature_thumb2, + &feature_db, + &feature_v7clrex, + &feature_perfmon, + &feature_avoidPartialCpsr, + &feature_retAddrStack, + }, +}; + +pub const cpu_cortexR4f = Cpu{ + .name = "cortexR4f", + .llvm_name = "cortex-r4f", + .dependencies = &[_]*const Feature { + &feature_hwdiv, + &feature_dsp, + &feature_rclass, + &feature_thumb2, + &feature_db, + &feature_v7clrex, + &feature_perfmon, + &feature_avoidPartialCpsr, + &feature_retAddrStack, + &feature_slowfpvmlx, + &feature_slowFpBrcc, + &feature_fpregs, + &feature_vfp3d16, + }, +}; + +pub const cpu_cortexR5 = Cpu{ + .name = "cortexR5", + .llvm_name = "cortex-r5", + .dependencies = &[_]*const Feature { + &feature_hwdiv, + &feature_dsp, + &feature_rclass, + &feature_thumb2, + &feature_db, + &feature_v7clrex, + &feature_perfmon, + &feature_avoidPartialCpsr, + &feature_hwdivArm, + &feature_retAddrStack, + &feature_slowfpvmlx, + &feature_slowFpBrcc, + &feature_fpregs, + &feature_vfp3d16, + }, +}; + +pub const cpu_cortexR52 = Cpu{ + .name = "cortexR52", + .llvm_name = "cortex-r52", + .dependencies = &[_]*const Feature { + &feature_hwdiv, + &feature_dfb, + &feature_mp, + &feature_d32, + &feature_dsp, + &feature_rclass, + &feature_thumb2, + &feature_db, + &feature_fpregs, + &feature_crc, + &feature_fp16, + &feature_acquireRelease, + &feature_v7clrex, + &feature_perfmon, + &feature_hwdivArm, + &feature_fpao, + &feature_useAa, + &feature_useMisched, + }, +}; + +pub const cpu_cortexR7 = Cpu{ + .name = "cortexR7", + .llvm_name = "cortex-r7", + .dependencies = &[_]*const Feature { + &feature_hwdiv, + &feature_dsp, + &feature_rclass, + &feature_thumb2, + &feature_db, + &feature_v7clrex, + &feature_perfmon, + &feature_avoidPartialCpsr, + &feature_fp16, + &feature_hwdivArm, + &feature_retAddrStack, + &feature_slowfpvmlx, + &feature_mp, + &feature_slowFpBrcc, + &feature_fpregs, + &feature_vfp3d16, + }, +}; + +pub const cpu_cortexR8 = Cpu{ + .name = "cortexR8", + .llvm_name = "cortex-r8", + .dependencies = &[_]*const Feature { + &feature_hwdiv, + &feature_dsp, + &feature_rclass, + &feature_thumb2, + &feature_db, + &feature_v7clrex, + &feature_perfmon, + &feature_avoidPartialCpsr, + &feature_fp16, + &feature_hwdivArm, + &feature_retAddrStack, + &feature_slowfpvmlx, + &feature_mp, + &feature_slowFpBrcc, + &feature_fpregs, + &feature_vfp3d16, + }, +}; + +pub const cpu_cyclone = Cpu{ + .name = "cyclone", + .llvm_name = "cyclone", + .dependencies = &[_]*const Feature { + &feature_hwdiv, + &feature_mp, + &feature_d32, + &feature_dsp, + &feature_thumb2, + &feature_db, + &feature_aclass, + &feature_fpregs, + &feature_trustzone, + &feature_crc, + &feature_fp16, + &feature_acquireRelease, + &feature_v7clrex, + &feature_perfmon, + &feature_hwdivArm, + &feature_avoidMovsShop, + &feature_avoidPartialCpsr, + &feature_crypto, + &feature_retAddrStack, + &feature_slowfpvmlx, + &feature_neonfp, + &feature_disablePostraScheduler, + &feature_useMisched, + &feature_vfp4, + &feature_zcz, + }, +}; + +pub const cpu_ep9312 = Cpu{ + .name = "ep9312", + .llvm_name = "ep9312", + .dependencies = &[_]*const Feature { + }, +}; + +pub const cpu_exynosM1 = Cpu{ + .name = "exynosM1", + .llvm_name = "exynos-m1", + .dependencies = &[_]*const Feature { + &feature_hwdiv, + &feature_mp, + &feature_d32, + &feature_dsp, + &feature_thumb2, + &feature_db, + &feature_aclass, + &feature_fpregs, + &feature_trustzone, + &feature_crc, + &feature_fp16, + &feature_acquireRelease, + &feature_v7clrex, + &feature_perfmon, + &feature_hwdivArm, + &feature_fuseLiterals, + &feature_useAa, + &feature_wideStrideVfp, + &feature_slowVgetlni32, + &feature_slowVdup32, + &feature_profUnpr, + &feature_slowFpBrcc, + &feature_retAddrStack, + &feature_zcz, + &feature_slowfpvmlx, + &feature_expandFpMlx, + &feature_fuseAes, + &feature_dontWidenVmovs, + }, +}; + +pub const cpu_exynosM2 = Cpu{ + .name = "exynosM2", + .llvm_name = "exynos-m2", + .dependencies = &[_]*const Feature { + &feature_hwdiv, + &feature_mp, + &feature_d32, + &feature_dsp, + &feature_thumb2, + &feature_db, + &feature_aclass, + &feature_fpregs, + &feature_trustzone, + &feature_crc, + &feature_fp16, + &feature_acquireRelease, + &feature_v7clrex, + &feature_perfmon, + &feature_hwdivArm, + &feature_fuseLiterals, + &feature_useAa, + &feature_wideStrideVfp, + &feature_slowVgetlni32, + &feature_slowVdup32, + &feature_profUnpr, + &feature_slowFpBrcc, + &feature_retAddrStack, + &feature_zcz, + &feature_slowfpvmlx, + &feature_expandFpMlx, + &feature_fuseAes, + &feature_dontWidenVmovs, + }, +}; + +pub const cpu_exynosM3 = Cpu{ + .name = "exynosM3", + .llvm_name = "exynos-m3", + .dependencies = &[_]*const Feature { + &feature_hwdiv, + &feature_mp, + &feature_d32, + &feature_dsp, + &feature_thumb2, + &feature_db, + &feature_aclass, + &feature_fpregs, + &feature_trustzone, + &feature_crc, + &feature_fp16, + &feature_acquireRelease, + &feature_v7clrex, + &feature_perfmon, + &feature_hwdivArm, + &feature_fuseLiterals, + &feature_useAa, + &feature_wideStrideVfp, + &feature_slowVgetlni32, + &feature_slowVdup32, + &feature_profUnpr, + &feature_slowFpBrcc, + &feature_retAddrStack, + &feature_zcz, + &feature_slowfpvmlx, + &feature_expandFpMlx, + &feature_fuseAes, + &feature_dontWidenVmovs, + }, +}; + +pub const cpu_exynosM4 = Cpu{ + .name = "exynosM4", + .llvm_name = "exynos-m4", + .dependencies = &[_]*const Feature { + &feature_hwdiv, + &feature_mp, + &feature_d32, + &feature_dsp, + &feature_thumb2, + &feature_db, + &feature_aclass, + &feature_fpregs, + &feature_trustzone, + &feature_crc, + &feature_fp16, + &feature_acquireRelease, + &feature_v7clrex, + &feature_perfmon, + &feature_hwdivArm, + &feature_ras, + &feature_dotprod, + &feature_fullfp16, + &feature_fuseLiterals, + &feature_useAa, + &feature_wideStrideVfp, + &feature_slowVgetlni32, + &feature_slowVdup32, + &feature_profUnpr, + &feature_slowFpBrcc, + &feature_retAddrStack, + &feature_zcz, + &feature_slowfpvmlx, + &feature_expandFpMlx, + &feature_fuseAes, + &feature_dontWidenVmovs, + }, +}; + +pub const cpu_exynosM5 = Cpu{ + .name = "exynosM5", + .llvm_name = "exynos-m5", + .dependencies = &[_]*const Feature { + &feature_hwdiv, + &feature_mp, + &feature_d32, + &feature_dsp, + &feature_thumb2, + &feature_db, + &feature_aclass, + &feature_fpregs, + &feature_trustzone, + &feature_crc, + &feature_fp16, + &feature_acquireRelease, + &feature_v7clrex, + &feature_perfmon, + &feature_hwdivArm, + &feature_ras, + &feature_dotprod, + &feature_fullfp16, + &feature_fuseLiterals, + &feature_useAa, + &feature_wideStrideVfp, + &feature_slowVgetlni32, + &feature_slowVdup32, + &feature_profUnpr, + &feature_slowFpBrcc, + &feature_retAddrStack, + &feature_zcz, + &feature_slowfpvmlx, + &feature_expandFpMlx, + &feature_fuseAes, + &feature_dontWidenVmovs, + }, +}; + +pub const cpu_generic = Cpu{ + .name = "generic", + .llvm_name = "generic", + .dependencies = &[_]*const Feature { + }, +}; + +pub const cpu_iwmmxt = Cpu{ + .name = "iwmmxt", + .llvm_name = "iwmmxt", + .dependencies = &[_]*const Feature { + }, +}; + +pub const cpu_krait = Cpu{ + .name = "krait", + .llvm_name = "krait", + .dependencies = &[_]*const Feature { + &feature_d32, + &feature_dsp, + &feature_thumb2, + &feature_db, + &feature_aclass, + &feature_fpregs, + &feature_v7clrex, + &feature_perfmon, + &feature_avoidPartialCpsr, + &feature_vldnAlign, + &feature_fp16, + &feature_hwdivArm, + &feature_hwdiv, + &feature_retAddrStack, + &feature_muxedUnits, + &feature_vfp4, + &feature_vmlxForwarding, + }, +}; + +pub const cpu_kryo = Cpu{ + .name = "kryo", + .llvm_name = "kryo", + .dependencies = &[_]*const Feature { + &feature_hwdiv, + &feature_mp, + &feature_d32, + &feature_dsp, + &feature_thumb2, + &feature_db, + &feature_aclass, + &feature_fpregs, + &feature_trustzone, + &feature_crc, + &feature_fp16, + &feature_acquireRelease, + &feature_v7clrex, + &feature_perfmon, + &feature_hwdivArm, + &feature_crypto, + }, +}; + +pub const cpu_mpcore = Cpu{ + .name = "mpcore", + .llvm_name = "mpcore", + .dependencies = &[_]*const Feature { + &feature_slowfpvmlx, + &feature_d32, + &feature_fpregs, + &feature_vfp2, + }, +}; + +pub const cpu_mpcorenovfp = Cpu{ + .name = "mpcorenovfp", + .llvm_name = "mpcorenovfp", + .dependencies = &[_]*const Feature { + }, +}; + +pub const cpu_sc000 = Cpu{ + .name = "sc000", + .llvm_name = "sc000", + .dependencies = &[_]*const Feature { + &feature_mclass, + &feature_db, + &feature_noarm, + &feature_strictAlign, + }, +}; + +pub const cpu_sc300 = Cpu{ + .name = "sc300", + .llvm_name = "sc300", + .dependencies = &[_]*const Feature { + &feature_hwdiv, + &feature_thumb2, + &feature_mclass, + &feature_db, + &feature_v7clrex, + &feature_perfmon, + &feature_noarm, + &feature_noBranchPredictor, + &feature_useAa, + &feature_useMisched, + }, +}; + +pub const cpu_strongarm = Cpu{ + .name = "strongarm", + .llvm_name = "strongarm", + .dependencies = &[_]*const Feature { + }, +}; + +pub const cpu_strongarm110 = Cpu{ + .name = "strongarm110", + .llvm_name = "strongarm110", + .dependencies = &[_]*const Feature { + }, +}; + +pub const cpu_strongarm1100 = Cpu{ + .name = "strongarm1100", + .llvm_name = "strongarm1100", + .dependencies = &[_]*const Feature { + }, +}; + +pub const cpu_strongarm1110 = Cpu{ + .name = "strongarm1110", + .llvm_name = "strongarm1110", + .dependencies = &[_]*const Feature { + }, +}; + +pub const cpu_swift = Cpu{ + .name = "swift", + .llvm_name = "swift", + .dependencies = &[_]*const Feature { + &feature_d32, + &feature_dsp, + &feature_thumb2, + &feature_db, + &feature_aclass, + &feature_fpregs, + &feature_v7clrex, + &feature_perfmon, + &feature_avoidMovsShop, + &feature_avoidPartialCpsr, + &feature_hwdivArm, + &feature_hwdiv, + &feature_retAddrStack, + &feature_slowfpvmlx, + &feature_vmlxHazards, + &feature_mp, + &feature_neonfp, + &feature_disablePostraScheduler, + &feature_preferIshst, + &feature_profUnpr, + &feature_slowLoadDSubreg, + &feature_slowOddReg, + &feature_slowVdup32, + &feature_slowVgetlni32, + &feature_useMisched, + &feature_wideStrideVfp, + &feature_fp16, + &feature_vfp4, + }, +}; + +pub const cpu_xscale = Cpu{ + .name = "xscale", + .llvm_name = "xscale", + .dependencies = &[_]*const Feature { + }, +}; + +pub const cpus = &[_]*const Cpu { + &cpu_arm1020e, + &cpu_arm1020t, + &cpu_arm1022e, + &cpu_arm10e, + &cpu_arm10tdmi, + &cpu_arm1136jS, + &cpu_arm1136jfS, + &cpu_arm1156t2S, + &cpu_arm1156t2fS, + &cpu_arm1176jS, + &cpu_arm1176jzS, + &cpu_arm1176jzfS, + &cpu_arm710t, + &cpu_arm720t, + &cpu_arm7tdmi, + &cpu_arm7tdmiS, + &cpu_arm8, + &cpu_arm810, + &cpu_arm9, + &cpu_arm920, + &cpu_arm920t, + &cpu_arm922t, + &cpu_arm926ejS, + &cpu_arm940t, + &cpu_arm946eS, + &cpu_arm966eS, + &cpu_arm968eS, + &cpu_arm9e, + &cpu_arm9tdmi, + &cpu_cortexA12, + &cpu_cortexA15, + &cpu_cortexA17, + &cpu_cortexA32, + &cpu_cortexA35, + &cpu_cortexA5, + &cpu_cortexA53, + &cpu_cortexA55, + &cpu_cortexA57, + &cpu_cortexA7, + &cpu_cortexA72, + &cpu_cortexA73, + &cpu_cortexA75, + &cpu_cortexA76, + &cpu_cortexA76ae, + &cpu_cortexA8, + &cpu_cortexA9, + &cpu_cortexM0, + &cpu_cortexM0plus, + &cpu_cortexM1, + &cpu_cortexM23, + &cpu_cortexM3, + &cpu_cortexM33, + &cpu_cortexM35p, + &cpu_cortexM4, + &cpu_cortexM7, + &cpu_cortexR4, + &cpu_cortexR4f, + &cpu_cortexR5, + &cpu_cortexR52, + &cpu_cortexR7, + &cpu_cortexR8, + &cpu_cyclone, + &cpu_ep9312, + &cpu_exynosM1, + &cpu_exynosM2, + &cpu_exynosM3, + &cpu_exynosM4, + &cpu_exynosM5, + &cpu_generic, + &cpu_iwmmxt, + &cpu_krait, + &cpu_kryo, + &cpu_mpcore, + &cpu_mpcorenovfp, + &cpu_sc000, + &cpu_sc300, + &cpu_strongarm, + &cpu_strongarm110, + &cpu_strongarm1100, + &cpu_strongarm1110, + &cpu_swift, + &cpu_xscale, +}; diff --git a/lib/std/target/avr.zig b/lib/std/target/avr.zig new file mode 100644 index 000000000000..21b1591b7bdc --- /dev/null +++ b/lib/std/target/avr.zig @@ -0,0 +1,4791 @@ +const Feature = @import("std").target.Feature; +const Cpu = @import("std").target.Cpu; + +pub const feature_addsubiw = Feature{ + .name = "addsubiw", + .llvm_name = "addsubiw", + .description = "Enable 16-bit register-immediate addition and subtraction instructions", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_break = Feature{ + .name = "break", + .llvm_name = "break", + .description = "The device supports the `BREAK` debugging instruction", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_des = Feature{ + .name = "des", + .llvm_name = "des", + .description = "The device supports the `DES k` encryption instruction", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_eijmpcall = Feature{ + .name = "eijmpcall", + .llvm_name = "eijmpcall", + .description = "The device supports the `EIJMP`/`EICALL` instructions", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_elpm = Feature{ + .name = "elpm", + .llvm_name = "elpm", + .description = "The device supports the ELPM instruction", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_elpmx = Feature{ + .name = "elpmx", + .llvm_name = "elpmx", + .description = "The device supports the `ELPM Rd, Z[+]` instructions", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_ijmpcall = Feature{ + .name = "ijmpcall", + .llvm_name = "ijmpcall", + .description = "The device supports `IJMP`/`ICALL`instructions", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_jmpcall = Feature{ + .name = "jmpcall", + .llvm_name = "jmpcall", + .description = "The device supports the `JMP` and `CALL` instructions", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_lpm = Feature{ + .name = "lpm", + .llvm_name = "lpm", + .description = "The device supports the `LPM` instruction", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_lpmx = Feature{ + .name = "lpmx", + .llvm_name = "lpmx", + .description = "The device supports the `LPM Rd, Z[+]` instruction", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_movw = Feature{ + .name = "movw", + .llvm_name = "movw", + .description = "The device supports the 16-bit MOVW instruction", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_mul = Feature{ + .name = "mul", + .llvm_name = "mul", + .description = "The device supports the multiplication instructions", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_rmw = Feature{ + .name = "rmw", + .llvm_name = "rmw", + .description = "The device supports the read-write-modify instructions: XCH, LAS, LAC, LAT", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_spm = Feature{ + .name = "spm", + .llvm_name = "spm", + .description = "The device supports the `SPM` instruction", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_spmx = Feature{ + .name = "spmx", + .llvm_name = "spmx", + .description = "The device supports the `SPM Z+` instruction", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_sram = Feature{ + .name = "sram", + .llvm_name = "sram", + .description = "The device has random access memory", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_smallstack = Feature{ + .name = "smallstack", + .llvm_name = "smallstack", + .description = "The device has an 8-bit stack pointer", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_tinyencoding = Feature{ + .name = "tinyencoding", + .llvm_name = "tinyencoding", + .description = "The device has Tiny core specific instruction encodings", + .dependencies = &[_]*const Feature { + }, +}; + +pub const features = &[_]*const Feature { + &feature_addsubiw, + &feature_break, + &feature_des, + &feature_eijmpcall, + &feature_elpm, + &feature_elpmx, + &feature_ijmpcall, + &feature_jmpcall, + &feature_lpm, + &feature_lpmx, + &feature_movw, + &feature_mul, + &feature_rmw, + &feature_spm, + &feature_spmx, + &feature_sram, + &feature_smallstack, + &feature_tinyencoding, +}; + +pub const cpu_at43usb320 = Cpu{ + .name = "at43usb320", + .llvm_name = "at43usb320", + .dependencies = &[_]*const Feature { + &feature_jmpcall, + &feature_lpm, + &feature_elpm, + &feature_sram, + &feature_addsubiw, + &feature_ijmpcall, + }, +}; + +pub const cpu_at43usb355 = Cpu{ + .name = "at43usb355", + .llvm_name = "at43usb355", + .dependencies = &[_]*const Feature { + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_ijmpcall, + }, +}; + +pub const cpu_at76c711 = Cpu{ + .name = "at76c711", + .llvm_name = "at76c711", + .dependencies = &[_]*const Feature { + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_ijmpcall, + }, +}; + +pub const cpu_at86rf401 = Cpu{ + .name = "at86rf401", + .llvm_name = "at86rf401", + .dependencies = &[_]*const Feature { + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_ijmpcall, + &feature_lpmx, + &feature_movw, + }, +}; + +pub const cpu_at90c8534 = Cpu{ + .name = "at90c8534", + .llvm_name = "at90c8534", + .dependencies = &[_]*const Feature { + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_ijmpcall, + }, +}; + +pub const cpu_at90can128 = Cpu{ + .name = "at90can128", + .llvm_name = "at90can128", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_elpm, + &feature_sram, + &feature_addsubiw, + &feature_elpmx, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_at90can32 = Cpu{ + .name = "at90can32", + .llvm_name = "at90can32", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_at90can64 = Cpu{ + .name = "at90can64", + .llvm_name = "at90can64", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_at90pwm1 = Cpu{ + .name = "at90pwm1", + .llvm_name = "at90pwm1", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_at90pwm161 = Cpu{ + .name = "at90pwm161", + .llvm_name = "at90pwm161", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_at90pwm2 = Cpu{ + .name = "at90pwm2", + .llvm_name = "at90pwm2", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_at90pwm216 = Cpu{ + .name = "at90pwm216", + .llvm_name = "at90pwm216", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_at90pwm2b = Cpu{ + .name = "at90pwm2b", + .llvm_name = "at90pwm2b", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_at90pwm3 = Cpu{ + .name = "at90pwm3", + .llvm_name = "at90pwm3", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_at90pwm316 = Cpu{ + .name = "at90pwm316", + .llvm_name = "at90pwm316", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_at90pwm3b = Cpu{ + .name = "at90pwm3b", + .llvm_name = "at90pwm3b", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_at90pwm81 = Cpu{ + .name = "at90pwm81", + .llvm_name = "at90pwm81", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_at90s1200 = Cpu{ + .name = "at90s1200", + .llvm_name = "at90s1200", + .dependencies = &[_]*const Feature { + }, +}; + +pub const cpu_at90s2313 = Cpu{ + .name = "at90s2313", + .llvm_name = "at90s2313", + .dependencies = &[_]*const Feature { + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_ijmpcall, + }, +}; + +pub const cpu_at90s2323 = Cpu{ + .name = "at90s2323", + .llvm_name = "at90s2323", + .dependencies = &[_]*const Feature { + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_ijmpcall, + }, +}; + +pub const cpu_at90s2333 = Cpu{ + .name = "at90s2333", + .llvm_name = "at90s2333", + .dependencies = &[_]*const Feature { + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_ijmpcall, + }, +}; + +pub const cpu_at90s2343 = Cpu{ + .name = "at90s2343", + .llvm_name = "at90s2343", + .dependencies = &[_]*const Feature { + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_ijmpcall, + }, +}; + +pub const cpu_at90s4414 = Cpu{ + .name = "at90s4414", + .llvm_name = "at90s4414", + .dependencies = &[_]*const Feature { + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_ijmpcall, + }, +}; + +pub const cpu_at90s4433 = Cpu{ + .name = "at90s4433", + .llvm_name = "at90s4433", + .dependencies = &[_]*const Feature { + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_ijmpcall, + }, +}; + +pub const cpu_at90s4434 = Cpu{ + .name = "at90s4434", + .llvm_name = "at90s4434", + .dependencies = &[_]*const Feature { + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_ijmpcall, + }, +}; + +pub const cpu_at90s8515 = Cpu{ + .name = "at90s8515", + .llvm_name = "at90s8515", + .dependencies = &[_]*const Feature { + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_ijmpcall, + }, +}; + +pub const cpu_at90s8535 = Cpu{ + .name = "at90s8535", + .llvm_name = "at90s8535", + .dependencies = &[_]*const Feature { + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_ijmpcall, + }, +}; + +pub const cpu_at90scr100 = Cpu{ + .name = "at90scr100", + .llvm_name = "at90scr100", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_at90usb1286 = Cpu{ + .name = "at90usb1286", + .llvm_name = "at90usb1286", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_elpm, + &feature_sram, + &feature_addsubiw, + &feature_elpmx, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_at90usb1287 = Cpu{ + .name = "at90usb1287", + .llvm_name = "at90usb1287", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_elpm, + &feature_sram, + &feature_addsubiw, + &feature_elpmx, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_at90usb162 = Cpu{ + .name = "at90usb162", + .llvm_name = "at90usb162", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + }, +}; + +pub const cpu_at90usb646 = Cpu{ + .name = "at90usb646", + .llvm_name = "at90usb646", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_at90usb647 = Cpu{ + .name = "at90usb647", + .llvm_name = "at90usb647", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_at90usb82 = Cpu{ + .name = "at90usb82", + .llvm_name = "at90usb82", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + }, +}; + +pub const cpu_at94k = Cpu{ + .name = "at94k", + .llvm_name = "at94k", + .dependencies = &[_]*const Feature { + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_ijmpcall, + &feature_lpmx, + &feature_movw, + &feature_mul, + }, +}; + +pub const cpu_ata5272 = Cpu{ + .name = "ata5272", + .llvm_name = "ata5272", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + }, +}; + +pub const cpu_ata5505 = Cpu{ + .name = "ata5505", + .llvm_name = "ata5505", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + }, +}; + +pub const cpu_ata5790 = Cpu{ + .name = "ata5790", + .llvm_name = "ata5790", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_ata5795 = Cpu{ + .name = "ata5795", + .llvm_name = "ata5795", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_ata6285 = Cpu{ + .name = "ata6285", + .llvm_name = "ata6285", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_ata6286 = Cpu{ + .name = "ata6286", + .llvm_name = "ata6286", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_ata6289 = Cpu{ + .name = "ata6289", + .llvm_name = "ata6289", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atmega103 = Cpu{ + .name = "atmega103", + .llvm_name = "atmega103", + .dependencies = &[_]*const Feature { + &feature_jmpcall, + &feature_lpm, + &feature_elpm, + &feature_sram, + &feature_addsubiw, + &feature_ijmpcall, + }, +}; + +pub const cpu_atmega128 = Cpu{ + .name = "atmega128", + .llvm_name = "atmega128", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_elpm, + &feature_sram, + &feature_addsubiw, + &feature_elpmx, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atmega1280 = Cpu{ + .name = "atmega1280", + .llvm_name = "atmega1280", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_elpm, + &feature_sram, + &feature_addsubiw, + &feature_elpmx, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atmega1281 = Cpu{ + .name = "atmega1281", + .llvm_name = "atmega1281", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_elpm, + &feature_sram, + &feature_addsubiw, + &feature_elpmx, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atmega1284 = Cpu{ + .name = "atmega1284", + .llvm_name = "atmega1284", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_elpm, + &feature_sram, + &feature_addsubiw, + &feature_elpmx, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atmega1284p = Cpu{ + .name = "atmega1284p", + .llvm_name = "atmega1284p", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_elpm, + &feature_sram, + &feature_addsubiw, + &feature_elpmx, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atmega1284rfr2 = Cpu{ + .name = "atmega1284rfr2", + .llvm_name = "atmega1284rfr2", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_elpm, + &feature_sram, + &feature_addsubiw, + &feature_elpmx, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atmega128a = Cpu{ + .name = "atmega128a", + .llvm_name = "atmega128a", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_elpm, + &feature_sram, + &feature_addsubiw, + &feature_elpmx, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atmega128rfa1 = Cpu{ + .name = "atmega128rfa1", + .llvm_name = "atmega128rfa1", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_elpm, + &feature_sram, + &feature_addsubiw, + &feature_elpmx, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atmega128rfr2 = Cpu{ + .name = "atmega128rfr2", + .llvm_name = "atmega128rfr2", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_elpm, + &feature_sram, + &feature_addsubiw, + &feature_elpmx, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atmega16 = Cpu{ + .name = "atmega16", + .llvm_name = "atmega16", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atmega161 = Cpu{ + .name = "atmega161", + .llvm_name = "atmega161", + .dependencies = &[_]*const Feature { + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_ijmpcall, + &feature_lpmx, + &feature_movw, + &feature_mul, + &feature_spm, + }, +}; + +pub const cpu_atmega162 = Cpu{ + .name = "atmega162", + .llvm_name = "atmega162", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atmega163 = Cpu{ + .name = "atmega163", + .llvm_name = "atmega163", + .dependencies = &[_]*const Feature { + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_ijmpcall, + &feature_lpmx, + &feature_movw, + &feature_mul, + &feature_spm, + }, +}; + +pub const cpu_atmega164a = Cpu{ + .name = "atmega164a", + .llvm_name = "atmega164a", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atmega164p = Cpu{ + .name = "atmega164p", + .llvm_name = "atmega164p", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atmega164pa = Cpu{ + .name = "atmega164pa", + .llvm_name = "atmega164pa", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atmega165 = Cpu{ + .name = "atmega165", + .llvm_name = "atmega165", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atmega165a = Cpu{ + .name = "atmega165a", + .llvm_name = "atmega165a", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atmega165p = Cpu{ + .name = "atmega165p", + .llvm_name = "atmega165p", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atmega165pa = Cpu{ + .name = "atmega165pa", + .llvm_name = "atmega165pa", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atmega168 = Cpu{ + .name = "atmega168", + .llvm_name = "atmega168", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atmega168a = Cpu{ + .name = "atmega168a", + .llvm_name = "atmega168a", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atmega168p = Cpu{ + .name = "atmega168p", + .llvm_name = "atmega168p", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atmega168pa = Cpu{ + .name = "atmega168pa", + .llvm_name = "atmega168pa", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atmega169 = Cpu{ + .name = "atmega169", + .llvm_name = "atmega169", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atmega169a = Cpu{ + .name = "atmega169a", + .llvm_name = "atmega169a", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atmega169p = Cpu{ + .name = "atmega169p", + .llvm_name = "atmega169p", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atmega169pa = Cpu{ + .name = "atmega169pa", + .llvm_name = "atmega169pa", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atmega16a = Cpu{ + .name = "atmega16a", + .llvm_name = "atmega16a", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atmega16hva = Cpu{ + .name = "atmega16hva", + .llvm_name = "atmega16hva", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atmega16hva2 = Cpu{ + .name = "atmega16hva2", + .llvm_name = "atmega16hva2", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atmega16hvb = Cpu{ + .name = "atmega16hvb", + .llvm_name = "atmega16hvb", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atmega16hvbrevb = Cpu{ + .name = "atmega16hvbrevb", + .llvm_name = "atmega16hvbrevb", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atmega16m1 = Cpu{ + .name = "atmega16m1", + .llvm_name = "atmega16m1", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atmega16u2 = Cpu{ + .name = "atmega16u2", + .llvm_name = "atmega16u2", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + }, +}; + +pub const cpu_atmega16u4 = Cpu{ + .name = "atmega16u4", + .llvm_name = "atmega16u4", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atmega2560 = Cpu{ + .name = "atmega2560", + .llvm_name = "atmega2560", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_elpm, + &feature_sram, + &feature_addsubiw, + &feature_elpmx, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atmega2561 = Cpu{ + .name = "atmega2561", + .llvm_name = "atmega2561", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_elpm, + &feature_sram, + &feature_addsubiw, + &feature_elpmx, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atmega2564rfr2 = Cpu{ + .name = "atmega2564rfr2", + .llvm_name = "atmega2564rfr2", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_elpm, + &feature_sram, + &feature_addsubiw, + &feature_elpmx, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atmega256rfr2 = Cpu{ + .name = "atmega256rfr2", + .llvm_name = "atmega256rfr2", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_elpm, + &feature_sram, + &feature_addsubiw, + &feature_elpmx, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atmega32 = Cpu{ + .name = "atmega32", + .llvm_name = "atmega32", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atmega323 = Cpu{ + .name = "atmega323", + .llvm_name = "atmega323", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atmega324a = Cpu{ + .name = "atmega324a", + .llvm_name = "atmega324a", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atmega324p = Cpu{ + .name = "atmega324p", + .llvm_name = "atmega324p", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atmega324pa = Cpu{ + .name = "atmega324pa", + .llvm_name = "atmega324pa", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atmega325 = Cpu{ + .name = "atmega325", + .llvm_name = "atmega325", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atmega3250 = Cpu{ + .name = "atmega3250", + .llvm_name = "atmega3250", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atmega3250a = Cpu{ + .name = "atmega3250a", + .llvm_name = "atmega3250a", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atmega3250p = Cpu{ + .name = "atmega3250p", + .llvm_name = "atmega3250p", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atmega3250pa = Cpu{ + .name = "atmega3250pa", + .llvm_name = "atmega3250pa", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atmega325a = Cpu{ + .name = "atmega325a", + .llvm_name = "atmega325a", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atmega325p = Cpu{ + .name = "atmega325p", + .llvm_name = "atmega325p", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atmega325pa = Cpu{ + .name = "atmega325pa", + .llvm_name = "atmega325pa", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atmega328 = Cpu{ + .name = "atmega328", + .llvm_name = "atmega328", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atmega328p = Cpu{ + .name = "atmega328p", + .llvm_name = "atmega328p", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atmega329 = Cpu{ + .name = "atmega329", + .llvm_name = "atmega329", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atmega3290 = Cpu{ + .name = "atmega3290", + .llvm_name = "atmega3290", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atmega3290a = Cpu{ + .name = "atmega3290a", + .llvm_name = "atmega3290a", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atmega3290p = Cpu{ + .name = "atmega3290p", + .llvm_name = "atmega3290p", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atmega3290pa = Cpu{ + .name = "atmega3290pa", + .llvm_name = "atmega3290pa", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atmega329a = Cpu{ + .name = "atmega329a", + .llvm_name = "atmega329a", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atmega329p = Cpu{ + .name = "atmega329p", + .llvm_name = "atmega329p", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atmega329pa = Cpu{ + .name = "atmega329pa", + .llvm_name = "atmega329pa", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atmega32a = Cpu{ + .name = "atmega32a", + .llvm_name = "atmega32a", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atmega32c1 = Cpu{ + .name = "atmega32c1", + .llvm_name = "atmega32c1", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atmega32hvb = Cpu{ + .name = "atmega32hvb", + .llvm_name = "atmega32hvb", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atmega32hvbrevb = Cpu{ + .name = "atmega32hvbrevb", + .llvm_name = "atmega32hvbrevb", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atmega32m1 = Cpu{ + .name = "atmega32m1", + .llvm_name = "atmega32m1", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atmega32u2 = Cpu{ + .name = "atmega32u2", + .llvm_name = "atmega32u2", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + }, +}; + +pub const cpu_atmega32u4 = Cpu{ + .name = "atmega32u4", + .llvm_name = "atmega32u4", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atmega32u6 = Cpu{ + .name = "atmega32u6", + .llvm_name = "atmega32u6", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atmega406 = Cpu{ + .name = "atmega406", + .llvm_name = "atmega406", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atmega48 = Cpu{ + .name = "atmega48", + .llvm_name = "atmega48", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atmega48a = Cpu{ + .name = "atmega48a", + .llvm_name = "atmega48a", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atmega48p = Cpu{ + .name = "atmega48p", + .llvm_name = "atmega48p", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atmega48pa = Cpu{ + .name = "atmega48pa", + .llvm_name = "atmega48pa", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atmega64 = Cpu{ + .name = "atmega64", + .llvm_name = "atmega64", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atmega640 = Cpu{ + .name = "atmega640", + .llvm_name = "atmega640", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atmega644 = Cpu{ + .name = "atmega644", + .llvm_name = "atmega644", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atmega644a = Cpu{ + .name = "atmega644a", + .llvm_name = "atmega644a", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atmega644p = Cpu{ + .name = "atmega644p", + .llvm_name = "atmega644p", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atmega644pa = Cpu{ + .name = "atmega644pa", + .llvm_name = "atmega644pa", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atmega644rfr2 = Cpu{ + .name = "atmega644rfr2", + .llvm_name = "atmega644rfr2", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atmega645 = Cpu{ + .name = "atmega645", + .llvm_name = "atmega645", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atmega6450 = Cpu{ + .name = "atmega6450", + .llvm_name = "atmega6450", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atmega6450a = Cpu{ + .name = "atmega6450a", + .llvm_name = "atmega6450a", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atmega6450p = Cpu{ + .name = "atmega6450p", + .llvm_name = "atmega6450p", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atmega645a = Cpu{ + .name = "atmega645a", + .llvm_name = "atmega645a", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atmega645p = Cpu{ + .name = "atmega645p", + .llvm_name = "atmega645p", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atmega649 = Cpu{ + .name = "atmega649", + .llvm_name = "atmega649", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atmega6490 = Cpu{ + .name = "atmega6490", + .llvm_name = "atmega6490", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atmega6490a = Cpu{ + .name = "atmega6490a", + .llvm_name = "atmega6490a", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atmega6490p = Cpu{ + .name = "atmega6490p", + .llvm_name = "atmega6490p", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atmega649a = Cpu{ + .name = "atmega649a", + .llvm_name = "atmega649a", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atmega649p = Cpu{ + .name = "atmega649p", + .llvm_name = "atmega649p", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atmega64a = Cpu{ + .name = "atmega64a", + .llvm_name = "atmega64a", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atmega64c1 = Cpu{ + .name = "atmega64c1", + .llvm_name = "atmega64c1", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atmega64hve = Cpu{ + .name = "atmega64hve", + .llvm_name = "atmega64hve", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atmega64m1 = Cpu{ + .name = "atmega64m1", + .llvm_name = "atmega64m1", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atmega64rfr2 = Cpu{ + .name = "atmega64rfr2", + .llvm_name = "atmega64rfr2", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atmega8 = Cpu{ + .name = "atmega8", + .llvm_name = "atmega8", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atmega8515 = Cpu{ + .name = "atmega8515", + .llvm_name = "atmega8515", + .dependencies = &[_]*const Feature { + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_ijmpcall, + &feature_lpmx, + &feature_movw, + &feature_mul, + &feature_spm, + }, +}; + +pub const cpu_atmega8535 = Cpu{ + .name = "atmega8535", + .llvm_name = "atmega8535", + .dependencies = &[_]*const Feature { + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_ijmpcall, + &feature_lpmx, + &feature_movw, + &feature_mul, + &feature_spm, + }, +}; + +pub const cpu_atmega88 = Cpu{ + .name = "atmega88", + .llvm_name = "atmega88", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atmega88a = Cpu{ + .name = "atmega88a", + .llvm_name = "atmega88a", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atmega88p = Cpu{ + .name = "atmega88p", + .llvm_name = "atmega88p", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atmega88pa = Cpu{ + .name = "atmega88pa", + .llvm_name = "atmega88pa", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atmega8a = Cpu{ + .name = "atmega8a", + .llvm_name = "atmega8a", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atmega8hva = Cpu{ + .name = "atmega8hva", + .llvm_name = "atmega8hva", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atmega8u2 = Cpu{ + .name = "atmega8u2", + .llvm_name = "atmega8u2", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + }, +}; + +pub const cpu_attiny10 = Cpu{ + .name = "attiny10", + .llvm_name = "attiny10", + .dependencies = &[_]*const Feature { + &feature_sram, + &feature_break, + &feature_tinyencoding, + }, +}; + +pub const cpu_attiny102 = Cpu{ + .name = "attiny102", + .llvm_name = "attiny102", + .dependencies = &[_]*const Feature { + &feature_sram, + &feature_break, + &feature_tinyencoding, + }, +}; + +pub const cpu_attiny104 = Cpu{ + .name = "attiny104", + .llvm_name = "attiny104", + .dependencies = &[_]*const Feature { + &feature_sram, + &feature_break, + &feature_tinyencoding, + }, +}; + +pub const cpu_attiny11 = Cpu{ + .name = "attiny11", + .llvm_name = "attiny11", + .dependencies = &[_]*const Feature { + &feature_lpm, + }, +}; + +pub const cpu_attiny12 = Cpu{ + .name = "attiny12", + .llvm_name = "attiny12", + .dependencies = &[_]*const Feature { + &feature_lpm, + }, +}; + +pub const cpu_attiny13 = Cpu{ + .name = "attiny13", + .llvm_name = "attiny13", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + }, +}; + +pub const cpu_attiny13a = Cpu{ + .name = "attiny13a", + .llvm_name = "attiny13a", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + }, +}; + +pub const cpu_attiny15 = Cpu{ + .name = "attiny15", + .llvm_name = "attiny15", + .dependencies = &[_]*const Feature { + &feature_lpm, + }, +}; + +pub const cpu_attiny1634 = Cpu{ + .name = "attiny1634", + .llvm_name = "attiny1634", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + }, +}; + +pub const cpu_attiny167 = Cpu{ + .name = "attiny167", + .llvm_name = "attiny167", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + }, +}; + +pub const cpu_attiny20 = Cpu{ + .name = "attiny20", + .llvm_name = "attiny20", + .dependencies = &[_]*const Feature { + &feature_sram, + &feature_break, + &feature_tinyencoding, + }, +}; + +pub const cpu_attiny22 = Cpu{ + .name = "attiny22", + .llvm_name = "attiny22", + .dependencies = &[_]*const Feature { + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_ijmpcall, + }, +}; + +pub const cpu_attiny2313 = Cpu{ + .name = "attiny2313", + .llvm_name = "attiny2313", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + }, +}; + +pub const cpu_attiny2313a = Cpu{ + .name = "attiny2313a", + .llvm_name = "attiny2313a", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + }, +}; + +pub const cpu_attiny24 = Cpu{ + .name = "attiny24", + .llvm_name = "attiny24", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + }, +}; + +pub const cpu_attiny24a = Cpu{ + .name = "attiny24a", + .llvm_name = "attiny24a", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + }, +}; + +pub const cpu_attiny25 = Cpu{ + .name = "attiny25", + .llvm_name = "attiny25", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + }, +}; + +pub const cpu_attiny26 = Cpu{ + .name = "attiny26", + .llvm_name = "attiny26", + .dependencies = &[_]*const Feature { + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_ijmpcall, + &feature_lpmx, + }, +}; + +pub const cpu_attiny261 = Cpu{ + .name = "attiny261", + .llvm_name = "attiny261", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + }, +}; + +pub const cpu_attiny261a = Cpu{ + .name = "attiny261a", + .llvm_name = "attiny261a", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + }, +}; + +pub const cpu_attiny28 = Cpu{ + .name = "attiny28", + .llvm_name = "attiny28", + .dependencies = &[_]*const Feature { + &feature_lpm, + }, +}; + +pub const cpu_attiny4 = Cpu{ + .name = "attiny4", + .llvm_name = "attiny4", + .dependencies = &[_]*const Feature { + &feature_sram, + &feature_break, + &feature_tinyencoding, + }, +}; + +pub const cpu_attiny40 = Cpu{ + .name = "attiny40", + .llvm_name = "attiny40", + .dependencies = &[_]*const Feature { + &feature_sram, + &feature_break, + &feature_tinyencoding, + }, +}; + +pub const cpu_attiny4313 = Cpu{ + .name = "attiny4313", + .llvm_name = "attiny4313", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + }, +}; + +pub const cpu_attiny43u = Cpu{ + .name = "attiny43u", + .llvm_name = "attiny43u", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + }, +}; + +pub const cpu_attiny44 = Cpu{ + .name = "attiny44", + .llvm_name = "attiny44", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + }, +}; + +pub const cpu_attiny44a = Cpu{ + .name = "attiny44a", + .llvm_name = "attiny44a", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + }, +}; + +pub const cpu_attiny45 = Cpu{ + .name = "attiny45", + .llvm_name = "attiny45", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + }, +}; + +pub const cpu_attiny461 = Cpu{ + .name = "attiny461", + .llvm_name = "attiny461", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + }, +}; + +pub const cpu_attiny461a = Cpu{ + .name = "attiny461a", + .llvm_name = "attiny461a", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + }, +}; + +pub const cpu_attiny48 = Cpu{ + .name = "attiny48", + .llvm_name = "attiny48", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + }, +}; + +pub const cpu_attiny5 = Cpu{ + .name = "attiny5", + .llvm_name = "attiny5", + .dependencies = &[_]*const Feature { + &feature_sram, + &feature_break, + &feature_tinyencoding, + }, +}; + +pub const cpu_attiny828 = Cpu{ + .name = "attiny828", + .llvm_name = "attiny828", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + }, +}; + +pub const cpu_attiny84 = Cpu{ + .name = "attiny84", + .llvm_name = "attiny84", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + }, +}; + +pub const cpu_attiny84a = Cpu{ + .name = "attiny84a", + .llvm_name = "attiny84a", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + }, +}; + +pub const cpu_attiny85 = Cpu{ + .name = "attiny85", + .llvm_name = "attiny85", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + }, +}; + +pub const cpu_attiny861 = Cpu{ + .name = "attiny861", + .llvm_name = "attiny861", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + }, +}; + +pub const cpu_attiny861a = Cpu{ + .name = "attiny861a", + .llvm_name = "attiny861a", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + }, +}; + +pub const cpu_attiny87 = Cpu{ + .name = "attiny87", + .llvm_name = "attiny87", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + }, +}; + +pub const cpu_attiny88 = Cpu{ + .name = "attiny88", + .llvm_name = "attiny88", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + }, +}; + +pub const cpu_attiny9 = Cpu{ + .name = "attiny9", + .llvm_name = "attiny9", + .dependencies = &[_]*const Feature { + &feature_sram, + &feature_break, + &feature_tinyencoding, + }, +}; + +pub const cpu_atxmega128a1 = Cpu{ + .name = "atxmega128a1", + .llvm_name = "atxmega128a1", + .dependencies = &[_]*const Feature { + &feature_spmx, + &feature_des, + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_elpm, + &feature_sram, + &feature_addsubiw, + &feature_elpmx, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_eijmpcall, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atxmega128a1u = Cpu{ + .name = "atxmega128a1u", + .llvm_name = "atxmega128a1u", + .dependencies = &[_]*const Feature { + &feature_spmx, + &feature_des, + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_elpm, + &feature_sram, + &feature_addsubiw, + &feature_elpmx, + &feature_rmw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_eijmpcall, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atxmega128a3 = Cpu{ + .name = "atxmega128a3", + .llvm_name = "atxmega128a3", + .dependencies = &[_]*const Feature { + &feature_spmx, + &feature_des, + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_elpm, + &feature_sram, + &feature_addsubiw, + &feature_elpmx, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_eijmpcall, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atxmega128a3u = Cpu{ + .name = "atxmega128a3u", + .llvm_name = "atxmega128a3u", + .dependencies = &[_]*const Feature { + &feature_spmx, + &feature_des, + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_elpm, + &feature_sram, + &feature_addsubiw, + &feature_elpmx, + &feature_rmw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_eijmpcall, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atxmega128a4u = Cpu{ + .name = "atxmega128a4u", + .llvm_name = "atxmega128a4u", + .dependencies = &[_]*const Feature { + &feature_spmx, + &feature_des, + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_elpm, + &feature_sram, + &feature_addsubiw, + &feature_elpmx, + &feature_rmw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_eijmpcall, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atxmega128b1 = Cpu{ + .name = "atxmega128b1", + .llvm_name = "atxmega128b1", + .dependencies = &[_]*const Feature { + &feature_spmx, + &feature_des, + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_elpm, + &feature_sram, + &feature_addsubiw, + &feature_elpmx, + &feature_rmw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_eijmpcall, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atxmega128b3 = Cpu{ + .name = "atxmega128b3", + .llvm_name = "atxmega128b3", + .dependencies = &[_]*const Feature { + &feature_spmx, + &feature_des, + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_elpm, + &feature_sram, + &feature_addsubiw, + &feature_elpmx, + &feature_rmw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_eijmpcall, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atxmega128c3 = Cpu{ + .name = "atxmega128c3", + .llvm_name = "atxmega128c3", + .dependencies = &[_]*const Feature { + &feature_spmx, + &feature_des, + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_elpm, + &feature_sram, + &feature_addsubiw, + &feature_elpmx, + &feature_rmw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_eijmpcall, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atxmega128d3 = Cpu{ + .name = "atxmega128d3", + .llvm_name = "atxmega128d3", + .dependencies = &[_]*const Feature { + &feature_spmx, + &feature_des, + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_elpm, + &feature_sram, + &feature_addsubiw, + &feature_elpmx, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_eijmpcall, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atxmega128d4 = Cpu{ + .name = "atxmega128d4", + .llvm_name = "atxmega128d4", + .dependencies = &[_]*const Feature { + &feature_spmx, + &feature_des, + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_elpm, + &feature_sram, + &feature_addsubiw, + &feature_elpmx, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_eijmpcall, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atxmega16a4 = Cpu{ + .name = "atxmega16a4", + .llvm_name = "atxmega16a4", + .dependencies = &[_]*const Feature { + &feature_spmx, + &feature_des, + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_elpm, + &feature_sram, + &feature_addsubiw, + &feature_elpmx, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_eijmpcall, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atxmega16a4u = Cpu{ + .name = "atxmega16a4u", + .llvm_name = "atxmega16a4u", + .dependencies = &[_]*const Feature { + &feature_spmx, + &feature_des, + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_elpm, + &feature_sram, + &feature_addsubiw, + &feature_elpmx, + &feature_rmw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_eijmpcall, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atxmega16c4 = Cpu{ + .name = "atxmega16c4", + .llvm_name = "atxmega16c4", + .dependencies = &[_]*const Feature { + &feature_spmx, + &feature_des, + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_elpm, + &feature_sram, + &feature_addsubiw, + &feature_elpmx, + &feature_rmw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_eijmpcall, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atxmega16d4 = Cpu{ + .name = "atxmega16d4", + .llvm_name = "atxmega16d4", + .dependencies = &[_]*const Feature { + &feature_spmx, + &feature_des, + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_elpm, + &feature_sram, + &feature_addsubiw, + &feature_elpmx, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_eijmpcall, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atxmega16e5 = Cpu{ + .name = "atxmega16e5", + .llvm_name = "atxmega16e5", + .dependencies = &[_]*const Feature { + &feature_spmx, + &feature_des, + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_elpm, + &feature_sram, + &feature_addsubiw, + &feature_elpmx, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_eijmpcall, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atxmega192a3 = Cpu{ + .name = "atxmega192a3", + .llvm_name = "atxmega192a3", + .dependencies = &[_]*const Feature { + &feature_spmx, + &feature_des, + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_elpm, + &feature_sram, + &feature_addsubiw, + &feature_elpmx, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_eijmpcall, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atxmega192a3u = Cpu{ + .name = "atxmega192a3u", + .llvm_name = "atxmega192a3u", + .dependencies = &[_]*const Feature { + &feature_spmx, + &feature_des, + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_elpm, + &feature_sram, + &feature_addsubiw, + &feature_elpmx, + &feature_rmw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_eijmpcall, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atxmega192c3 = Cpu{ + .name = "atxmega192c3", + .llvm_name = "atxmega192c3", + .dependencies = &[_]*const Feature { + &feature_spmx, + &feature_des, + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_elpm, + &feature_sram, + &feature_addsubiw, + &feature_elpmx, + &feature_rmw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_eijmpcall, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atxmega192d3 = Cpu{ + .name = "atxmega192d3", + .llvm_name = "atxmega192d3", + .dependencies = &[_]*const Feature { + &feature_spmx, + &feature_des, + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_elpm, + &feature_sram, + &feature_addsubiw, + &feature_elpmx, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_eijmpcall, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atxmega256a3 = Cpu{ + .name = "atxmega256a3", + .llvm_name = "atxmega256a3", + .dependencies = &[_]*const Feature { + &feature_spmx, + &feature_des, + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_elpm, + &feature_sram, + &feature_addsubiw, + &feature_elpmx, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_eijmpcall, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atxmega256a3b = Cpu{ + .name = "atxmega256a3b", + .llvm_name = "atxmega256a3b", + .dependencies = &[_]*const Feature { + &feature_spmx, + &feature_des, + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_elpm, + &feature_sram, + &feature_addsubiw, + &feature_elpmx, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_eijmpcall, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atxmega256a3bu = Cpu{ + .name = "atxmega256a3bu", + .llvm_name = "atxmega256a3bu", + .dependencies = &[_]*const Feature { + &feature_spmx, + &feature_des, + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_elpm, + &feature_sram, + &feature_addsubiw, + &feature_elpmx, + &feature_rmw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_eijmpcall, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atxmega256a3u = Cpu{ + .name = "atxmega256a3u", + .llvm_name = "atxmega256a3u", + .dependencies = &[_]*const Feature { + &feature_spmx, + &feature_des, + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_elpm, + &feature_sram, + &feature_addsubiw, + &feature_elpmx, + &feature_rmw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_eijmpcall, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atxmega256c3 = Cpu{ + .name = "atxmega256c3", + .llvm_name = "atxmega256c3", + .dependencies = &[_]*const Feature { + &feature_spmx, + &feature_des, + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_elpm, + &feature_sram, + &feature_addsubiw, + &feature_elpmx, + &feature_rmw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_eijmpcall, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atxmega256d3 = Cpu{ + .name = "atxmega256d3", + .llvm_name = "atxmega256d3", + .dependencies = &[_]*const Feature { + &feature_spmx, + &feature_des, + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_elpm, + &feature_sram, + &feature_addsubiw, + &feature_elpmx, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_eijmpcall, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atxmega32a4 = Cpu{ + .name = "atxmega32a4", + .llvm_name = "atxmega32a4", + .dependencies = &[_]*const Feature { + &feature_spmx, + &feature_des, + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_elpm, + &feature_sram, + &feature_addsubiw, + &feature_elpmx, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_eijmpcall, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atxmega32a4u = Cpu{ + .name = "atxmega32a4u", + .llvm_name = "atxmega32a4u", + .dependencies = &[_]*const Feature { + &feature_spmx, + &feature_des, + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_elpm, + &feature_sram, + &feature_addsubiw, + &feature_elpmx, + &feature_rmw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_eijmpcall, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atxmega32c4 = Cpu{ + .name = "atxmega32c4", + .llvm_name = "atxmega32c4", + .dependencies = &[_]*const Feature { + &feature_spmx, + &feature_des, + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_elpm, + &feature_sram, + &feature_addsubiw, + &feature_elpmx, + &feature_rmw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_eijmpcall, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atxmega32d4 = Cpu{ + .name = "atxmega32d4", + .llvm_name = "atxmega32d4", + .dependencies = &[_]*const Feature { + &feature_spmx, + &feature_des, + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_elpm, + &feature_sram, + &feature_addsubiw, + &feature_elpmx, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_eijmpcall, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atxmega32e5 = Cpu{ + .name = "atxmega32e5", + .llvm_name = "atxmega32e5", + .dependencies = &[_]*const Feature { + &feature_spmx, + &feature_des, + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_elpm, + &feature_sram, + &feature_addsubiw, + &feature_elpmx, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_eijmpcall, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atxmega32x1 = Cpu{ + .name = "atxmega32x1", + .llvm_name = "atxmega32x1", + .dependencies = &[_]*const Feature { + &feature_spmx, + &feature_des, + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_elpm, + &feature_sram, + &feature_addsubiw, + &feature_elpmx, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_eijmpcall, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atxmega384c3 = Cpu{ + .name = "atxmega384c3", + .llvm_name = "atxmega384c3", + .dependencies = &[_]*const Feature { + &feature_spmx, + &feature_des, + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_elpm, + &feature_sram, + &feature_addsubiw, + &feature_elpmx, + &feature_rmw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_eijmpcall, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atxmega384d3 = Cpu{ + .name = "atxmega384d3", + .llvm_name = "atxmega384d3", + .dependencies = &[_]*const Feature { + &feature_spmx, + &feature_des, + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_elpm, + &feature_sram, + &feature_addsubiw, + &feature_elpmx, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_eijmpcall, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atxmega64a1 = Cpu{ + .name = "atxmega64a1", + .llvm_name = "atxmega64a1", + .dependencies = &[_]*const Feature { + &feature_spmx, + &feature_des, + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_elpm, + &feature_sram, + &feature_addsubiw, + &feature_elpmx, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_eijmpcall, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atxmega64a1u = Cpu{ + .name = "atxmega64a1u", + .llvm_name = "atxmega64a1u", + .dependencies = &[_]*const Feature { + &feature_spmx, + &feature_des, + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_elpm, + &feature_sram, + &feature_addsubiw, + &feature_elpmx, + &feature_rmw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_eijmpcall, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atxmega64a3 = Cpu{ + .name = "atxmega64a3", + .llvm_name = "atxmega64a3", + .dependencies = &[_]*const Feature { + &feature_spmx, + &feature_des, + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_elpm, + &feature_sram, + &feature_addsubiw, + &feature_elpmx, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_eijmpcall, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atxmega64a3u = Cpu{ + .name = "atxmega64a3u", + .llvm_name = "atxmega64a3u", + .dependencies = &[_]*const Feature { + &feature_spmx, + &feature_des, + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_elpm, + &feature_sram, + &feature_addsubiw, + &feature_elpmx, + &feature_rmw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_eijmpcall, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atxmega64a4u = Cpu{ + .name = "atxmega64a4u", + .llvm_name = "atxmega64a4u", + .dependencies = &[_]*const Feature { + &feature_spmx, + &feature_des, + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_elpm, + &feature_sram, + &feature_addsubiw, + &feature_elpmx, + &feature_rmw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_eijmpcall, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atxmega64b1 = Cpu{ + .name = "atxmega64b1", + .llvm_name = "atxmega64b1", + .dependencies = &[_]*const Feature { + &feature_spmx, + &feature_des, + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_elpm, + &feature_sram, + &feature_addsubiw, + &feature_elpmx, + &feature_rmw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_eijmpcall, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atxmega64b3 = Cpu{ + .name = "atxmega64b3", + .llvm_name = "atxmega64b3", + .dependencies = &[_]*const Feature { + &feature_spmx, + &feature_des, + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_elpm, + &feature_sram, + &feature_addsubiw, + &feature_elpmx, + &feature_rmw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_eijmpcall, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atxmega64c3 = Cpu{ + .name = "atxmega64c3", + .llvm_name = "atxmega64c3", + .dependencies = &[_]*const Feature { + &feature_spmx, + &feature_des, + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_elpm, + &feature_sram, + &feature_addsubiw, + &feature_elpmx, + &feature_rmw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_eijmpcall, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atxmega64d3 = Cpu{ + .name = "atxmega64d3", + .llvm_name = "atxmega64d3", + .dependencies = &[_]*const Feature { + &feature_spmx, + &feature_des, + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_elpm, + &feature_sram, + &feature_addsubiw, + &feature_elpmx, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_eijmpcall, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atxmega64d4 = Cpu{ + .name = "atxmega64d4", + .llvm_name = "atxmega64d4", + .dependencies = &[_]*const Feature { + &feature_spmx, + &feature_des, + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_elpm, + &feature_sram, + &feature_addsubiw, + &feature_elpmx, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_eijmpcall, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_atxmega8e5 = Cpu{ + .name = "atxmega8e5", + .llvm_name = "atxmega8e5", + .dependencies = &[_]*const Feature { + &feature_spmx, + &feature_des, + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_elpm, + &feature_sram, + &feature_addsubiw, + &feature_elpmx, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_eijmpcall, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_avr1 = Cpu{ + .name = "avr1", + .llvm_name = "avr1", + .dependencies = &[_]*const Feature { + &feature_lpm, + }, +}; + +pub const cpu_avr2 = Cpu{ + .name = "avr2", + .llvm_name = "avr2", + .dependencies = &[_]*const Feature { + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_ijmpcall, + }, +}; + +pub const cpu_avr25 = Cpu{ + .name = "avr25", + .llvm_name = "avr25", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + }, +}; + +pub const cpu_avr3 = Cpu{ + .name = "avr3", + .llvm_name = "avr3", + .dependencies = &[_]*const Feature { + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_ijmpcall, + }, +}; + +pub const cpu_avr31 = Cpu{ + .name = "avr31", + .llvm_name = "avr31", + .dependencies = &[_]*const Feature { + &feature_jmpcall, + &feature_lpm, + &feature_elpm, + &feature_sram, + &feature_addsubiw, + &feature_ijmpcall, + }, +}; + +pub const cpu_avr35 = Cpu{ + .name = "avr35", + .llvm_name = "avr35", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + }, +}; + +pub const cpu_avr4 = Cpu{ + .name = "avr4", + .llvm_name = "avr4", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_avr5 = Cpu{ + .name = "avr5", + .llvm_name = "avr5", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_avr51 = Cpu{ + .name = "avr51", + .llvm_name = "avr51", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_elpm, + &feature_sram, + &feature_addsubiw, + &feature_elpmx, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_avr6 = Cpu{ + .name = "avr6", + .llvm_name = "avr6", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_elpm, + &feature_sram, + &feature_addsubiw, + &feature_elpmx, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_avrtiny = Cpu{ + .name = "avrtiny", + .llvm_name = "avrtiny", + .dependencies = &[_]*const Feature { + &feature_sram, + &feature_break, + &feature_tinyencoding, + }, +}; + +pub const cpu_avrxmega1 = Cpu{ + .name = "avrxmega1", + .llvm_name = "avrxmega1", + .dependencies = &[_]*const Feature { + &feature_spmx, + &feature_des, + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_elpm, + &feature_sram, + &feature_addsubiw, + &feature_elpmx, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_eijmpcall, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_avrxmega2 = Cpu{ + .name = "avrxmega2", + .llvm_name = "avrxmega2", + .dependencies = &[_]*const Feature { + &feature_spmx, + &feature_des, + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_elpm, + &feature_sram, + &feature_addsubiw, + &feature_elpmx, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_eijmpcall, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_avrxmega3 = Cpu{ + .name = "avrxmega3", + .llvm_name = "avrxmega3", + .dependencies = &[_]*const Feature { + &feature_spmx, + &feature_des, + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_elpm, + &feature_sram, + &feature_addsubiw, + &feature_elpmx, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_eijmpcall, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_avrxmega4 = Cpu{ + .name = "avrxmega4", + .llvm_name = "avrxmega4", + .dependencies = &[_]*const Feature { + &feature_spmx, + &feature_des, + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_elpm, + &feature_sram, + &feature_addsubiw, + &feature_elpmx, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_eijmpcall, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_avrxmega5 = Cpu{ + .name = "avrxmega5", + .llvm_name = "avrxmega5", + .dependencies = &[_]*const Feature { + &feature_spmx, + &feature_des, + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_elpm, + &feature_sram, + &feature_addsubiw, + &feature_elpmx, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_eijmpcall, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_avrxmega6 = Cpu{ + .name = "avrxmega6", + .llvm_name = "avrxmega6", + .dependencies = &[_]*const Feature { + &feature_spmx, + &feature_des, + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_elpm, + &feature_sram, + &feature_addsubiw, + &feature_elpmx, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_eijmpcall, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_avrxmega7 = Cpu{ + .name = "avrxmega7", + .llvm_name = "avrxmega7", + .dependencies = &[_]*const Feature { + &feature_spmx, + &feature_des, + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_elpm, + &feature_sram, + &feature_addsubiw, + &feature_elpmx, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_eijmpcall, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpu_m3000 = Cpu{ + .name = "m3000", + .llvm_name = "m3000", + .dependencies = &[_]*const Feature { + &feature_lpmx, + &feature_jmpcall, + &feature_lpm, + &feature_sram, + &feature_addsubiw, + &feature_movw, + &feature_ijmpcall, + &feature_break, + &feature_spm, + &feature_mul, + }, +}; + +pub const cpus = &[_]*const Cpu { + &cpu_at43usb320, + &cpu_at43usb355, + &cpu_at76c711, + &cpu_at86rf401, + &cpu_at90c8534, + &cpu_at90can128, + &cpu_at90can32, + &cpu_at90can64, + &cpu_at90pwm1, + &cpu_at90pwm161, + &cpu_at90pwm2, + &cpu_at90pwm216, + &cpu_at90pwm2b, + &cpu_at90pwm3, + &cpu_at90pwm316, + &cpu_at90pwm3b, + &cpu_at90pwm81, + &cpu_at90s1200, + &cpu_at90s2313, + &cpu_at90s2323, + &cpu_at90s2333, + &cpu_at90s2343, + &cpu_at90s4414, + &cpu_at90s4433, + &cpu_at90s4434, + &cpu_at90s8515, + &cpu_at90s8535, + &cpu_at90scr100, + &cpu_at90usb1286, + &cpu_at90usb1287, + &cpu_at90usb162, + &cpu_at90usb646, + &cpu_at90usb647, + &cpu_at90usb82, + &cpu_at94k, + &cpu_ata5272, + &cpu_ata5505, + &cpu_ata5790, + &cpu_ata5795, + &cpu_ata6285, + &cpu_ata6286, + &cpu_ata6289, + &cpu_atmega103, + &cpu_atmega128, + &cpu_atmega1280, + &cpu_atmega1281, + &cpu_atmega1284, + &cpu_atmega1284p, + &cpu_atmega1284rfr2, + &cpu_atmega128a, + &cpu_atmega128rfa1, + &cpu_atmega128rfr2, + &cpu_atmega16, + &cpu_atmega161, + &cpu_atmega162, + &cpu_atmega163, + &cpu_atmega164a, + &cpu_atmega164p, + &cpu_atmega164pa, + &cpu_atmega165, + &cpu_atmega165a, + &cpu_atmega165p, + &cpu_atmega165pa, + &cpu_atmega168, + &cpu_atmega168a, + &cpu_atmega168p, + &cpu_atmega168pa, + &cpu_atmega169, + &cpu_atmega169a, + &cpu_atmega169p, + &cpu_atmega169pa, + &cpu_atmega16a, + &cpu_atmega16hva, + &cpu_atmega16hva2, + &cpu_atmega16hvb, + &cpu_atmega16hvbrevb, + &cpu_atmega16m1, + &cpu_atmega16u2, + &cpu_atmega16u4, + &cpu_atmega2560, + &cpu_atmega2561, + &cpu_atmega2564rfr2, + &cpu_atmega256rfr2, + &cpu_atmega32, + &cpu_atmega323, + &cpu_atmega324a, + &cpu_atmega324p, + &cpu_atmega324pa, + &cpu_atmega325, + &cpu_atmega3250, + &cpu_atmega3250a, + &cpu_atmega3250p, + &cpu_atmega3250pa, + &cpu_atmega325a, + &cpu_atmega325p, + &cpu_atmega325pa, + &cpu_atmega328, + &cpu_atmega328p, + &cpu_atmega329, + &cpu_atmega3290, + &cpu_atmega3290a, + &cpu_atmega3290p, + &cpu_atmega3290pa, + &cpu_atmega329a, + &cpu_atmega329p, + &cpu_atmega329pa, + &cpu_atmega32a, + &cpu_atmega32c1, + &cpu_atmega32hvb, + &cpu_atmega32hvbrevb, + &cpu_atmega32m1, + &cpu_atmega32u2, + &cpu_atmega32u4, + &cpu_atmega32u6, + &cpu_atmega406, + &cpu_atmega48, + &cpu_atmega48a, + &cpu_atmega48p, + &cpu_atmega48pa, + &cpu_atmega64, + &cpu_atmega640, + &cpu_atmega644, + &cpu_atmega644a, + &cpu_atmega644p, + &cpu_atmega644pa, + &cpu_atmega644rfr2, + &cpu_atmega645, + &cpu_atmega6450, + &cpu_atmega6450a, + &cpu_atmega6450p, + &cpu_atmega645a, + &cpu_atmega645p, + &cpu_atmega649, + &cpu_atmega6490, + &cpu_atmega6490a, + &cpu_atmega6490p, + &cpu_atmega649a, + &cpu_atmega649p, + &cpu_atmega64a, + &cpu_atmega64c1, + &cpu_atmega64hve, + &cpu_atmega64m1, + &cpu_atmega64rfr2, + &cpu_atmega8, + &cpu_atmega8515, + &cpu_atmega8535, + &cpu_atmega88, + &cpu_atmega88a, + &cpu_atmega88p, + &cpu_atmega88pa, + &cpu_atmega8a, + &cpu_atmega8hva, + &cpu_atmega8u2, + &cpu_attiny10, + &cpu_attiny102, + &cpu_attiny104, + &cpu_attiny11, + &cpu_attiny12, + &cpu_attiny13, + &cpu_attiny13a, + &cpu_attiny15, + &cpu_attiny1634, + &cpu_attiny167, + &cpu_attiny20, + &cpu_attiny22, + &cpu_attiny2313, + &cpu_attiny2313a, + &cpu_attiny24, + &cpu_attiny24a, + &cpu_attiny25, + &cpu_attiny26, + &cpu_attiny261, + &cpu_attiny261a, + &cpu_attiny28, + &cpu_attiny4, + &cpu_attiny40, + &cpu_attiny4313, + &cpu_attiny43u, + &cpu_attiny44, + &cpu_attiny44a, + &cpu_attiny45, + &cpu_attiny461, + &cpu_attiny461a, + &cpu_attiny48, + &cpu_attiny5, + &cpu_attiny828, + &cpu_attiny84, + &cpu_attiny84a, + &cpu_attiny85, + &cpu_attiny861, + &cpu_attiny861a, + &cpu_attiny87, + &cpu_attiny88, + &cpu_attiny9, + &cpu_atxmega128a1, + &cpu_atxmega128a1u, + &cpu_atxmega128a3, + &cpu_atxmega128a3u, + &cpu_atxmega128a4u, + &cpu_atxmega128b1, + &cpu_atxmega128b3, + &cpu_atxmega128c3, + &cpu_atxmega128d3, + &cpu_atxmega128d4, + &cpu_atxmega16a4, + &cpu_atxmega16a4u, + &cpu_atxmega16c4, + &cpu_atxmega16d4, + &cpu_atxmega16e5, + &cpu_atxmega192a3, + &cpu_atxmega192a3u, + &cpu_atxmega192c3, + &cpu_atxmega192d3, + &cpu_atxmega256a3, + &cpu_atxmega256a3b, + &cpu_atxmega256a3bu, + &cpu_atxmega256a3u, + &cpu_atxmega256c3, + &cpu_atxmega256d3, + &cpu_atxmega32a4, + &cpu_atxmega32a4u, + &cpu_atxmega32c4, + &cpu_atxmega32d4, + &cpu_atxmega32e5, + &cpu_atxmega32x1, + &cpu_atxmega384c3, + &cpu_atxmega384d3, + &cpu_atxmega64a1, + &cpu_atxmega64a1u, + &cpu_atxmega64a3, + &cpu_atxmega64a3u, + &cpu_atxmega64a4u, + &cpu_atxmega64b1, + &cpu_atxmega64b3, + &cpu_atxmega64c3, + &cpu_atxmega64d3, + &cpu_atxmega64d4, + &cpu_atxmega8e5, + &cpu_avr1, + &cpu_avr2, + &cpu_avr25, + &cpu_avr3, + &cpu_avr31, + &cpu_avr35, + &cpu_avr4, + &cpu_avr5, + &cpu_avr51, + &cpu_avr6, + &cpu_avrtiny, + &cpu_avrxmega1, + &cpu_avrxmega2, + &cpu_avrxmega3, + &cpu_avrxmega4, + &cpu_avrxmega5, + &cpu_avrxmega6, + &cpu_avrxmega7, + &cpu_m3000, +}; diff --git a/lib/std/target/bpf.zig b/lib/std/target/bpf.zig new file mode 100644 index 000000000000..62c69746f8e9 --- /dev/null +++ b/lib/std/target/bpf.zig @@ -0,0 +1,75 @@ +const Feature = @import("std").target.Feature; +const Cpu = @import("std").target.Cpu; + +pub const feature_alu32 = Feature{ + .name = "alu32", + .llvm_name = "alu32", + .description = "Enable ALU32 instructions", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_dummy = Feature{ + .name = "dummy", + .llvm_name = "dummy", + .description = "unused feature", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_dwarfris = Feature{ + .name = "dwarfris", + .llvm_name = "dwarfris", + .description = "Disable MCAsmInfo DwarfUsesRelocationsAcrossSections", + .dependencies = &[_]*const Feature { + }, +}; + +pub const features = &[_]*const Feature { + &feature_alu32, + &feature_dummy, + &feature_dwarfris, +}; + +pub const cpu_generic = Cpu{ + .name = "generic", + .llvm_name = "generic", + .dependencies = &[_]*const Feature { + }, +}; + +pub const cpu_probe = Cpu{ + .name = "probe", + .llvm_name = "probe", + .dependencies = &[_]*const Feature { + }, +}; + +pub const cpu_v1 = Cpu{ + .name = "v1", + .llvm_name = "v1", + .dependencies = &[_]*const Feature { + }, +}; + +pub const cpu_v2 = Cpu{ + .name = "v2", + .llvm_name = "v2", + .dependencies = &[_]*const Feature { + }, +}; + +pub const cpu_v3 = Cpu{ + .name = "v3", + .llvm_name = "v3", + .dependencies = &[_]*const Feature { + }, +}; + +pub const cpus = &[_]*const Cpu { + &cpu_generic, + &cpu_probe, + &cpu_v1, + &cpu_v2, + &cpu_v3, +}; diff --git a/lib/std/target/hexagon.zig b/lib/std/target/hexagon.zig new file mode 100644 index 000000000000..54f59d651afd --- /dev/null +++ b/lib/std/target/hexagon.zig @@ -0,0 +1,200 @@ +const Feature = @import("std").target.Feature; +const Cpu = @import("std").target.Cpu; + +pub const feature_duplex = Feature{ + .name = "duplex", + .llvm_name = "duplex", + .description = "Enable generation of duplex instruction", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_longCalls = Feature{ + .name = "longCalls", + .llvm_name = "long-calls", + .description = "Use constant-extended calls", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_mem_noshuf = Feature{ + .name = "mem_noshuf", + .llvm_name = "mem_noshuf", + .description = "Supports mem_noshuf feature", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_memops = Feature{ + .name = "memops", + .llvm_name = "memops", + .description = "Use memop instructions", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_nvj = Feature{ + .name = "nvj", + .llvm_name = "nvj", + .description = "Support for new-value jumps", + .dependencies = &[_]*const Feature { + &feature_packets, + }, +}; + +pub const feature_nvs = Feature{ + .name = "nvs", + .llvm_name = "nvs", + .description = "Support for new-value stores", + .dependencies = &[_]*const Feature { + &feature_packets, + }, +}; + +pub const feature_noreturnStackElim = Feature{ + .name = "noreturnStackElim", + .llvm_name = "noreturn-stack-elim", + .description = "Eliminate stack allocation in a noreturn function when possible", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_packets = Feature{ + .name = "packets", + .llvm_name = "packets", + .description = "Support for instruction packets", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_reservedR19 = Feature{ + .name = "reservedR19", + .llvm_name = "reserved-r19", + .description = "Reserve register R19", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_smallData = Feature{ + .name = "smallData", + .llvm_name = "small-data", + .description = "Allow GP-relative addressing of global variables", + .dependencies = &[_]*const Feature { + }, +}; + +pub const features = &[_]*const Feature { + &feature_duplex, + &feature_longCalls, + &feature_mem_noshuf, + &feature_memops, + &feature_nvj, + &feature_nvs, + &feature_noreturnStackElim, + &feature_packets, + &feature_reservedR19, + &feature_smallData, +}; + +pub const cpu_generic = Cpu{ + .name = "generic", + .llvm_name = "generic", + .dependencies = &[_]*const Feature { + &feature_duplex, + &feature_memops, + &feature_packets, + &feature_nvj, + &feature_nvs, + &feature_smallData, + }, +}; + +pub const cpu_hexagonv5 = Cpu{ + .name = "hexagonv5", + .llvm_name = "hexagonv5", + .dependencies = &[_]*const Feature { + &feature_duplex, + &feature_memops, + &feature_packets, + &feature_nvj, + &feature_nvs, + &feature_smallData, + }, +}; + +pub const cpu_hexagonv55 = Cpu{ + .name = "hexagonv55", + .llvm_name = "hexagonv55", + .dependencies = &[_]*const Feature { + &feature_duplex, + &feature_memops, + &feature_packets, + &feature_nvj, + &feature_nvs, + &feature_smallData, + }, +}; + +pub const cpu_hexagonv60 = Cpu{ + .name = "hexagonv60", + .llvm_name = "hexagonv60", + .dependencies = &[_]*const Feature { + &feature_duplex, + &feature_memops, + &feature_packets, + &feature_nvj, + &feature_nvs, + &feature_smallData, + }, +}; + +pub const cpu_hexagonv62 = Cpu{ + .name = "hexagonv62", + .llvm_name = "hexagonv62", + .dependencies = &[_]*const Feature { + &feature_duplex, + &feature_memops, + &feature_packets, + &feature_nvj, + &feature_nvs, + &feature_smallData, + }, +}; + +pub const cpu_hexagonv65 = Cpu{ + .name = "hexagonv65", + .llvm_name = "hexagonv65", + .dependencies = &[_]*const Feature { + &feature_duplex, + &feature_mem_noshuf, + &feature_memops, + &feature_packets, + &feature_nvj, + &feature_nvs, + &feature_smallData, + }, +}; + +pub const cpu_hexagonv66 = Cpu{ + .name = "hexagonv66", + .llvm_name = "hexagonv66", + .dependencies = &[_]*const Feature { + &feature_duplex, + &feature_mem_noshuf, + &feature_memops, + &feature_packets, + &feature_nvj, + &feature_nvs, + &feature_smallData, + }, +}; + +pub const cpus = &[_]*const Cpu { + &cpu_generic, + &cpu_hexagonv5, + &cpu_hexagonv55, + &cpu_hexagonv60, + &cpu_hexagonv62, + &cpu_hexagonv65, + &cpu_hexagonv66, +}; diff --git a/lib/std/target/mips.zig b/lib/std/target/mips.zig new file mode 100644 index 000000000000..7c7bb3bfbe2d --- /dev/null +++ b/lib/std/target/mips.zig @@ -0,0 +1,819 @@ +const Feature = @import("std").target.Feature; +const Cpu = @import("std").target.Cpu; + +pub const feature_abs2008 = Feature{ + .name = "abs2008", + .llvm_name = "abs2008", + .description = "Disable IEEE 754-2008 abs.fmt mode", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_crc = Feature{ + .name = "crc", + .llvm_name = "crc", + .description = "Mips R6 CRC ASE", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_cnmips = Feature{ + .name = "cnmips", + .llvm_name = "cnmips", + .description = "Octeon cnMIPS Support", + .dependencies = &[_]*const Feature { + &feature_mips4_32, + &feature_mips5_32r2, + &feature_mips3_32r2, + &feature_mips3_32, + &feature_mips4_32r2, + &feature_gp64, + &feature_mips1, + &feature_fp64, + }, +}; + +pub const feature_dsp = Feature{ + .name = "dsp", + .llvm_name = "dsp", + .description = "Mips DSP ASE", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_dspr2 = Feature{ + .name = "dspr2", + .llvm_name = "dspr2", + .description = "Mips DSP-R2 ASE", + .dependencies = &[_]*const Feature { + &feature_dsp, + }, +}; + +pub const feature_dspr3 = Feature{ + .name = "dspr3", + .llvm_name = "dspr3", + .description = "Mips DSP-R3 ASE", + .dependencies = &[_]*const Feature { + &feature_dsp, + }, +}; + +pub const feature_eva = Feature{ + .name = "eva", + .llvm_name = "eva", + .description = "Mips EVA ASE", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_fp64 = Feature{ + .name = "fp64", + .llvm_name = "fp64", + .description = "Support 64-bit FP registers", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_fpxx = Feature{ + .name = "fpxx", + .llvm_name = "fpxx", + .description = "Support for FPXX", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_ginv = Feature{ + .name = "ginv", + .llvm_name = "ginv", + .description = "Mips Global Invalidate ASE", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_gp64 = Feature{ + .name = "gp64", + .llvm_name = "gp64", + .description = "General Purpose Registers are 64-bit wide", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_longCalls = Feature{ + .name = "longCalls", + .llvm_name = "long-calls", + .description = "Disable use of the jal instruction", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_msa = Feature{ + .name = "msa", + .llvm_name = "msa", + .description = "Mips MSA ASE", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_mt = Feature{ + .name = "mt", + .llvm_name = "mt", + .description = "Mips MT ASE", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_nomadd4 = Feature{ + .name = "nomadd4", + .llvm_name = "nomadd4", + .description = "Disable 4-operand madd.fmt and related instructions", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_micromips = Feature{ + .name = "micromips", + .llvm_name = "micromips", + .description = "microMips mode", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_mips1 = Feature{ + .name = "mips1", + .llvm_name = "mips1", + .description = "Mips I ISA Support [highly experimental]", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_mips2 = Feature{ + .name = "mips2", + .llvm_name = "mips2", + .description = "Mips II ISA Support [highly experimental]", + .dependencies = &[_]*const Feature { + &feature_mips1, + }, +}; + +pub const feature_mips3 = Feature{ + .name = "mips3", + .llvm_name = "mips3", + .description = "MIPS III ISA Support [highly experimental]", + .dependencies = &[_]*const Feature { + &feature_mips3_32r2, + &feature_mips3_32, + &feature_gp64, + &feature_mips1, + &feature_fp64, + }, +}; + +pub const feature_mips3_32 = Feature{ + .name = "mips3_32", + .llvm_name = "mips3_32", + .description = "Subset of MIPS-III that is also in MIPS32 [highly experimental]", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_mips3_32r2 = Feature{ + .name = "mips3_32r2", + .llvm_name = "mips3_32r2", + .description = "Subset of MIPS-III that is also in MIPS32r2 [highly experimental]", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_mips4 = Feature{ + .name = "mips4", + .llvm_name = "mips4", + .description = "MIPS IV ISA Support", + .dependencies = &[_]*const Feature { + &feature_mips4_32, + &feature_mips3_32r2, + &feature_mips3_32, + &feature_mips4_32r2, + &feature_gp64, + &feature_mips1, + &feature_fp64, + }, +}; + +pub const feature_mips4_32 = Feature{ + .name = "mips4_32", + .llvm_name = "mips4_32", + .description = "Subset of MIPS-IV that is also in MIPS32 [highly experimental]", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_mips4_32r2 = Feature{ + .name = "mips4_32r2", + .llvm_name = "mips4_32r2", + .description = "Subset of MIPS-IV that is also in MIPS32r2 [highly experimental]", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_mips5 = Feature{ + .name = "mips5", + .llvm_name = "mips5", + .description = "MIPS V ISA Support [highly experimental]", + .dependencies = &[_]*const Feature { + &feature_mips4_32, + &feature_mips5_32r2, + &feature_mips3_32r2, + &feature_mips3_32, + &feature_mips4_32r2, + &feature_gp64, + &feature_mips1, + &feature_fp64, + }, +}; + +pub const feature_mips5_32r2 = Feature{ + .name = "mips5_32r2", + .llvm_name = "mips5_32r2", + .description = "Subset of MIPS-V that is also in MIPS32r2 [highly experimental]", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_mips16 = Feature{ + .name = "mips16", + .llvm_name = "mips16", + .description = "Mips16 mode", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_mips32 = Feature{ + .name = "mips32", + .llvm_name = "mips32", + .description = "Mips32 ISA Support", + .dependencies = &[_]*const Feature { + &feature_mips3_32, + &feature_mips4_32, + &feature_mips1, + }, +}; + +pub const feature_mips32r2 = Feature{ + .name = "mips32r2", + .llvm_name = "mips32r2", + .description = "Mips32r2 ISA Support", + .dependencies = &[_]*const Feature { + &feature_mips4_32, + &feature_mips5_32r2, + &feature_mips3_32r2, + &feature_mips3_32, + &feature_mips4_32r2, + &feature_mips1, + }, +}; + +pub const feature_mips32r3 = Feature{ + .name = "mips32r3", + .llvm_name = "mips32r3", + .description = "Mips32r3 ISA Support", + .dependencies = &[_]*const Feature { + &feature_mips4_32, + &feature_mips5_32r2, + &feature_mips3_32r2, + &feature_mips3_32, + &feature_mips4_32r2, + &feature_mips1, + }, +}; + +pub const feature_mips32r5 = Feature{ + .name = "mips32r5", + .llvm_name = "mips32r5", + .description = "Mips32r5 ISA Support", + .dependencies = &[_]*const Feature { + &feature_mips4_32, + &feature_mips5_32r2, + &feature_mips3_32r2, + &feature_mips3_32, + &feature_mips4_32r2, + &feature_mips1, + }, +}; + +pub const feature_mips32r6 = Feature{ + .name = "mips32r6", + .llvm_name = "mips32r6", + .description = "Mips32r6 ISA Support [experimental]", + .dependencies = &[_]*const Feature { + &feature_mips4_32, + &feature_mips5_32r2, + &feature_mips3_32r2, + &feature_mips3_32, + &feature_mips4_32r2, + &feature_nan2008, + &feature_mips1, + &feature_fp64, + &feature_abs2008, + }, +}; + +pub const feature_mips64 = Feature{ + .name = "mips64", + .llvm_name = "mips64", + .description = "Mips64 ISA Support", + .dependencies = &[_]*const Feature { + &feature_mips4_32, + &feature_mips5_32r2, + &feature_mips3_32r2, + &feature_mips3_32, + &feature_mips4_32r2, + &feature_gp64, + &feature_mips1, + &feature_fp64, + }, +}; + +pub const feature_mips64r2 = Feature{ + .name = "mips64r2", + .llvm_name = "mips64r2", + .description = "Mips64r2 ISA Support", + .dependencies = &[_]*const Feature { + &feature_mips4_32, + &feature_mips5_32r2, + &feature_mips3_32r2, + &feature_mips3_32, + &feature_mips4_32r2, + &feature_gp64, + &feature_mips1, + &feature_fp64, + }, +}; + +pub const feature_mips64r3 = Feature{ + .name = "mips64r3", + .llvm_name = "mips64r3", + .description = "Mips64r3 ISA Support", + .dependencies = &[_]*const Feature { + &feature_mips4_32, + &feature_mips5_32r2, + &feature_mips3_32r2, + &feature_mips3_32, + &feature_mips4_32r2, + &feature_gp64, + &feature_mips1, + &feature_fp64, + }, +}; + +pub const feature_mips64r5 = Feature{ + .name = "mips64r5", + .llvm_name = "mips64r5", + .description = "Mips64r5 ISA Support", + .dependencies = &[_]*const Feature { + &feature_mips4_32, + &feature_mips5_32r2, + &feature_mips3_32r2, + &feature_mips3_32, + &feature_mips4_32r2, + &feature_gp64, + &feature_mips1, + &feature_fp64, + }, +}; + +pub const feature_mips64r6 = Feature{ + .name = "mips64r6", + .llvm_name = "mips64r6", + .description = "Mips64r6 ISA Support [experimental]", + .dependencies = &[_]*const Feature { + &feature_mips4_32, + &feature_mips5_32r2, + &feature_mips3_32r2, + &feature_mips3_32, + &feature_mips4_32r2, + &feature_nan2008, + &feature_gp64, + &feature_mips1, + &feature_fp64, + &feature_abs2008, + }, +}; + +pub const feature_nan2008 = Feature{ + .name = "nan2008", + .llvm_name = "nan2008", + .description = "IEEE 754-2008 NaN encoding", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_noabicalls = Feature{ + .name = "noabicalls", + .llvm_name = "noabicalls", + .description = "Disable SVR4-style position-independent code", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_nooddspreg = Feature{ + .name = "nooddspreg", + .llvm_name = "nooddspreg", + .description = "Disable odd numbered single-precision registers", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_ptr64 = Feature{ + .name = "ptr64", + .llvm_name = "ptr64", + .description = "Pointers are 64-bit wide", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_singleFloat = Feature{ + .name = "singleFloat", + .llvm_name = "single-float", + .description = "Only supports single precision float", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_softFloat = Feature{ + .name = "softFloat", + .llvm_name = "soft-float", + .description = "Does not support floating point instructions", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_sym32 = Feature{ + .name = "sym32", + .llvm_name = "sym32", + .description = "Symbols are 32 bit on Mips64", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_useIndirectJumpHazard = Feature{ + .name = "useIndirectJumpHazard", + .llvm_name = "use-indirect-jump-hazard", + .description = "Use indirect jump guards to prevent certain speculation based attacks", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_useTccInDiv = Feature{ + .name = "useTccInDiv", + .llvm_name = "use-tcc-in-div", + .description = "Force the assembler to use trapping", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_vfpu = Feature{ + .name = "vfpu", + .llvm_name = "vfpu", + .description = "Enable vector FPU instructions", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_virt = Feature{ + .name = "virt", + .llvm_name = "virt", + .description = "Mips Virtualization ASE", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_p5600 = Feature{ + .name = "p5600", + .llvm_name = "p5600", + .description = "The P5600 Processor", + .dependencies = &[_]*const Feature { + &feature_mips4_32, + &feature_mips5_32r2, + &feature_mips3_32r2, + &feature_mips3_32, + &feature_mips4_32r2, + &feature_mips1, + }, +}; + +pub const features = &[_]*const Feature { + &feature_abs2008, + &feature_crc, + &feature_cnmips, + &feature_dsp, + &feature_dspr2, + &feature_dspr3, + &feature_eva, + &feature_fp64, + &feature_fpxx, + &feature_ginv, + &feature_gp64, + &feature_longCalls, + &feature_msa, + &feature_mt, + &feature_nomadd4, + &feature_micromips, + &feature_mips1, + &feature_mips2, + &feature_mips3, + &feature_mips3_32, + &feature_mips3_32r2, + &feature_mips4, + &feature_mips4_32, + &feature_mips4_32r2, + &feature_mips5, + &feature_mips5_32r2, + &feature_mips16, + &feature_mips32, + &feature_mips32r2, + &feature_mips32r3, + &feature_mips32r5, + &feature_mips32r6, + &feature_mips64, + &feature_mips64r2, + &feature_mips64r3, + &feature_mips64r5, + &feature_mips64r6, + &feature_nan2008, + &feature_noabicalls, + &feature_nooddspreg, + &feature_ptr64, + &feature_singleFloat, + &feature_softFloat, + &feature_sym32, + &feature_useIndirectJumpHazard, + &feature_useTccInDiv, + &feature_vfpu, + &feature_virt, + &feature_p5600, +}; + +pub const cpu_mips1 = Cpu{ + .name = "mips1", + .llvm_name = "mips1", + .dependencies = &[_]*const Feature { + &feature_mips1, + }, +}; + +pub const cpu_mips2 = Cpu{ + .name = "mips2", + .llvm_name = "mips2", + .dependencies = &[_]*const Feature { + &feature_mips1, + &feature_mips2, + }, +}; + +pub const cpu_mips3 = Cpu{ + .name = "mips3", + .llvm_name = "mips3", + .dependencies = &[_]*const Feature { + &feature_mips3_32r2, + &feature_mips3_32, + &feature_gp64, + &feature_mips1, + &feature_fp64, + &feature_mips3, + }, +}; + +pub const cpu_mips32 = Cpu{ + .name = "mips32", + .llvm_name = "mips32", + .dependencies = &[_]*const Feature { + &feature_mips3_32, + &feature_mips4_32, + &feature_mips1, + &feature_mips32, + }, +}; + +pub const cpu_mips32r2 = Cpu{ + .name = "mips32r2", + .llvm_name = "mips32r2", + .dependencies = &[_]*const Feature { + &feature_mips4_32, + &feature_mips5_32r2, + &feature_mips3_32r2, + &feature_mips3_32, + &feature_mips4_32r2, + &feature_mips1, + &feature_mips32r2, + }, +}; + +pub const cpu_mips32r3 = Cpu{ + .name = "mips32r3", + .llvm_name = "mips32r3", + .dependencies = &[_]*const Feature { + &feature_mips4_32, + &feature_mips5_32r2, + &feature_mips3_32r2, + &feature_mips3_32, + &feature_mips4_32r2, + &feature_mips1, + &feature_mips32r3, + }, +}; + +pub const cpu_mips32r5 = Cpu{ + .name = "mips32r5", + .llvm_name = "mips32r5", + .dependencies = &[_]*const Feature { + &feature_mips4_32, + &feature_mips5_32r2, + &feature_mips3_32r2, + &feature_mips3_32, + &feature_mips4_32r2, + &feature_mips1, + &feature_mips32r5, + }, +}; + +pub const cpu_mips32r6 = Cpu{ + .name = "mips32r6", + .llvm_name = "mips32r6", + .dependencies = &[_]*const Feature { + &feature_mips4_32, + &feature_mips5_32r2, + &feature_mips3_32r2, + &feature_mips3_32, + &feature_mips4_32r2, + &feature_nan2008, + &feature_mips1, + &feature_fp64, + &feature_abs2008, + &feature_mips32r6, + }, +}; + +pub const cpu_mips4 = Cpu{ + .name = "mips4", + .llvm_name = "mips4", + .dependencies = &[_]*const Feature { + &feature_mips4_32, + &feature_mips3_32r2, + &feature_mips3_32, + &feature_mips4_32r2, + &feature_gp64, + &feature_mips1, + &feature_fp64, + &feature_mips4, + }, +}; + +pub const cpu_mips5 = Cpu{ + .name = "mips5", + .llvm_name = "mips5", + .dependencies = &[_]*const Feature { + &feature_mips4_32, + &feature_mips5_32r2, + &feature_mips3_32r2, + &feature_mips3_32, + &feature_mips4_32r2, + &feature_gp64, + &feature_mips1, + &feature_fp64, + &feature_mips5, + }, +}; + +pub const cpu_mips64 = Cpu{ + .name = "mips64", + .llvm_name = "mips64", + .dependencies = &[_]*const Feature { + &feature_mips4_32, + &feature_mips5_32r2, + &feature_mips3_32r2, + &feature_mips3_32, + &feature_mips4_32r2, + &feature_gp64, + &feature_mips1, + &feature_fp64, + &feature_mips64, + }, +}; + +pub const cpu_mips64r2 = Cpu{ + .name = "mips64r2", + .llvm_name = "mips64r2", + .dependencies = &[_]*const Feature { + &feature_mips4_32, + &feature_mips5_32r2, + &feature_mips3_32r2, + &feature_mips3_32, + &feature_mips4_32r2, + &feature_gp64, + &feature_mips1, + &feature_fp64, + &feature_mips64r2, + }, +}; + +pub const cpu_mips64r3 = Cpu{ + .name = "mips64r3", + .llvm_name = "mips64r3", + .dependencies = &[_]*const Feature { + &feature_mips4_32, + &feature_mips5_32r2, + &feature_mips3_32r2, + &feature_mips3_32, + &feature_mips4_32r2, + &feature_gp64, + &feature_mips1, + &feature_fp64, + &feature_mips64r3, + }, +}; + +pub const cpu_mips64r5 = Cpu{ + .name = "mips64r5", + .llvm_name = "mips64r5", + .dependencies = &[_]*const Feature { + &feature_mips4_32, + &feature_mips5_32r2, + &feature_mips3_32r2, + &feature_mips3_32, + &feature_mips4_32r2, + &feature_gp64, + &feature_mips1, + &feature_fp64, + &feature_mips64r5, + }, +}; + +pub const cpu_mips64r6 = Cpu{ + .name = "mips64r6", + .llvm_name = "mips64r6", + .dependencies = &[_]*const Feature { + &feature_mips4_32, + &feature_mips5_32r2, + &feature_mips3_32r2, + &feature_mips3_32, + &feature_mips4_32r2, + &feature_nan2008, + &feature_gp64, + &feature_mips1, + &feature_fp64, + &feature_abs2008, + &feature_mips64r6, + }, +}; + +pub const cpu_octeon = Cpu{ + .name = "octeon", + .llvm_name = "octeon", + .dependencies = &[_]*const Feature { + &feature_mips4_32, + &feature_mips5_32r2, + &feature_mips3_32r2, + &feature_mips3_32, + &feature_mips4_32r2, + &feature_gp64, + &feature_mips1, + &feature_fp64, + &feature_cnmips, + &feature_mips64r2, + }, +}; + +pub const cpu_p5600 = Cpu{ + .name = "p5600", + .llvm_name = "p5600", + .dependencies = &[_]*const Feature { + &feature_mips4_32, + &feature_mips5_32r2, + &feature_mips3_32r2, + &feature_mips3_32, + &feature_mips4_32r2, + &feature_mips1, + &feature_p5600, + }, +}; + +pub const cpus = &[_]*const Cpu { + &cpu_mips1, + &cpu_mips2, + &cpu_mips3, + &cpu_mips32, + &cpu_mips32r2, + &cpu_mips32r3, + &cpu_mips32r5, + &cpu_mips32r6, + &cpu_mips4, + &cpu_mips5, + &cpu_mips64, + &cpu_mips64r2, + &cpu_mips64r3, + &cpu_mips64r5, + &cpu_mips64r6, + &cpu_octeon, + &cpu_p5600, +}; diff --git a/lib/std/target/msp430.zig b/lib/std/target/msp430.zig new file mode 100644 index 000000000000..75e641f0dc3e --- /dev/null +++ b/lib/std/target/msp430.zig @@ -0,0 +1,69 @@ +const Feature = @import("std").target.Feature; +const Cpu = @import("std").target.Cpu; + +pub const feature_hwmult16 = Feature{ + .name = "hwmult16", + .llvm_name = "hwmult16", + .description = "Enable 16-bit hardware multiplier", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_hwmult32 = Feature{ + .name = "hwmult32", + .llvm_name = "hwmult32", + .description = "Enable 32-bit hardware multiplier", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_hwmultf5 = Feature{ + .name = "hwmultf5", + .llvm_name = "hwmultf5", + .description = "Enable F5 series hardware multiplier", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_ext = Feature{ + .name = "ext", + .llvm_name = "ext", + .description = "Enable MSP430-X extensions", + .dependencies = &[_]*const Feature { + }, +}; + +pub const features = &[_]*const Feature { + &feature_hwmult16, + &feature_hwmult32, + &feature_hwmultf5, + &feature_ext, +}; + +pub const cpu_generic = Cpu{ + .name = "generic", + .llvm_name = "generic", + .dependencies = &[_]*const Feature { + }, +}; + +pub const cpu_msp430 = Cpu{ + .name = "msp430", + .llvm_name = "msp430", + .dependencies = &[_]*const Feature { + }, +}; + +pub const cpu_msp430x = Cpu{ + .name = "msp430x", + .llvm_name = "msp430x", + .dependencies = &[_]*const Feature { + &feature_ext, + }, +}; + +pub const cpus = &[_]*const Cpu { + &cpu_generic, + &cpu_msp430, + &cpu_msp430x, +}; diff --git a/lib/std/target/nvptx.zig b/lib/std/target/nvptx.zig new file mode 100644 index 000000000000..cddd800f30f4 --- /dev/null +++ b/lib/std/target/nvptx.zig @@ -0,0 +1,379 @@ +const Feature = @import("std").target.Feature; +const Cpu = @import("std").target.Cpu; + +pub const feature_ptx32 = Feature{ + .name = "ptx32", + .llvm_name = "ptx32", + .description = "Use PTX version 3.2", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_ptx40 = Feature{ + .name = "ptx40", + .llvm_name = "ptx40", + .description = "Use PTX version 4.0", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_ptx41 = Feature{ + .name = "ptx41", + .llvm_name = "ptx41", + .description = "Use PTX version 4.1", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_ptx42 = Feature{ + .name = "ptx42", + .llvm_name = "ptx42", + .description = "Use PTX version 4.2", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_ptx43 = Feature{ + .name = "ptx43", + .llvm_name = "ptx43", + .description = "Use PTX version 4.3", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_ptx50 = Feature{ + .name = "ptx50", + .llvm_name = "ptx50", + .description = "Use PTX version 5.0", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_ptx60 = Feature{ + .name = "ptx60", + .llvm_name = "ptx60", + .description = "Use PTX version 6.0", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_ptx61 = Feature{ + .name = "ptx61", + .llvm_name = "ptx61", + .description = "Use PTX version 6.1", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_ptx63 = Feature{ + .name = "ptx63", + .llvm_name = "ptx63", + .description = "Use PTX version 6.3", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_ptx64 = Feature{ + .name = "ptx64", + .llvm_name = "ptx64", + .description = "Use PTX version 6.4", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_sm_20 = Feature{ + .name = "sm_20", + .llvm_name = "sm_20", + .description = "Target SM 2.0", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_sm_21 = Feature{ + .name = "sm_21", + .llvm_name = "sm_21", + .description = "Target SM 2.1", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_sm_30 = Feature{ + .name = "sm_30", + .llvm_name = "sm_30", + .description = "Target SM 3.0", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_sm_32 = Feature{ + .name = "sm_32", + .llvm_name = "sm_32", + .description = "Target SM 3.2", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_sm_35 = Feature{ + .name = "sm_35", + .llvm_name = "sm_35", + .description = "Target SM 3.5", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_sm_37 = Feature{ + .name = "sm_37", + .llvm_name = "sm_37", + .description = "Target SM 3.7", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_sm_50 = Feature{ + .name = "sm_50", + .llvm_name = "sm_50", + .description = "Target SM 5.0", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_sm_52 = Feature{ + .name = "sm_52", + .llvm_name = "sm_52", + .description = "Target SM 5.2", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_sm_53 = Feature{ + .name = "sm_53", + .llvm_name = "sm_53", + .description = "Target SM 5.3", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_sm_60 = Feature{ + .name = "sm_60", + .llvm_name = "sm_60", + .description = "Target SM 6.0", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_sm_61 = Feature{ + .name = "sm_61", + .llvm_name = "sm_61", + .description = "Target SM 6.1", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_sm_62 = Feature{ + .name = "sm_62", + .llvm_name = "sm_62", + .description = "Target SM 6.2", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_sm_70 = Feature{ + .name = "sm_70", + .llvm_name = "sm_70", + .description = "Target SM 7.0", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_sm_72 = Feature{ + .name = "sm_72", + .llvm_name = "sm_72", + .description = "Target SM 7.2", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_sm_75 = Feature{ + .name = "sm_75", + .llvm_name = "sm_75", + .description = "Target SM 7.5", + .dependencies = &[_]*const Feature { + }, +}; + +pub const features = &[_]*const Feature { + &feature_ptx32, + &feature_ptx40, + &feature_ptx41, + &feature_ptx42, + &feature_ptx43, + &feature_ptx50, + &feature_ptx60, + &feature_ptx61, + &feature_ptx63, + &feature_ptx64, + &feature_sm_20, + &feature_sm_21, + &feature_sm_30, + &feature_sm_32, + &feature_sm_35, + &feature_sm_37, + &feature_sm_50, + &feature_sm_52, + &feature_sm_53, + &feature_sm_60, + &feature_sm_61, + &feature_sm_62, + &feature_sm_70, + &feature_sm_72, + &feature_sm_75, +}; + +pub const cpu_sm_20 = Cpu{ + .name = "sm_20", + .llvm_name = "sm_20", + .dependencies = &[_]*const Feature { + &feature_sm_20, + }, +}; + +pub const cpu_sm_21 = Cpu{ + .name = "sm_21", + .llvm_name = "sm_21", + .dependencies = &[_]*const Feature { + &feature_sm_21, + }, +}; + +pub const cpu_sm_30 = Cpu{ + .name = "sm_30", + .llvm_name = "sm_30", + .dependencies = &[_]*const Feature { + &feature_sm_30, + }, +}; + +pub const cpu_sm_32 = Cpu{ + .name = "sm_32", + .llvm_name = "sm_32", + .dependencies = &[_]*const Feature { + &feature_ptx40, + &feature_sm_32, + }, +}; + +pub const cpu_sm_35 = Cpu{ + .name = "sm_35", + .llvm_name = "sm_35", + .dependencies = &[_]*const Feature { + &feature_sm_35, + }, +}; + +pub const cpu_sm_37 = Cpu{ + .name = "sm_37", + .llvm_name = "sm_37", + .dependencies = &[_]*const Feature { + &feature_ptx41, + &feature_sm_37, + }, +}; + +pub const cpu_sm_50 = Cpu{ + .name = "sm_50", + .llvm_name = "sm_50", + .dependencies = &[_]*const Feature { + &feature_ptx40, + &feature_sm_50, + }, +}; + +pub const cpu_sm_52 = Cpu{ + .name = "sm_52", + .llvm_name = "sm_52", + .dependencies = &[_]*const Feature { + &feature_ptx41, + &feature_sm_52, + }, +}; + +pub const cpu_sm_53 = Cpu{ + .name = "sm_53", + .llvm_name = "sm_53", + .dependencies = &[_]*const Feature { + &feature_ptx42, + &feature_sm_53, + }, +}; + +pub const cpu_sm_60 = Cpu{ + .name = "sm_60", + .llvm_name = "sm_60", + .dependencies = &[_]*const Feature { + &feature_ptx50, + &feature_sm_60, + }, +}; + +pub const cpu_sm_61 = Cpu{ + .name = "sm_61", + .llvm_name = "sm_61", + .dependencies = &[_]*const Feature { + &feature_ptx50, + &feature_sm_61, + }, +}; + +pub const cpu_sm_62 = Cpu{ + .name = "sm_62", + .llvm_name = "sm_62", + .dependencies = &[_]*const Feature { + &feature_ptx50, + &feature_sm_62, + }, +}; + +pub const cpu_sm_70 = Cpu{ + .name = "sm_70", + .llvm_name = "sm_70", + .dependencies = &[_]*const Feature { + &feature_ptx60, + &feature_sm_70, + }, +}; + +pub const cpu_sm_72 = Cpu{ + .name = "sm_72", + .llvm_name = "sm_72", + .dependencies = &[_]*const Feature { + &feature_ptx61, + &feature_sm_72, + }, +}; + +pub const cpu_sm_75 = Cpu{ + .name = "sm_75", + .llvm_name = "sm_75", + .dependencies = &[_]*const Feature { + &feature_ptx63, + &feature_sm_75, + }, +}; + +pub const cpus = &[_]*const Cpu { + &cpu_sm_20, + &cpu_sm_21, + &cpu_sm_30, + &cpu_sm_32, + &cpu_sm_35, + &cpu_sm_37, + &cpu_sm_50, + &cpu_sm_52, + &cpu_sm_53, + &cpu_sm_60, + &cpu_sm_61, + &cpu_sm_62, + &cpu_sm_70, + &cpu_sm_72, + &cpu_sm_75, +}; diff --git a/lib/std/target/powerpc.zig b/lib/std/target/powerpc.zig new file mode 100644 index 000000000000..f0d475a6e599 --- /dev/null +++ b/lib/std/target/powerpc.zig @@ -0,0 +1,1115 @@ +const Feature = @import("std").target.Feature; +const Cpu = @import("std").target.Cpu; + +pub const feature_bit64 = Feature{ + .name = "bit64", + .llvm_name = "64bit", + .description = "Enable 64-bit instructions", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_bitregs64 = Feature{ + .name = "bitregs64", + .llvm_name = "64bitregs", + .description = "Enable 64-bit registers usage for ppc32 [beta]", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_altivec = Feature{ + .name = "altivec", + .llvm_name = "altivec", + .description = "Enable Altivec instructions", + .dependencies = &[_]*const Feature { + &feature_hardFloat, + }, +}; + +pub const feature_bpermd = Feature{ + .name = "bpermd", + .llvm_name = "bpermd", + .description = "Enable the bpermd instruction", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_booke = Feature{ + .name = "booke", + .llvm_name = "booke", + .description = "Enable Book E instructions", + .dependencies = &[_]*const Feature { + &feature_icbt, + }, +}; + +pub const feature_cmpb = Feature{ + .name = "cmpb", + .llvm_name = "cmpb", + .description = "Enable the cmpb instruction", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_crbits = Feature{ + .name = "crbits", + .llvm_name = "crbits", + .description = "Use condition-register bits individually", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_directMove = Feature{ + .name = "directMove", + .llvm_name = "direct-move", + .description = "Enable Power8 direct move instructions", + .dependencies = &[_]*const Feature { + &feature_hardFloat, + }, +}; + +pub const feature_e500 = Feature{ + .name = "e500", + .llvm_name = "e500", + .description = "Enable E500/E500mc instructions", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_extdiv = Feature{ + .name = "extdiv", + .llvm_name = "extdiv", + .description = "Enable extended divide instructions", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_fcpsgn = Feature{ + .name = "fcpsgn", + .llvm_name = "fcpsgn", + .description = "Enable the fcpsgn instruction", + .dependencies = &[_]*const Feature { + &feature_hardFloat, + }, +}; + +pub const feature_fpcvt = Feature{ + .name = "fpcvt", + .llvm_name = "fpcvt", + .description = "Enable fc[ft]* (unsigned and single-precision) and lfiwzx instructions", + .dependencies = &[_]*const Feature { + &feature_hardFloat, + }, +}; + +pub const feature_fprnd = Feature{ + .name = "fprnd", + .llvm_name = "fprnd", + .description = "Enable the fri[mnpz] instructions", + .dependencies = &[_]*const Feature { + &feature_hardFloat, + }, +}; + +pub const feature_fpu = Feature{ + .name = "fpu", + .llvm_name = "fpu", + .description = "Enable classic FPU instructions", + .dependencies = &[_]*const Feature { + &feature_hardFloat, + }, +}; + +pub const feature_fre = Feature{ + .name = "fre", + .llvm_name = "fre", + .description = "Enable the fre instruction", + .dependencies = &[_]*const Feature { + &feature_hardFloat, + }, +}; + +pub const feature_fres = Feature{ + .name = "fres", + .llvm_name = "fres", + .description = "Enable the fres instruction", + .dependencies = &[_]*const Feature { + &feature_hardFloat, + }, +}; + +pub const feature_frsqrte = Feature{ + .name = "frsqrte", + .llvm_name = "frsqrte", + .description = "Enable the frsqrte instruction", + .dependencies = &[_]*const Feature { + &feature_hardFloat, + }, +}; + +pub const feature_frsqrtes = Feature{ + .name = "frsqrtes", + .llvm_name = "frsqrtes", + .description = "Enable the frsqrtes instruction", + .dependencies = &[_]*const Feature { + &feature_hardFloat, + }, +}; + +pub const feature_fsqrt = Feature{ + .name = "fsqrt", + .llvm_name = "fsqrt", + .description = "Enable the fsqrt instruction", + .dependencies = &[_]*const Feature { + &feature_hardFloat, + }, +}; + +pub const feature_float128 = Feature{ + .name = "float128", + .llvm_name = "float128", + .description = "Enable the __float128 data type for IEEE-754R Binary128.", + .dependencies = &[_]*const Feature { + &feature_hardFloat, + }, +}; + +pub const feature_htm = Feature{ + .name = "htm", + .llvm_name = "htm", + .description = "Enable Hardware Transactional Memory instructions", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_hardFloat = Feature{ + .name = "hardFloat", + .llvm_name = "hard-float", + .description = "Enable floating-point instructions", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_icbt = Feature{ + .name = "icbt", + .llvm_name = "icbt", + .description = "Enable icbt instruction", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_isaV30Instructions = Feature{ + .name = "isaV30Instructions", + .llvm_name = "isa-v30-instructions", + .description = "Enable instructions added in ISA 3.0.", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_isel = Feature{ + .name = "isel", + .llvm_name = "isel", + .description = "Enable the isel instruction", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_invariantFunctionDescriptors = Feature{ + .name = "invariantFunctionDescriptors", + .llvm_name = "invariant-function-descriptors", + .description = "Assume function descriptors are invariant", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_ldbrx = Feature{ + .name = "ldbrx", + .llvm_name = "ldbrx", + .description = "Enable the ldbrx instruction", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_lfiwax = Feature{ + .name = "lfiwax", + .llvm_name = "lfiwax", + .description = "Enable the lfiwax instruction", + .dependencies = &[_]*const Feature { + &feature_hardFloat, + }, +}; + +pub const feature_longcall = Feature{ + .name = "longcall", + .llvm_name = "longcall", + .description = "Always use indirect calls", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_mfocrf = Feature{ + .name = "mfocrf", + .llvm_name = "mfocrf", + .description = "Enable the MFOCRF instruction", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_msync = Feature{ + .name = "msync", + .llvm_name = "msync", + .description = "Has only the msync instruction instead of sync", + .dependencies = &[_]*const Feature { + &feature_icbt, + }, +}; + +pub const feature_power8Altivec = Feature{ + .name = "power8Altivec", + .llvm_name = "power8-altivec", + .description = "Enable POWER8 Altivec instructions", + .dependencies = &[_]*const Feature { + &feature_hardFloat, + }, +}; + +pub const feature_crypto = Feature{ + .name = "crypto", + .llvm_name = "crypto", + .description = "Enable POWER8 Crypto instructions", + .dependencies = &[_]*const Feature { + &feature_hardFloat, + }, +}; + +pub const feature_power8Vector = Feature{ + .name = "power8Vector", + .llvm_name = "power8-vector", + .description = "Enable POWER8 vector instructions", + .dependencies = &[_]*const Feature { + &feature_hardFloat, + }, +}; + +pub const feature_power9Altivec = Feature{ + .name = "power9Altivec", + .llvm_name = "power9-altivec", + .description = "Enable POWER9 Altivec instructions", + .dependencies = &[_]*const Feature { + &feature_isaV30Instructions, + &feature_hardFloat, + }, +}; + +pub const feature_power9Vector = Feature{ + .name = "power9Vector", + .llvm_name = "power9-vector", + .description = "Enable POWER9 vector instructions", + .dependencies = &[_]*const Feature { + &feature_isaV30Instructions, + &feature_hardFloat, + }, +}; + +pub const feature_popcntd = Feature{ + .name = "popcntd", + .llvm_name = "popcntd", + .description = "Enable the popcnt[dw] instructions", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_ppc4xx = Feature{ + .name = "ppc4xx", + .llvm_name = "ppc4xx", + .description = "Enable PPC 4xx instructions", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_ppc6xx = Feature{ + .name = "ppc6xx", + .llvm_name = "ppc6xx", + .description = "Enable PPC 6xx instructions", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_ppcPostraSched = Feature{ + .name = "ppcPostraSched", + .llvm_name = "ppc-postra-sched", + .description = "Use PowerPC post-RA scheduling strategy", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_ppcPreraSched = Feature{ + .name = "ppcPreraSched", + .llvm_name = "ppc-prera-sched", + .description = "Use PowerPC pre-RA scheduling strategy", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_partwordAtomics = Feature{ + .name = "partwordAtomics", + .llvm_name = "partword-atomics", + .description = "Enable l[bh]arx and st[bh]cx.", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_qpx = Feature{ + .name = "qpx", + .llvm_name = "qpx", + .description = "Enable QPX instructions", + .dependencies = &[_]*const Feature { + &feature_hardFloat, + }, +}; + +pub const feature_recipprec = Feature{ + .name = "recipprec", + .llvm_name = "recipprec", + .description = "Assume higher precision reciprocal estimates", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_spe = Feature{ + .name = "spe", + .llvm_name = "spe", + .description = "Enable SPE instructions", + .dependencies = &[_]*const Feature { + &feature_hardFloat, + }, +}; + +pub const feature_stfiwx = Feature{ + .name = "stfiwx", + .llvm_name = "stfiwx", + .description = "Enable the stfiwx instruction", + .dependencies = &[_]*const Feature { + &feature_hardFloat, + }, +}; + +pub const feature_securePlt = Feature{ + .name = "securePlt", + .llvm_name = "secure-plt", + .description = "Enable secure plt mode", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_slowPopcntd = Feature{ + .name = "slowPopcntd", + .llvm_name = "slow-popcntd", + .description = "Has slow popcnt[dw] instructions", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_twoConstNr = Feature{ + .name = "twoConstNr", + .llvm_name = "two-const-nr", + .description = "Requires two constant Newton-Raphson computation", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_vsx = Feature{ + .name = "vsx", + .llvm_name = "vsx", + .description = "Enable VSX instructions", + .dependencies = &[_]*const Feature { + &feature_hardFloat, + }, +}; + +pub const feature_vectorsUseTwoUnits = Feature{ + .name = "vectorsUseTwoUnits", + .llvm_name = "vectors-use-two-units", + .description = "Vectors use two units", + .dependencies = &[_]*const Feature { + }, +}; + +pub const features = &[_]*const Feature { + &feature_bit64, + &feature_bitregs64, + &feature_altivec, + &feature_bpermd, + &feature_booke, + &feature_cmpb, + &feature_crbits, + &feature_directMove, + &feature_e500, + &feature_extdiv, + &feature_fcpsgn, + &feature_fpcvt, + &feature_fprnd, + &feature_fpu, + &feature_fre, + &feature_fres, + &feature_frsqrte, + &feature_frsqrtes, + &feature_fsqrt, + &feature_float128, + &feature_htm, + &feature_hardFloat, + &feature_icbt, + &feature_isaV30Instructions, + &feature_isel, + &feature_invariantFunctionDescriptors, + &feature_ldbrx, + &feature_lfiwax, + &feature_longcall, + &feature_mfocrf, + &feature_msync, + &feature_power8Altivec, + &feature_crypto, + &feature_power8Vector, + &feature_power9Altivec, + &feature_power9Vector, + &feature_popcntd, + &feature_ppc4xx, + &feature_ppc6xx, + &feature_ppcPostraSched, + &feature_ppcPreraSched, + &feature_partwordAtomics, + &feature_qpx, + &feature_recipprec, + &feature_spe, + &feature_stfiwx, + &feature_securePlt, + &feature_slowPopcntd, + &feature_twoConstNr, + &feature_vsx, + &feature_vectorsUseTwoUnits, +}; + +pub const cpu_440 = Cpu{ + .name = "440", + .llvm_name = "440", + .dependencies = &[_]*const Feature { + &feature_icbt, + &feature_booke, + &feature_hardFloat, + &feature_fres, + &feature_frsqrte, + &feature_isel, + &feature_msync, + }, +}; + +pub const cpu_450 = Cpu{ + .name = "450", + .llvm_name = "450", + .dependencies = &[_]*const Feature { + &feature_icbt, + &feature_booke, + &feature_hardFloat, + &feature_fres, + &feature_frsqrte, + &feature_isel, + &feature_msync, + }, +}; + +pub const cpu_601 = Cpu{ + .name = "601", + .llvm_name = "601", + .dependencies = &[_]*const Feature { + &feature_hardFloat, + &feature_fpu, + }, +}; + +pub const cpu_602 = Cpu{ + .name = "602", + .llvm_name = "602", + .dependencies = &[_]*const Feature { + &feature_hardFloat, + &feature_fpu, + }, +}; + +pub const cpu_603 = Cpu{ + .name = "603", + .llvm_name = "603", + .dependencies = &[_]*const Feature { + &feature_hardFloat, + &feature_fres, + &feature_frsqrte, + }, +}; + +pub const cpu_e603 = Cpu{ + .name = "e603", + .llvm_name = "603e", + .dependencies = &[_]*const Feature { + &feature_hardFloat, + &feature_fres, + &feature_frsqrte, + }, +}; + +pub const cpu_ev603 = Cpu{ + .name = "ev603", + .llvm_name = "603ev", + .dependencies = &[_]*const Feature { + &feature_hardFloat, + &feature_fres, + &feature_frsqrte, + }, +}; + +pub const cpu_604 = Cpu{ + .name = "604", + .llvm_name = "604", + .dependencies = &[_]*const Feature { + &feature_hardFloat, + &feature_fres, + &feature_frsqrte, + }, +}; + +pub const cpu_e604 = Cpu{ + .name = "e604", + .llvm_name = "604e", + .dependencies = &[_]*const Feature { + &feature_hardFloat, + &feature_fres, + &feature_frsqrte, + }, +}; + +pub const cpu_620 = Cpu{ + .name = "620", + .llvm_name = "620", + .dependencies = &[_]*const Feature { + &feature_hardFloat, + &feature_fres, + &feature_frsqrte, + }, +}; + +pub const cpu_7400 = Cpu{ + .name = "7400", + .llvm_name = "7400", + .dependencies = &[_]*const Feature { + &feature_hardFloat, + &feature_altivec, + &feature_fres, + &feature_frsqrte, + }, +}; + +pub const cpu_7450 = Cpu{ + .name = "7450", + .llvm_name = "7450", + .dependencies = &[_]*const Feature { + &feature_hardFloat, + &feature_altivec, + &feature_fres, + &feature_frsqrte, + }, +}; + +pub const cpu_750 = Cpu{ + .name = "750", + .llvm_name = "750", + .dependencies = &[_]*const Feature { + &feature_hardFloat, + &feature_fres, + &feature_frsqrte, + }, +}; + +pub const cpu_970 = Cpu{ + .name = "970", + .llvm_name = "970", + .dependencies = &[_]*const Feature { + &feature_bit64, + &feature_hardFloat, + &feature_altivec, + &feature_fres, + &feature_frsqrte, + &feature_fsqrt, + &feature_mfocrf, + &feature_stfiwx, + }, +}; + +pub const cpu_a2 = Cpu{ + .name = "a2", + .llvm_name = "a2", + .dependencies = &[_]*const Feature { + &feature_bit64, + &feature_icbt, + &feature_booke, + &feature_cmpb, + &feature_hardFloat, + &feature_fcpsgn, + &feature_fpcvt, + &feature_fprnd, + &feature_fre, + &feature_fres, + &feature_frsqrte, + &feature_frsqrtes, + &feature_fsqrt, + &feature_isel, + &feature_ldbrx, + &feature_lfiwax, + &feature_mfocrf, + &feature_recipprec, + &feature_stfiwx, + &feature_slowPopcntd, + }, +}; + +pub const cpu_a2q = Cpu{ + .name = "a2q", + .llvm_name = "a2q", + .dependencies = &[_]*const Feature { + &feature_bit64, + &feature_icbt, + &feature_booke, + &feature_cmpb, + &feature_hardFloat, + &feature_fcpsgn, + &feature_fpcvt, + &feature_fprnd, + &feature_fre, + &feature_fres, + &feature_frsqrte, + &feature_frsqrtes, + &feature_fsqrt, + &feature_isel, + &feature_ldbrx, + &feature_lfiwax, + &feature_mfocrf, + &feature_qpx, + &feature_recipprec, + &feature_stfiwx, + &feature_slowPopcntd, + }, +}; + +pub const cpu_e500 = Cpu{ + .name = "e500", + .llvm_name = "e500", + .dependencies = &[_]*const Feature { + &feature_icbt, + &feature_booke, + &feature_isel, + }, +}; + +pub const cpu_e500mc = Cpu{ + .name = "e500mc", + .llvm_name = "e500mc", + .dependencies = &[_]*const Feature { + &feature_icbt, + &feature_booke, + &feature_isel, + &feature_hardFloat, + &feature_stfiwx, + }, +}; + +pub const cpu_e5500 = Cpu{ + .name = "e5500", + .llvm_name = "e5500", + .dependencies = &[_]*const Feature { + &feature_bit64, + &feature_icbt, + &feature_booke, + &feature_isel, + &feature_mfocrf, + &feature_hardFloat, + &feature_stfiwx, + }, +}; + +pub const cpu_g3 = Cpu{ + .name = "g3", + .llvm_name = "g3", + .dependencies = &[_]*const Feature { + &feature_hardFloat, + &feature_fres, + &feature_frsqrte, + }, +}; + +pub const cpu_g4 = Cpu{ + .name = "g4", + .llvm_name = "g4", + .dependencies = &[_]*const Feature { + &feature_hardFloat, + &feature_altivec, + &feature_fres, + &feature_frsqrte, + }, +}; + +pub const cpu_g4Plus = Cpu{ + .name = "g4Plus", + .llvm_name = "g4+", + .dependencies = &[_]*const Feature { + &feature_hardFloat, + &feature_altivec, + &feature_fres, + &feature_frsqrte, + }, +}; + +pub const cpu_g5 = Cpu{ + .name = "g5", + .llvm_name = "g5", + .dependencies = &[_]*const Feature { + &feature_bit64, + &feature_hardFloat, + &feature_altivec, + &feature_fres, + &feature_frsqrte, + &feature_fsqrt, + &feature_mfocrf, + &feature_stfiwx, + }, +}; + +pub const cpu_generic = Cpu{ + .name = "generic", + .llvm_name = "generic", + .dependencies = &[_]*const Feature { + &feature_hardFloat, + }, +}; + +pub const cpu_ppc = Cpu{ + .name = "ppc", + .llvm_name = "ppc", + .dependencies = &[_]*const Feature { + &feature_hardFloat, + }, +}; + +pub const cpu_ppc32 = Cpu{ + .name = "ppc32", + .llvm_name = "ppc32", + .dependencies = &[_]*const Feature { + &feature_hardFloat, + }, +}; + +pub const cpu_ppc64 = Cpu{ + .name = "ppc64", + .llvm_name = "ppc64", + .dependencies = &[_]*const Feature { + &feature_bit64, + &feature_hardFloat, + &feature_altivec, + &feature_fres, + &feature_frsqrte, + &feature_fsqrt, + &feature_mfocrf, + &feature_stfiwx, + }, +}; + +pub const cpu_ppc64le = Cpu{ + .name = "ppc64le", + .llvm_name = "ppc64le", + .dependencies = &[_]*const Feature { + &feature_bit64, + &feature_hardFloat, + &feature_altivec, + &feature_bpermd, + &feature_cmpb, + &feature_directMove, + &feature_extdiv, + &feature_fcpsgn, + &feature_fpcvt, + &feature_fprnd, + &feature_fre, + &feature_fres, + &feature_frsqrte, + &feature_frsqrtes, + &feature_fsqrt, + &feature_htm, + &feature_icbt, + &feature_isel, + &feature_ldbrx, + &feature_lfiwax, + &feature_mfocrf, + &feature_power8Altivec, + &feature_crypto, + &feature_power8Vector, + &feature_popcntd, + &feature_partwordAtomics, + &feature_recipprec, + &feature_stfiwx, + &feature_twoConstNr, + &feature_vsx, + }, +}; + +pub const cpu_pwr3 = Cpu{ + .name = "pwr3", + .llvm_name = "pwr3", + .dependencies = &[_]*const Feature { + &feature_bit64, + &feature_hardFloat, + &feature_altivec, + &feature_fres, + &feature_frsqrte, + &feature_mfocrf, + &feature_stfiwx, + }, +}; + +pub const cpu_pwr4 = Cpu{ + .name = "pwr4", + .llvm_name = "pwr4", + .dependencies = &[_]*const Feature { + &feature_bit64, + &feature_hardFloat, + &feature_altivec, + &feature_fres, + &feature_frsqrte, + &feature_fsqrt, + &feature_mfocrf, + &feature_stfiwx, + }, +}; + +pub const cpu_pwr5 = Cpu{ + .name = "pwr5", + .llvm_name = "pwr5", + .dependencies = &[_]*const Feature { + &feature_bit64, + &feature_hardFloat, + &feature_altivec, + &feature_fre, + &feature_fres, + &feature_frsqrte, + &feature_frsqrtes, + &feature_fsqrt, + &feature_mfocrf, + &feature_stfiwx, + }, +}; + +pub const cpu_pwr5x = Cpu{ + .name = "pwr5x", + .llvm_name = "pwr5x", + .dependencies = &[_]*const Feature { + &feature_bit64, + &feature_hardFloat, + &feature_altivec, + &feature_fprnd, + &feature_fre, + &feature_fres, + &feature_frsqrte, + &feature_frsqrtes, + &feature_fsqrt, + &feature_mfocrf, + &feature_stfiwx, + }, +}; + +pub const cpu_pwr6 = Cpu{ + .name = "pwr6", + .llvm_name = "pwr6", + .dependencies = &[_]*const Feature { + &feature_bit64, + &feature_hardFloat, + &feature_altivec, + &feature_cmpb, + &feature_fcpsgn, + &feature_fprnd, + &feature_fre, + &feature_fres, + &feature_frsqrte, + &feature_frsqrtes, + &feature_fsqrt, + &feature_lfiwax, + &feature_mfocrf, + &feature_recipprec, + &feature_stfiwx, + }, +}; + +pub const cpu_pwr6x = Cpu{ + .name = "pwr6x", + .llvm_name = "pwr6x", + .dependencies = &[_]*const Feature { + &feature_bit64, + &feature_hardFloat, + &feature_altivec, + &feature_cmpb, + &feature_fcpsgn, + &feature_fprnd, + &feature_fre, + &feature_fres, + &feature_frsqrte, + &feature_frsqrtes, + &feature_fsqrt, + &feature_lfiwax, + &feature_mfocrf, + &feature_recipprec, + &feature_stfiwx, + }, +}; + +pub const cpu_pwr7 = Cpu{ + .name = "pwr7", + .llvm_name = "pwr7", + .dependencies = &[_]*const Feature { + &feature_bit64, + &feature_hardFloat, + &feature_altivec, + &feature_bpermd, + &feature_cmpb, + &feature_extdiv, + &feature_fcpsgn, + &feature_fpcvt, + &feature_fprnd, + &feature_fre, + &feature_fres, + &feature_frsqrte, + &feature_frsqrtes, + &feature_fsqrt, + &feature_isel, + &feature_ldbrx, + &feature_lfiwax, + &feature_mfocrf, + &feature_popcntd, + &feature_recipprec, + &feature_stfiwx, + &feature_twoConstNr, + &feature_vsx, + }, +}; + +pub const cpu_pwr8 = Cpu{ + .name = "pwr8", + .llvm_name = "pwr8", + .dependencies = &[_]*const Feature { + &feature_bit64, + &feature_hardFloat, + &feature_altivec, + &feature_bpermd, + &feature_cmpb, + &feature_directMove, + &feature_extdiv, + &feature_fcpsgn, + &feature_fpcvt, + &feature_fprnd, + &feature_fre, + &feature_fres, + &feature_frsqrte, + &feature_frsqrtes, + &feature_fsqrt, + &feature_htm, + &feature_icbt, + &feature_isel, + &feature_ldbrx, + &feature_lfiwax, + &feature_mfocrf, + &feature_power8Altivec, + &feature_crypto, + &feature_power8Vector, + &feature_popcntd, + &feature_partwordAtomics, + &feature_recipprec, + &feature_stfiwx, + &feature_twoConstNr, + &feature_vsx, + }, +}; + +pub const cpu_pwr9 = Cpu{ + .name = "pwr9", + .llvm_name = "pwr9", + .dependencies = &[_]*const Feature { + &feature_bit64, + &feature_hardFloat, + &feature_altivec, + &feature_bpermd, + &feature_cmpb, + &feature_directMove, + &feature_extdiv, + &feature_fcpsgn, + &feature_fpcvt, + &feature_fprnd, + &feature_fre, + &feature_fres, + &feature_frsqrte, + &feature_frsqrtes, + &feature_fsqrt, + &feature_htm, + &feature_icbt, + &feature_isaV30Instructions, + &feature_isel, + &feature_ldbrx, + &feature_lfiwax, + &feature_mfocrf, + &feature_power8Altivec, + &feature_crypto, + &feature_power8Vector, + &feature_power9Altivec, + &feature_power9Vector, + &feature_popcntd, + &feature_ppcPostraSched, + &feature_ppcPreraSched, + &feature_partwordAtomics, + &feature_recipprec, + &feature_stfiwx, + &feature_twoConstNr, + &feature_vsx, + &feature_vectorsUseTwoUnits, + }, +}; + +pub const cpus = &[_]*const Cpu { + &cpu_440, + &cpu_450, + &cpu_601, + &cpu_602, + &cpu_603, + &cpu_e603, + &cpu_ev603, + &cpu_604, + &cpu_e604, + &cpu_620, + &cpu_7400, + &cpu_7450, + &cpu_750, + &cpu_970, + &cpu_a2, + &cpu_a2q, + &cpu_e500, + &cpu_e500mc, + &cpu_e5500, + &cpu_g3, + &cpu_g4, + &cpu_g4Plus, + &cpu_g5, + &cpu_generic, + &cpu_ppc, + &cpu_ppc32, + &cpu_ppc64, + &cpu_ppc64le, + &cpu_pwr3, + &cpu_pwr4, + &cpu_pwr5, + &cpu_pwr5x, + &cpu_pwr6, + &cpu_pwr6x, + &cpu_pwr7, + &cpu_pwr8, + &cpu_pwr9, +}; diff --git a/lib/std/target/riscv.zig b/lib/std/target/riscv.zig new file mode 100644 index 000000000000..bf82cc9f822c --- /dev/null +++ b/lib/std/target/riscv.zig @@ -0,0 +1,98 @@ +const Feature = @import("std").target.Feature; +const Cpu = @import("std").target.Cpu; + +pub const feature_bit64 = Feature{ + .name = "bit64", + .llvm_name = "64bit", + .description = "Implements RV64", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_e = Feature{ + .name = "e", + .llvm_name = "e", + .description = "Implements RV32E (provides 16 rather than 32 GPRs)", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_relax = Feature{ + .name = "relax", + .llvm_name = "relax", + .description = "Enable Linker relaxation.", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_a = Feature{ + .name = "a", + .llvm_name = "a", + .description = "'A' (Atomic Instructions)", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_c = Feature{ + .name = "c", + .llvm_name = "c", + .description = "'C' (Compressed Instructions)", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_d = Feature{ + .name = "d", + .llvm_name = "d", + .description = "'D' (Double-Precision Floating-Point)", + .dependencies = &[_]*const Feature { + &feature_f, + }, +}; + +pub const feature_f = Feature{ + .name = "f", + .llvm_name = "f", + .description = "'F' (Single-Precision Floating-Point)", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_m = Feature{ + .name = "m", + .llvm_name = "m", + .description = "'M' (Integer Multiplication and Division)", + .dependencies = &[_]*const Feature { + }, +}; + +pub const features = &[_]*const Feature { + &feature_bit64, + &feature_e, + &feature_relax, + &feature_a, + &feature_c, + &feature_d, + &feature_f, + &feature_m, +}; + +pub const cpu_genericRv32 = Cpu{ + .name = "genericRv32", + .llvm_name = "generic-rv32", + .dependencies = &[_]*const Feature { + }, +}; + +pub const cpu_genericRv64 = Cpu{ + .name = "genericRv64", + .llvm_name = "generic-rv64", + .dependencies = &[_]*const Feature { + &feature_bit64, + }, +}; + +pub const cpus = &[_]*const Cpu { + &cpu_genericRv32, + &cpu_genericRv64, +}; diff --git a/lib/std/target/sparc.zig b/lib/std/target/sparc.zig new file mode 100644 index 000000000000..7dfaa47df77b --- /dev/null +++ b/lib/std/target/sparc.zig @@ -0,0 +1,489 @@ +const Feature = @import("std").target.Feature; +const Cpu = @import("std").target.Cpu; + +pub const feature_hardQuadFloat = Feature{ + .name = "hardQuadFloat", + .llvm_name = "hard-quad-float", + .description = "Enable quad-word floating point instructions", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_leon = Feature{ + .name = "leon", + .llvm_name = "leon", + .description = "Enable LEON extensions", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_noFmuls = Feature{ + .name = "noFmuls", + .llvm_name = "no-fmuls", + .description = "Disable the fmuls instruction.", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_noFsmuld = Feature{ + .name = "noFsmuld", + .llvm_name = "no-fsmuld", + .description = "Disable the fsmuld instruction.", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_leonpwrpsr = Feature{ + .name = "leonpwrpsr", + .llvm_name = "leonpwrpsr", + .description = "Enable the PWRPSR instruction", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_softFloat = Feature{ + .name = "softFloat", + .llvm_name = "soft-float", + .description = "Use software emulation for floating point", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_softMulDiv = Feature{ + .name = "softMulDiv", + .llvm_name = "soft-mul-div", + .description = "Use software emulation for integer multiply and divide", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_deprecatedV8 = Feature{ + .name = "deprecatedV8", + .llvm_name = "deprecated-v8", + .description = "Enable deprecated V8 instructions in V9 mode", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_v9 = Feature{ + .name = "v9", + .llvm_name = "v9", + .description = "Enable SPARC-V9 instructions", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_vis = Feature{ + .name = "vis", + .llvm_name = "vis", + .description = "Enable UltraSPARC Visual Instruction Set extensions", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_vis2 = Feature{ + .name = "vis2", + .llvm_name = "vis2", + .description = "Enable Visual Instruction Set extensions II", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_vis3 = Feature{ + .name = "vis3", + .llvm_name = "vis3", + .description = "Enable Visual Instruction Set extensions III", + .dependencies = &[_]*const Feature { + }, +}; + +pub const features = &[_]*const Feature { + &feature_hardQuadFloat, + &feature_leon, + &feature_noFmuls, + &feature_noFsmuld, + &feature_leonpwrpsr, + &feature_softFloat, + &feature_softMulDiv, + &feature_deprecatedV8, + &feature_v9, + &feature_vis, + &feature_vis2, + &feature_vis3, +}; + +pub const cpu_at697e = Cpu{ + .name = "at697e", + .llvm_name = "at697e", + .dependencies = &[_]*const Feature { + &feature_leon, + }, +}; + +pub const cpu_at697f = Cpu{ + .name = "at697f", + .llvm_name = "at697f", + .dependencies = &[_]*const Feature { + &feature_leon, + }, +}; + +pub const cpu_f934 = Cpu{ + .name = "f934", + .llvm_name = "f934", + .dependencies = &[_]*const Feature { + }, +}; + +pub const cpu_generic = Cpu{ + .name = "generic", + .llvm_name = "generic", + .dependencies = &[_]*const Feature { + }, +}; + +pub const cpu_gr712rc = Cpu{ + .name = "gr712rc", + .llvm_name = "gr712rc", + .dependencies = &[_]*const Feature { + &feature_leon, + }, +}; + +pub const cpu_gr740 = Cpu{ + .name = "gr740", + .llvm_name = "gr740", + .dependencies = &[_]*const Feature { + &feature_leon, + &feature_leonpwrpsr, + }, +}; + +pub const cpu_hypersparc = Cpu{ + .name = "hypersparc", + .llvm_name = "hypersparc", + .dependencies = &[_]*const Feature { + }, +}; + +pub const cpu_leon2 = Cpu{ + .name = "leon2", + .llvm_name = "leon2", + .dependencies = &[_]*const Feature { + &feature_leon, + }, +}; + +pub const cpu_leon3 = Cpu{ + .name = "leon3", + .llvm_name = "leon3", + .dependencies = &[_]*const Feature { + &feature_leon, + }, +}; + +pub const cpu_leon4 = Cpu{ + .name = "leon4", + .llvm_name = "leon4", + .dependencies = &[_]*const Feature { + &feature_leon, + }, +}; + +pub const cpu_ma2080 = Cpu{ + .name = "ma2080", + .llvm_name = "ma2080", + .dependencies = &[_]*const Feature { + &feature_leon, + }, +}; + +pub const cpu_ma2085 = Cpu{ + .name = "ma2085", + .llvm_name = "ma2085", + .dependencies = &[_]*const Feature { + &feature_leon, + }, +}; + +pub const cpu_ma2100 = Cpu{ + .name = "ma2100", + .llvm_name = "ma2100", + .dependencies = &[_]*const Feature { + &feature_leon, + }, +}; + +pub const cpu_ma2150 = Cpu{ + .name = "ma2150", + .llvm_name = "ma2150", + .dependencies = &[_]*const Feature { + &feature_leon, + }, +}; + +pub const cpu_ma2155 = Cpu{ + .name = "ma2155", + .llvm_name = "ma2155", + .dependencies = &[_]*const Feature { + &feature_leon, + }, +}; + +pub const cpu_ma2450 = Cpu{ + .name = "ma2450", + .llvm_name = "ma2450", + .dependencies = &[_]*const Feature { + &feature_leon, + }, +}; + +pub const cpu_ma2455 = Cpu{ + .name = "ma2455", + .llvm_name = "ma2455", + .dependencies = &[_]*const Feature { + &feature_leon, + }, +}; + +pub const cpu_ma2480 = Cpu{ + .name = "ma2480", + .llvm_name = "ma2480", + .dependencies = &[_]*const Feature { + &feature_leon, + }, +}; + +pub const cpu_ma2485 = Cpu{ + .name = "ma2485", + .llvm_name = "ma2485", + .dependencies = &[_]*const Feature { + &feature_leon, + }, +}; + +pub const cpu_ma2x5x = Cpu{ + .name = "ma2x5x", + .llvm_name = "ma2x5x", + .dependencies = &[_]*const Feature { + &feature_leon, + }, +}; + +pub const cpu_ma2x8x = Cpu{ + .name = "ma2x8x", + .llvm_name = "ma2x8x", + .dependencies = &[_]*const Feature { + &feature_leon, + }, +}; + +pub const cpu_myriad2 = Cpu{ + .name = "myriad2", + .llvm_name = "myriad2", + .dependencies = &[_]*const Feature { + &feature_leon, + }, +}; + +pub const cpu_myriad21 = Cpu{ + .name = "myriad21", + .llvm_name = "myriad2.1", + .dependencies = &[_]*const Feature { + &feature_leon, + }, +}; + +pub const cpu_myriad22 = Cpu{ + .name = "myriad22", + .llvm_name = "myriad2.2", + .dependencies = &[_]*const Feature { + &feature_leon, + }, +}; + +pub const cpu_myriad23 = Cpu{ + .name = "myriad23", + .llvm_name = "myriad2.3", + .dependencies = &[_]*const Feature { + &feature_leon, + }, +}; + +pub const cpu_niagara = Cpu{ + .name = "niagara", + .llvm_name = "niagara", + .dependencies = &[_]*const Feature { + &feature_deprecatedV8, + &feature_v9, + &feature_vis, + &feature_vis2, + }, +}; + +pub const cpu_niagara2 = Cpu{ + .name = "niagara2", + .llvm_name = "niagara2", + .dependencies = &[_]*const Feature { + &feature_deprecatedV8, + &feature_v9, + &feature_vis, + &feature_vis2, + }, +}; + +pub const cpu_niagara3 = Cpu{ + .name = "niagara3", + .llvm_name = "niagara3", + .dependencies = &[_]*const Feature { + &feature_deprecatedV8, + &feature_v9, + &feature_vis, + &feature_vis2, + }, +}; + +pub const cpu_niagara4 = Cpu{ + .name = "niagara4", + .llvm_name = "niagara4", + .dependencies = &[_]*const Feature { + &feature_deprecatedV8, + &feature_v9, + &feature_vis, + &feature_vis2, + &feature_vis3, + }, +}; + +pub const cpu_sparclet = Cpu{ + .name = "sparclet", + .llvm_name = "sparclet", + .dependencies = &[_]*const Feature { + }, +}; + +pub const cpu_sparclite = Cpu{ + .name = "sparclite", + .llvm_name = "sparclite", + .dependencies = &[_]*const Feature { + }, +}; + +pub const cpu_sparclite86x = Cpu{ + .name = "sparclite86x", + .llvm_name = "sparclite86x", + .dependencies = &[_]*const Feature { + }, +}; + +pub const cpu_supersparc = Cpu{ + .name = "supersparc", + .llvm_name = "supersparc", + .dependencies = &[_]*const Feature { + }, +}; + +pub const cpu_tsc701 = Cpu{ + .name = "tsc701", + .llvm_name = "tsc701", + .dependencies = &[_]*const Feature { + }, +}; + +pub const cpu_ultrasparc = Cpu{ + .name = "ultrasparc", + .llvm_name = "ultrasparc", + .dependencies = &[_]*const Feature { + &feature_deprecatedV8, + &feature_v9, + &feature_vis, + }, +}; + +pub const cpu_ultrasparc3 = Cpu{ + .name = "ultrasparc3", + .llvm_name = "ultrasparc3", + .dependencies = &[_]*const Feature { + &feature_deprecatedV8, + &feature_v9, + &feature_vis, + &feature_vis2, + }, +}; + +pub const cpu_ut699 = Cpu{ + .name = "ut699", + .llvm_name = "ut699", + .dependencies = &[_]*const Feature { + &feature_leon, + &feature_noFmuls, + &feature_noFsmuld, + }, +}; + +pub const cpu_v7 = Cpu{ + .name = "v7", + .llvm_name = "v7", + .dependencies = &[_]*const Feature { + &feature_noFsmuld, + &feature_softMulDiv, + }, +}; + +pub const cpu_v8 = Cpu{ + .name = "v8", + .llvm_name = "v8", + .dependencies = &[_]*const Feature { + }, +}; + +pub const cpu_v9 = Cpu{ + .name = "v9", + .llvm_name = "v9", + .dependencies = &[_]*const Feature { + &feature_v9, + }, +}; + +pub const cpus = &[_]*const Cpu { + &cpu_at697e, + &cpu_at697f, + &cpu_f934, + &cpu_generic, + &cpu_gr712rc, + &cpu_gr740, + &cpu_hypersparc, + &cpu_leon2, + &cpu_leon3, + &cpu_leon4, + &cpu_ma2080, + &cpu_ma2085, + &cpu_ma2100, + &cpu_ma2150, + &cpu_ma2155, + &cpu_ma2450, + &cpu_ma2455, + &cpu_ma2480, + &cpu_ma2485, + &cpu_ma2x5x, + &cpu_ma2x8x, + &cpu_myriad2, + &cpu_myriad21, + &cpu_myriad22, + &cpu_myriad23, + &cpu_niagara, + &cpu_niagara2, + &cpu_niagara3, + &cpu_niagara4, + &cpu_sparclet, + &cpu_sparclite, + &cpu_sparclite86x, + &cpu_supersparc, + &cpu_tsc701, + &cpu_ultrasparc, + &cpu_ultrasparc3, + &cpu_ut699, + &cpu_v7, + &cpu_v8, + &cpu_v9, +}; diff --git a/lib/std/target/systemz.zig b/lib/std/target/systemz.zig new file mode 100644 index 000000000000..1a3f8ec9705a --- /dev/null +++ b/lib/std/target/systemz.zig @@ -0,0 +1,610 @@ +const Feature = @import("std").target.Feature; +const Cpu = @import("std").target.Cpu; + +pub const feature_dfpPackedConversion = Feature{ + .name = "dfpPackedConversion", + .llvm_name = "dfp-packed-conversion", + .description = "Assume that the DFP packed-conversion facility is installed", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_dfpZonedConversion = Feature{ + .name = "dfpZonedConversion", + .llvm_name = "dfp-zoned-conversion", + .description = "Assume that the DFP zoned-conversion facility is installed", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_deflateConversion = Feature{ + .name = "deflateConversion", + .llvm_name = "deflate-conversion", + .description = "Assume that the deflate-conversion facility is installed", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_distinctOps = Feature{ + .name = "distinctOps", + .llvm_name = "distinct-ops", + .description = "Assume that the distinct-operands facility is installed", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_enhancedDat2 = Feature{ + .name = "enhancedDat2", + .llvm_name = "enhanced-dat-2", + .description = "Assume that the enhanced-DAT facility 2 is installed", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_enhancedSort = Feature{ + .name = "enhancedSort", + .llvm_name = "enhanced-sort", + .description = "Assume that the enhanced-sort facility is installed", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_executionHint = Feature{ + .name = "executionHint", + .llvm_name = "execution-hint", + .description = "Assume that the execution-hint facility is installed", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_fpExtension = Feature{ + .name = "fpExtension", + .llvm_name = "fp-extension", + .description = "Assume that the floating-point extension facility is installed", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_fastSerialization = Feature{ + .name = "fastSerialization", + .llvm_name = "fast-serialization", + .description = "Assume that the fast-serialization facility is installed", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_guardedStorage = Feature{ + .name = "guardedStorage", + .llvm_name = "guarded-storage", + .description = "Assume that the guarded-storage facility is installed", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_highWord = Feature{ + .name = "highWord", + .llvm_name = "high-word", + .description = "Assume that the high-word facility is installed", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_insertReferenceBitsMultiple = Feature{ + .name = "insertReferenceBitsMultiple", + .llvm_name = "insert-reference-bits-multiple", + .description = "Assume that the insert-reference-bits-multiple facility is installed", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_interlockedAccess1 = Feature{ + .name = "interlockedAccess1", + .llvm_name = "interlocked-access1", + .description = "Assume that interlocked-access facility 1 is installed", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_loadAndTrap = Feature{ + .name = "loadAndTrap", + .llvm_name = "load-and-trap", + .description = "Assume that the load-and-trap facility is installed", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_loadAndZeroRightmostByte = Feature{ + .name = "loadAndZeroRightmostByte", + .llvm_name = "load-and-zero-rightmost-byte", + .description = "Assume that the load-and-zero-rightmost-byte facility is installed", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_loadStoreOnCond = Feature{ + .name = "loadStoreOnCond", + .llvm_name = "load-store-on-cond", + .description = "Assume that the load/store-on-condition facility is installed", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_loadStoreOnCond2 = Feature{ + .name = "loadStoreOnCond2", + .llvm_name = "load-store-on-cond-2", + .description = "Assume that the load/store-on-condition facility 2 is installed", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_messageSecurityAssistExtension3 = Feature{ + .name = "messageSecurityAssistExtension3", + .llvm_name = "message-security-assist-extension3", + .description = "Assume that the message-security-assist extension facility 3 is installed", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_messageSecurityAssistExtension4 = Feature{ + .name = "messageSecurityAssistExtension4", + .llvm_name = "message-security-assist-extension4", + .description = "Assume that the message-security-assist extension facility 4 is installed", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_messageSecurityAssistExtension5 = Feature{ + .name = "messageSecurityAssistExtension5", + .llvm_name = "message-security-assist-extension5", + .description = "Assume that the message-security-assist extension facility 5 is installed", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_messageSecurityAssistExtension7 = Feature{ + .name = "messageSecurityAssistExtension7", + .llvm_name = "message-security-assist-extension7", + .description = "Assume that the message-security-assist extension facility 7 is installed", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_messageSecurityAssistExtension8 = Feature{ + .name = "messageSecurityAssistExtension8", + .llvm_name = "message-security-assist-extension8", + .description = "Assume that the message-security-assist extension facility 8 is installed", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_messageSecurityAssistExtension9 = Feature{ + .name = "messageSecurityAssistExtension9", + .llvm_name = "message-security-assist-extension9", + .description = "Assume that the message-security-assist extension facility 9 is installed", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_miscellaneousExtensions = Feature{ + .name = "miscellaneousExtensions", + .llvm_name = "miscellaneous-extensions", + .description = "Assume that the miscellaneous-extensions facility is installed", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_miscellaneousExtensions2 = Feature{ + .name = "miscellaneousExtensions2", + .llvm_name = "miscellaneous-extensions-2", + .description = "Assume that the miscellaneous-extensions facility 2 is installed", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_miscellaneousExtensions3 = Feature{ + .name = "miscellaneousExtensions3", + .llvm_name = "miscellaneous-extensions-3", + .description = "Assume that the miscellaneous-extensions facility 3 is installed", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_populationCount = Feature{ + .name = "populationCount", + .llvm_name = "population-count", + .description = "Assume that the population-count facility is installed", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_processorAssist = Feature{ + .name = "processorAssist", + .llvm_name = "processor-assist", + .description = "Assume that the processor-assist facility is installed", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_resetReferenceBitsMultiple = Feature{ + .name = "resetReferenceBitsMultiple", + .llvm_name = "reset-reference-bits-multiple", + .description = "Assume that the reset-reference-bits-multiple facility is installed", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_transactionalExecution = Feature{ + .name = "transactionalExecution", + .llvm_name = "transactional-execution", + .description = "Assume that the transactional-execution facility is installed", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_vector = Feature{ + .name = "vector", + .llvm_name = "vector", + .description = "Assume that the vectory facility is installed", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_vectorEnhancements1 = Feature{ + .name = "vectorEnhancements1", + .llvm_name = "vector-enhancements-1", + .description = "Assume that the vector enhancements facility 1 is installed", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_vectorEnhancements2 = Feature{ + .name = "vectorEnhancements2", + .llvm_name = "vector-enhancements-2", + .description = "Assume that the vector enhancements facility 2 is installed", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_vectorPackedDecimal = Feature{ + .name = "vectorPackedDecimal", + .llvm_name = "vector-packed-decimal", + .description = "Assume that the vector packed decimal facility is installed", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_vectorPackedDecimalEnhancement = Feature{ + .name = "vectorPackedDecimalEnhancement", + .llvm_name = "vector-packed-decimal-enhancement", + .description = "Assume that the vector packed decimal enhancement facility is installed", + .dependencies = &[_]*const Feature { + }, +}; + +pub const features = &[_]*const Feature { + &feature_dfpPackedConversion, + &feature_dfpZonedConversion, + &feature_deflateConversion, + &feature_distinctOps, + &feature_enhancedDat2, + &feature_enhancedSort, + &feature_executionHint, + &feature_fpExtension, + &feature_fastSerialization, + &feature_guardedStorage, + &feature_highWord, + &feature_insertReferenceBitsMultiple, + &feature_interlockedAccess1, + &feature_loadAndTrap, + &feature_loadAndZeroRightmostByte, + &feature_loadStoreOnCond, + &feature_loadStoreOnCond2, + &feature_messageSecurityAssistExtension3, + &feature_messageSecurityAssistExtension4, + &feature_messageSecurityAssistExtension5, + &feature_messageSecurityAssistExtension7, + &feature_messageSecurityAssistExtension8, + &feature_messageSecurityAssistExtension9, + &feature_miscellaneousExtensions, + &feature_miscellaneousExtensions2, + &feature_miscellaneousExtensions3, + &feature_populationCount, + &feature_processorAssist, + &feature_resetReferenceBitsMultiple, + &feature_transactionalExecution, + &feature_vector, + &feature_vectorEnhancements1, + &feature_vectorEnhancements2, + &feature_vectorPackedDecimal, + &feature_vectorPackedDecimalEnhancement, +}; + +pub const cpu_arch10 = Cpu{ + .name = "arch10", + .llvm_name = "arch10", + .dependencies = &[_]*const Feature { + &feature_dfpZonedConversion, + &feature_distinctOps, + &feature_enhancedDat2, + &feature_executionHint, + &feature_fpExtension, + &feature_fastSerialization, + &feature_highWord, + &feature_interlockedAccess1, + &feature_loadAndTrap, + &feature_loadStoreOnCond, + &feature_messageSecurityAssistExtension3, + &feature_messageSecurityAssistExtension4, + &feature_miscellaneousExtensions, + &feature_populationCount, + &feature_processorAssist, + &feature_resetReferenceBitsMultiple, + &feature_transactionalExecution, + }, +}; + +pub const cpu_arch11 = Cpu{ + .name = "arch11", + .llvm_name = "arch11", + .dependencies = &[_]*const Feature { + &feature_dfpPackedConversion, + &feature_dfpZonedConversion, + &feature_distinctOps, + &feature_enhancedDat2, + &feature_executionHint, + &feature_fpExtension, + &feature_fastSerialization, + &feature_highWord, + &feature_interlockedAccess1, + &feature_loadAndTrap, + &feature_loadAndZeroRightmostByte, + &feature_loadStoreOnCond, + &feature_loadStoreOnCond2, + &feature_messageSecurityAssistExtension3, + &feature_messageSecurityAssistExtension4, + &feature_messageSecurityAssistExtension5, + &feature_miscellaneousExtensions, + &feature_populationCount, + &feature_processorAssist, + &feature_resetReferenceBitsMultiple, + &feature_transactionalExecution, + &feature_vector, + }, +}; + +pub const cpu_arch12 = Cpu{ + .name = "arch12", + .llvm_name = "arch12", + .dependencies = &[_]*const Feature { + &feature_dfpPackedConversion, + &feature_dfpZonedConversion, + &feature_distinctOps, + &feature_enhancedDat2, + &feature_executionHint, + &feature_fpExtension, + &feature_fastSerialization, + &feature_guardedStorage, + &feature_highWord, + &feature_insertReferenceBitsMultiple, + &feature_interlockedAccess1, + &feature_loadAndTrap, + &feature_loadAndZeroRightmostByte, + &feature_loadStoreOnCond, + &feature_loadStoreOnCond2, + &feature_messageSecurityAssistExtension3, + &feature_messageSecurityAssistExtension4, + &feature_messageSecurityAssistExtension5, + &feature_messageSecurityAssistExtension7, + &feature_messageSecurityAssistExtension8, + &feature_miscellaneousExtensions, + &feature_miscellaneousExtensions2, + &feature_populationCount, + &feature_processorAssist, + &feature_resetReferenceBitsMultiple, + &feature_transactionalExecution, + &feature_vector, + &feature_vectorEnhancements1, + &feature_vectorPackedDecimal, + }, +}; + +pub const cpu_arch13 = Cpu{ + .name = "arch13", + .llvm_name = "arch13", + .dependencies = &[_]*const Feature { + &feature_dfpPackedConversion, + &feature_dfpZonedConversion, + &feature_deflateConversion, + &feature_distinctOps, + &feature_enhancedDat2, + &feature_enhancedSort, + &feature_executionHint, + &feature_fpExtension, + &feature_fastSerialization, + &feature_guardedStorage, + &feature_highWord, + &feature_insertReferenceBitsMultiple, + &feature_interlockedAccess1, + &feature_loadAndTrap, + &feature_loadAndZeroRightmostByte, + &feature_loadStoreOnCond, + &feature_loadStoreOnCond2, + &feature_messageSecurityAssistExtension3, + &feature_messageSecurityAssistExtension4, + &feature_messageSecurityAssistExtension5, + &feature_messageSecurityAssistExtension7, + &feature_messageSecurityAssistExtension8, + &feature_messageSecurityAssistExtension9, + &feature_miscellaneousExtensions, + &feature_miscellaneousExtensions2, + &feature_miscellaneousExtensions3, + &feature_populationCount, + &feature_processorAssist, + &feature_resetReferenceBitsMultiple, + &feature_transactionalExecution, + &feature_vector, + &feature_vectorEnhancements1, + &feature_vectorEnhancements2, + &feature_vectorPackedDecimal, + &feature_vectorPackedDecimalEnhancement, + }, +}; + +pub const cpu_arch8 = Cpu{ + .name = "arch8", + .llvm_name = "arch8", + .dependencies = &[_]*const Feature { + }, +}; + +pub const cpu_arch9 = Cpu{ + .name = "arch9", + .llvm_name = "arch9", + .dependencies = &[_]*const Feature { + &feature_distinctOps, + &feature_fpExtension, + &feature_fastSerialization, + &feature_highWord, + &feature_interlockedAccess1, + &feature_loadStoreOnCond, + &feature_messageSecurityAssistExtension3, + &feature_messageSecurityAssistExtension4, + &feature_populationCount, + &feature_resetReferenceBitsMultiple, + }, +}; + +pub const cpu_generic = Cpu{ + .name = "generic", + .llvm_name = "generic", + .dependencies = &[_]*const Feature { + }, +}; + +pub const cpu_z10 = Cpu{ + .name = "z10", + .llvm_name = "z10", + .dependencies = &[_]*const Feature { + }, +}; + +pub const cpu_z13 = Cpu{ + .name = "z13", + .llvm_name = "z13", + .dependencies = &[_]*const Feature { + &feature_dfpPackedConversion, + &feature_dfpZonedConversion, + &feature_distinctOps, + &feature_enhancedDat2, + &feature_executionHint, + &feature_fpExtension, + &feature_fastSerialization, + &feature_highWord, + &feature_interlockedAccess1, + &feature_loadAndTrap, + &feature_loadAndZeroRightmostByte, + &feature_loadStoreOnCond, + &feature_loadStoreOnCond2, + &feature_messageSecurityAssistExtension3, + &feature_messageSecurityAssistExtension4, + &feature_messageSecurityAssistExtension5, + &feature_miscellaneousExtensions, + &feature_populationCount, + &feature_processorAssist, + &feature_resetReferenceBitsMultiple, + &feature_transactionalExecution, + &feature_vector, + }, +}; + +pub const cpu_z14 = Cpu{ + .name = "z14", + .llvm_name = "z14", + .dependencies = &[_]*const Feature { + &feature_dfpPackedConversion, + &feature_dfpZonedConversion, + &feature_distinctOps, + &feature_enhancedDat2, + &feature_executionHint, + &feature_fpExtension, + &feature_fastSerialization, + &feature_guardedStorage, + &feature_highWord, + &feature_insertReferenceBitsMultiple, + &feature_interlockedAccess1, + &feature_loadAndTrap, + &feature_loadAndZeroRightmostByte, + &feature_loadStoreOnCond, + &feature_loadStoreOnCond2, + &feature_messageSecurityAssistExtension3, + &feature_messageSecurityAssistExtension4, + &feature_messageSecurityAssistExtension5, + &feature_messageSecurityAssistExtension7, + &feature_messageSecurityAssistExtension8, + &feature_miscellaneousExtensions, + &feature_miscellaneousExtensions2, + &feature_populationCount, + &feature_processorAssist, + &feature_resetReferenceBitsMultiple, + &feature_transactionalExecution, + &feature_vector, + &feature_vectorEnhancements1, + &feature_vectorPackedDecimal, + }, +}; + +pub const cpu_z196 = Cpu{ + .name = "z196", + .llvm_name = "z196", + .dependencies = &[_]*const Feature { + &feature_distinctOps, + &feature_fpExtension, + &feature_fastSerialization, + &feature_highWord, + &feature_interlockedAccess1, + &feature_loadStoreOnCond, + &feature_messageSecurityAssistExtension3, + &feature_messageSecurityAssistExtension4, + &feature_populationCount, + &feature_resetReferenceBitsMultiple, + }, +}; + +pub const cpu_zEC12 = Cpu{ + .name = "zEC12", + .llvm_name = "zEC12", + .dependencies = &[_]*const Feature { + &feature_dfpZonedConversion, + &feature_distinctOps, + &feature_enhancedDat2, + &feature_executionHint, + &feature_fpExtension, + &feature_fastSerialization, + &feature_highWord, + &feature_interlockedAccess1, + &feature_loadAndTrap, + &feature_loadStoreOnCond, + &feature_messageSecurityAssistExtension3, + &feature_messageSecurityAssistExtension4, + &feature_miscellaneousExtensions, + &feature_populationCount, + &feature_processorAssist, + &feature_resetReferenceBitsMultiple, + &feature_transactionalExecution, + }, +}; + +pub const cpus = &[_]*const Cpu { + &cpu_arch10, + &cpu_arch11, + &cpu_arch12, + &cpu_arch13, + &cpu_arch8, + &cpu_arch9, + &cpu_generic, + &cpu_z10, + &cpu_z13, + &cpu_z14, + &cpu_z196, + &cpu_zEC12, +}; diff --git a/lib/std/target/wasm.zig b/lib/std/target/wasm.zig new file mode 100644 index 000000000000..61df1820b5d5 --- /dev/null +++ b/lib/std/target/wasm.zig @@ -0,0 +1,128 @@ +const Feature = @import("std").target.Feature; +const Cpu = @import("std").target.Cpu; + +pub const feature_atomics = Feature{ + .name = "atomics", + .llvm_name = "atomics", + .description = "Enable Atomics", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_bulkMemory = Feature{ + .name = "bulkMemory", + .llvm_name = "bulk-memory", + .description = "Enable bulk memory operations", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_exceptionHandling = Feature{ + .name = "exceptionHandling", + .llvm_name = "exception-handling", + .description = "Enable Wasm exception handling", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_multivalue = Feature{ + .name = "multivalue", + .llvm_name = "multivalue", + .description = "Enable multivalue blocks, instructions, and functions", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_mutableGlobals = Feature{ + .name = "mutableGlobals", + .llvm_name = "mutable-globals", + .description = "Enable mutable globals", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_nontrappingFptoint = Feature{ + .name = "nontrappingFptoint", + .llvm_name = "nontrapping-fptoint", + .description = "Enable non-trapping float-to-int conversion operators", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_simd128 = Feature{ + .name = "simd128", + .llvm_name = "simd128", + .description = "Enable 128-bit SIMD", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_signExt = Feature{ + .name = "signExt", + .llvm_name = "sign-ext", + .description = "Enable sign extension operators", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_tailCall = Feature{ + .name = "tailCall", + .llvm_name = "tail-call", + .description = "Enable tail call instructions", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_unimplementedSimd128 = Feature{ + .name = "unimplementedSimd128", + .llvm_name = "unimplemented-simd128", + .description = "Enable 128-bit SIMD not yet implemented in engines", + .dependencies = &[_]*const Feature { + &feature_simd128, + }, +}; + +pub const features = &[_]*const Feature { + &feature_atomics, + &feature_bulkMemory, + &feature_exceptionHandling, + &feature_multivalue, + &feature_mutableGlobals, + &feature_nontrappingFptoint, + &feature_simd128, + &feature_signExt, + &feature_tailCall, + &feature_unimplementedSimd128, +}; + +pub const cpu_bleedingEdge = Cpu{ + .name = "bleedingEdge", + .llvm_name = "bleeding-edge", + .dependencies = &[_]*const Feature { + &feature_atomics, + &feature_mutableGlobals, + &feature_nontrappingFptoint, + &feature_simd128, + &feature_signExt, + }, +}; + +pub const cpu_generic = Cpu{ + .name = "generic", + .llvm_name = "generic", + .dependencies = &[_]*const Feature { + }, +}; + +pub const cpu_mvp = Cpu{ + .name = "mvp", + .llvm_name = "mvp", + .dependencies = &[_]*const Feature { + }, +}; + +pub const cpus = &[_]*const Cpu { + &cpu_bleedingEdge, + &cpu_generic, + &cpu_mvp, +}; diff --git a/lib/std/target/x86.zig b/lib/std/target/x86.zig new file mode 100644 index 000000000000..e755d2cd88bd --- /dev/null +++ b/lib/std/target/x86.zig @@ -0,0 +1,3338 @@ +const Feature = @import("std").target.Feature; +const Cpu = @import("std").target.Cpu; + +pub const feature_dnow3 = Feature{ + .name = "dnow3", + .llvm_name = "3dnow", + .description = "Enable 3DNow! instructions", + .dependencies = &[_]*const Feature { + &feature_mmx, + }, +}; + +pub const feature_dnowa3 = Feature{ + .name = "dnowa3", + .llvm_name = "3dnowa", + .description = "Enable 3DNow! Athlon instructions", + .dependencies = &[_]*const Feature { + &feature_mmx, + }, +}; + +pub const feature_bit64 = Feature{ + .name = "bit64", + .llvm_name = "64bit", + .description = "Support 64-bit instructions", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_adx = Feature{ + .name = "adx", + .llvm_name = "adx", + .description = "Support ADX instructions", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_aes = Feature{ + .name = "aes", + .llvm_name = "aes", + .description = "Enable AES instructions", + .dependencies = &[_]*const Feature { + &feature_sse, + }, +}; + +pub const feature_avx = Feature{ + .name = "avx", + .llvm_name = "avx", + .description = "Enable AVX instructions", + .dependencies = &[_]*const Feature { + &feature_sse, + }, +}; + +pub const feature_avx2 = Feature{ + .name = "avx2", + .llvm_name = "avx2", + .description = "Enable AVX2 instructions", + .dependencies = &[_]*const Feature { + &feature_sse, + }, +}; + +pub const feature_avx512f = Feature{ + .name = "avx512f", + .llvm_name = "avx512f", + .description = "Enable AVX-512 instructions", + .dependencies = &[_]*const Feature { + &feature_sse, + }, +}; + +pub const feature_avx512bf16 = Feature{ + .name = "avx512bf16", + .llvm_name = "avx512bf16", + .description = "Support bfloat16 floating point", + .dependencies = &[_]*const Feature { + &feature_sse, + }, +}; + +pub const feature_avx512bitalg = Feature{ + .name = "avx512bitalg", + .llvm_name = "avx512bitalg", + .description = "Enable AVX-512 Bit Algorithms", + .dependencies = &[_]*const Feature { + &feature_sse, + }, +}; + +pub const feature_bmi = Feature{ + .name = "bmi", + .llvm_name = "bmi", + .description = "Support BMI instructions", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_bmi2 = Feature{ + .name = "bmi2", + .llvm_name = "bmi2", + .description = "Support BMI2 instructions", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_avx512bw = Feature{ + .name = "avx512bw", + .llvm_name = "avx512bw", + .description = "Enable AVX-512 Byte and Word Instructions", + .dependencies = &[_]*const Feature { + &feature_sse, + }, +}; + +pub const feature_branchfusion = Feature{ + .name = "branchfusion", + .llvm_name = "branchfusion", + .description = "CMP/TEST can be fused with conditional branches", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_avx512cd = Feature{ + .name = "avx512cd", + .llvm_name = "avx512cd", + .description = "Enable AVX-512 Conflict Detection Instructions", + .dependencies = &[_]*const Feature { + &feature_sse, + }, +}; + +pub const feature_cldemote = Feature{ + .name = "cldemote", + .llvm_name = "cldemote", + .description = "Enable Cache Demote", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_clflushopt = Feature{ + .name = "clflushopt", + .llvm_name = "clflushopt", + .description = "Flush A Cache Line Optimized", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_clwb = Feature{ + .name = "clwb", + .llvm_name = "clwb", + .description = "Cache Line Write Back", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_clzero = Feature{ + .name = "clzero", + .llvm_name = "clzero", + .description = "Enable Cache Line Zero", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_cmov = Feature{ + .name = "cmov", + .llvm_name = "cmov", + .description = "Enable conditional move instructions", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_cx8 = Feature{ + .name = "cx8", + .llvm_name = "cx8", + .description = "Support CMPXCHG8B instructions", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_cx16 = Feature{ + .name = "cx16", + .llvm_name = "cx16", + .description = "64-bit with cmpxchg16b", + .dependencies = &[_]*const Feature { + &feature_cx8, + }, +}; + +pub const feature_avx512dq = Feature{ + .name = "avx512dq", + .llvm_name = "avx512dq", + .description = "Enable AVX-512 Doubleword and Quadword Instructions", + .dependencies = &[_]*const Feature { + &feature_sse, + }, +}; + +pub const feature_enqcmd = Feature{ + .name = "enqcmd", + .llvm_name = "enqcmd", + .description = "Has ENQCMD instructions", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_avx512er = Feature{ + .name = "avx512er", + .llvm_name = "avx512er", + .description = "Enable AVX-512 Exponential and Reciprocal Instructions", + .dependencies = &[_]*const Feature { + &feature_sse, + }, +}; + +pub const feature_ermsb = Feature{ + .name = "ermsb", + .llvm_name = "ermsb", + .description = "REP MOVS/STOS are fast", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_f16c = Feature{ + .name = "f16c", + .llvm_name = "f16c", + .description = "Support 16-bit floating point conversion instructions", + .dependencies = &[_]*const Feature { + &feature_sse, + }, +}; + +pub const feature_fma = Feature{ + .name = "fma", + .llvm_name = "fma", + .description = "Enable three-operand fused multiple-add", + .dependencies = &[_]*const Feature { + &feature_sse, + }, +}; + +pub const feature_fma4 = Feature{ + .name = "fma4", + .llvm_name = "fma4", + .description = "Enable four-operand fused multiple-add", + .dependencies = &[_]*const Feature { + &feature_sse, + }, +}; + +pub const feature_fsgsbase = Feature{ + .name = "fsgsbase", + .llvm_name = "fsgsbase", + .description = "Support FS/GS Base instructions", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_fxsr = Feature{ + .name = "fxsr", + .llvm_name = "fxsr", + .description = "Support fxsave/fxrestore instructions", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_fast11bytenop = Feature{ + .name = "fast11bytenop", + .llvm_name = "fast-11bytenop", + .description = "Target can quickly decode up to 11 byte NOPs", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_fast15bytenop = Feature{ + .name = "fast15bytenop", + .llvm_name = "fast-15bytenop", + .description = "Target can quickly decode up to 15 byte NOPs", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_fastBextr = Feature{ + .name = "fastBextr", + .llvm_name = "fast-bextr", + .description = "Indicates that the BEXTR instruction is implemented as a single uop with good throughput", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_fastHops = Feature{ + .name = "fastHops", + .llvm_name = "fast-hops", + .description = "Prefer horizontal vector math instructions (haddp, phsub, etc.) over normal vector instructions with shuffles", + .dependencies = &[_]*const Feature { + &feature_sse, + }, +}; + +pub const feature_fastLzcnt = Feature{ + .name = "fastLzcnt", + .llvm_name = "fast-lzcnt", + .description = "LZCNT instructions are as fast as most simple integer ops", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_fastPartialYmmOrZmmWrite = Feature{ + .name = "fastPartialYmmOrZmmWrite", + .llvm_name = "fast-partial-ymm-or-zmm-write", + .description = "Partial writes to YMM/ZMM registers are fast", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_fastShldRotate = Feature{ + .name = "fastShldRotate", + .llvm_name = "fast-shld-rotate", + .description = "SHLD can be used as a faster rotate", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_fastScalarFsqrt = Feature{ + .name = "fastScalarFsqrt", + .llvm_name = "fast-scalar-fsqrt", + .description = "Scalar SQRT is fast (disable Newton-Raphson)", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_fastScalarShiftMasks = Feature{ + .name = "fastScalarShiftMasks", + .llvm_name = "fast-scalar-shift-masks", + .description = "Prefer a left/right scalar logical shift pair over a shift+and pair", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_fastVariableShuffle = Feature{ + .name = "fastVariableShuffle", + .llvm_name = "fast-variable-shuffle", + .description = "Shuffles with variable masks are fast", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_fastVectorFsqrt = Feature{ + .name = "fastVectorFsqrt", + .llvm_name = "fast-vector-fsqrt", + .description = "Vector SQRT is fast (disable Newton-Raphson)", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_fastVectorShiftMasks = Feature{ + .name = "fastVectorShiftMasks", + .llvm_name = "fast-vector-shift-masks", + .description = "Prefer a left/right vector logical shift pair over a shift+and pair", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_gfni = Feature{ + .name = "gfni", + .llvm_name = "gfni", + .description = "Enable Galois Field Arithmetic Instructions", + .dependencies = &[_]*const Feature { + &feature_sse, + }, +}; + +pub const feature_fastGather = Feature{ + .name = "fastGather", + .llvm_name = "fast-gather", + .description = "Indicates if gather is reasonably fast", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_avx512ifma = Feature{ + .name = "avx512ifma", + .llvm_name = "avx512ifma", + .description = "Enable AVX-512 Integer Fused Multiple-Add", + .dependencies = &[_]*const Feature { + &feature_sse, + }, +}; + +pub const feature_invpcid = Feature{ + .name = "invpcid", + .llvm_name = "invpcid", + .description = "Invalidate Process-Context Identifier", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_sahf = Feature{ + .name = "sahf", + .llvm_name = "sahf", + .description = "Support LAHF and SAHF instructions", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_leaSp = Feature{ + .name = "leaSp", + .llvm_name = "lea-sp", + .description = "Use LEA for adjusting the stack pointer", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_leaUsesAg = Feature{ + .name = "leaUsesAg", + .llvm_name = "lea-uses-ag", + .description = "LEA instruction needs inputs at AG stage", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_lwp = Feature{ + .name = "lwp", + .llvm_name = "lwp", + .description = "Enable LWP instructions", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_lzcnt = Feature{ + .name = "lzcnt", + .llvm_name = "lzcnt", + .description = "Support LZCNT instruction", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_falseDepsLzcntTzcnt = Feature{ + .name = "falseDepsLzcntTzcnt", + .llvm_name = "false-deps-lzcnt-tzcnt", + .description = "LZCNT/TZCNT have a false dependency on dest register", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_mmx = Feature{ + .name = "mmx", + .llvm_name = "mmx", + .description = "Enable MMX instructions", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_movbe = Feature{ + .name = "movbe", + .llvm_name = "movbe", + .description = "Support MOVBE instruction", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_movdir64b = Feature{ + .name = "movdir64b", + .llvm_name = "movdir64b", + .description = "Support movdir64b instruction", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_movdiri = Feature{ + .name = "movdiri", + .llvm_name = "movdiri", + .description = "Support movdiri instruction", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_mpx = Feature{ + .name = "mpx", + .llvm_name = "mpx", + .description = "Support MPX instructions", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_mwaitx = Feature{ + .name = "mwaitx", + .llvm_name = "mwaitx", + .description = "Enable MONITORX/MWAITX timer functionality", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_macrofusion = Feature{ + .name = "macrofusion", + .llvm_name = "macrofusion", + .description = "Various instructions can be fused with conditional branches", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_mergeToThreewayBranch = Feature{ + .name = "mergeToThreewayBranch", + .llvm_name = "merge-to-threeway-branch", + .description = "Merge branches to a three-way conditional branch", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_nopl = Feature{ + .name = "nopl", + .llvm_name = "nopl", + .description = "Enable NOPL instruction", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_pclmul = Feature{ + .name = "pclmul", + .llvm_name = "pclmul", + .description = "Enable packed carry-less multiplication instructions", + .dependencies = &[_]*const Feature { + &feature_sse, + }, +}; + +pub const feature_pconfig = Feature{ + .name = "pconfig", + .llvm_name = "pconfig", + .description = "platform configuration instruction", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_avx512pf = Feature{ + .name = "avx512pf", + .llvm_name = "avx512pf", + .description = "Enable AVX-512 PreFetch Instructions", + .dependencies = &[_]*const Feature { + &feature_sse, + }, +}; + +pub const feature_pku = Feature{ + .name = "pku", + .llvm_name = "pku", + .description = "Enable protection keys", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_popcnt = Feature{ + .name = "popcnt", + .llvm_name = "popcnt", + .description = "Support POPCNT instruction", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_falseDepsPopcnt = Feature{ + .name = "falseDepsPopcnt", + .llvm_name = "false-deps-popcnt", + .description = "POPCNT has a false dependency on dest register", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_prefetchwt1 = Feature{ + .name = "prefetchwt1", + .llvm_name = "prefetchwt1", + .description = "Prefetch with Intent to Write and T1 Hint", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_prfchw = Feature{ + .name = "prfchw", + .llvm_name = "prfchw", + .description = "Support PRFCHW instructions", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_ptwrite = Feature{ + .name = "ptwrite", + .llvm_name = "ptwrite", + .description = "Support ptwrite instruction", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_padShortFunctions = Feature{ + .name = "padShortFunctions", + .llvm_name = "pad-short-functions", + .description = "Pad short functions", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_prefer256Bit = Feature{ + .name = "prefer256Bit", + .llvm_name = "prefer-256-bit", + .description = "Prefer 256-bit AVX instructions", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_rdpid = Feature{ + .name = "rdpid", + .llvm_name = "rdpid", + .description = "Support RDPID instructions", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_rdrnd = Feature{ + .name = "rdrnd", + .llvm_name = "rdrnd", + .description = "Support RDRAND instruction", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_rdseed = Feature{ + .name = "rdseed", + .llvm_name = "rdseed", + .description = "Support RDSEED instruction", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_rtm = Feature{ + .name = "rtm", + .llvm_name = "rtm", + .description = "Support RTM instructions", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_retpoline = Feature{ + .name = "retpoline", + .llvm_name = "retpoline", + .description = "Remove speculation of indirect branches from the generated code, either by avoiding them entirely or lowering them with a speculation blocking construct", + .dependencies = &[_]*const Feature { + &feature_retpolineIndirectCalls, + &feature_retpolineIndirectBranches, + }, +}; + +pub const feature_retpolineExternalThunk = Feature{ + .name = "retpolineExternalThunk", + .llvm_name = "retpoline-external-thunk", + .description = "When lowering an indirect call or branch using a `retpoline`, rely on the specified user provided thunk rather than emitting one ourselves. Only has effect when combined with some other retpoline feature", + .dependencies = &[_]*const Feature { + &feature_retpolineIndirectCalls, + }, +}; + +pub const feature_retpolineIndirectBranches = Feature{ + .name = "retpolineIndirectBranches", + .llvm_name = "retpoline-indirect-branches", + .description = "Remove speculation of indirect branches from the generated code", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_retpolineIndirectCalls = Feature{ + .name = "retpolineIndirectCalls", + .llvm_name = "retpoline-indirect-calls", + .description = "Remove speculation of indirect calls from the generated code", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_sgx = Feature{ + .name = "sgx", + .llvm_name = "sgx", + .description = "Enable Software Guard Extensions", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_sha = Feature{ + .name = "sha", + .llvm_name = "sha", + .description = "Enable SHA instructions", + .dependencies = &[_]*const Feature { + &feature_sse, + }, +}; + +pub const feature_shstk = Feature{ + .name = "shstk", + .llvm_name = "shstk", + .description = "Support CET Shadow-Stack instructions", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_sse = Feature{ + .name = "sse", + .llvm_name = "sse", + .description = "Enable SSE instructions", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_sse2 = Feature{ + .name = "sse2", + .llvm_name = "sse2", + .description = "Enable SSE2 instructions", + .dependencies = &[_]*const Feature { + &feature_sse, + }, +}; + +pub const feature_sse3 = Feature{ + .name = "sse3", + .llvm_name = "sse3", + .description = "Enable SSE3 instructions", + .dependencies = &[_]*const Feature { + &feature_sse, + }, +}; + +pub const feature_sse4a = Feature{ + .name = "sse4a", + .llvm_name = "sse4a", + .description = "Support SSE 4a instructions", + .dependencies = &[_]*const Feature { + &feature_sse, + }, +}; + +pub const feature_sse41 = Feature{ + .name = "sse41", + .llvm_name = "sse4.1", + .description = "Enable SSE 4.1 instructions", + .dependencies = &[_]*const Feature { + &feature_sse, + }, +}; + +pub const feature_sse42 = Feature{ + .name = "sse42", + .llvm_name = "sse4.2", + .description = "Enable SSE 4.2 instructions", + .dependencies = &[_]*const Feature { + &feature_sse, + }, +}; + +pub const feature_sseUnalignedMem = Feature{ + .name = "sseUnalignedMem", + .llvm_name = "sse-unaligned-mem", + .description = "Allow unaligned memory operands with SSE instructions", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_ssse3 = Feature{ + .name = "ssse3", + .llvm_name = "ssse3", + .description = "Enable SSSE3 instructions", + .dependencies = &[_]*const Feature { + &feature_sse, + }, +}; + +pub const feature_slow3opsLea = Feature{ + .name = "slow3opsLea", + .llvm_name = "slow-3ops-lea", + .description = "LEA instruction with 3 ops or certain registers is slow", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_idivlToDivb = Feature{ + .name = "idivlToDivb", + .llvm_name = "idivl-to-divb", + .description = "Use 8-bit divide for positive values less than 256", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_idivqToDivl = Feature{ + .name = "idivqToDivl", + .llvm_name = "idivq-to-divl", + .description = "Use 32-bit divide for positive values less than 2^32", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_slowIncdec = Feature{ + .name = "slowIncdec", + .llvm_name = "slow-incdec", + .description = "INC and DEC instructions are slower than ADD and SUB", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_slowLea = Feature{ + .name = "slowLea", + .llvm_name = "slow-lea", + .description = "LEA instruction with certain arguments is slow", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_slowPmaddwd = Feature{ + .name = "slowPmaddwd", + .llvm_name = "slow-pmaddwd", + .description = "PMADDWD is slower than PMULLD", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_slowPmulld = Feature{ + .name = "slowPmulld", + .llvm_name = "slow-pmulld", + .description = "PMULLD instruction is slow", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_slowShld = Feature{ + .name = "slowShld", + .llvm_name = "slow-shld", + .description = "SHLD instruction is slow", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_slowTwoMemOps = Feature{ + .name = "slowTwoMemOps", + .llvm_name = "slow-two-mem-ops", + .description = "Two memory operand instructions are slow", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_slowUnalignedMem16 = Feature{ + .name = "slowUnalignedMem16", + .llvm_name = "slow-unaligned-mem-16", + .description = "Slow unaligned 16-byte memory access", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_slowUnalignedMem32 = Feature{ + .name = "slowUnalignedMem32", + .llvm_name = "slow-unaligned-mem-32", + .description = "Slow unaligned 32-byte memory access", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_softFloat = Feature{ + .name = "softFloat", + .llvm_name = "soft-float", + .description = "Use software floating point features", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_tbm = Feature{ + .name = "tbm", + .llvm_name = "tbm", + .description = "Enable TBM instructions", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_vaes = Feature{ + .name = "vaes", + .llvm_name = "vaes", + .description = "Promote selected AES instructions to AVX512/AVX registers", + .dependencies = &[_]*const Feature { + &feature_sse, + }, +}; + +pub const feature_avx512vbmi = Feature{ + .name = "avx512vbmi", + .llvm_name = "avx512vbmi", + .description = "Enable AVX-512 Vector Byte Manipulation Instructions", + .dependencies = &[_]*const Feature { + &feature_sse, + }, +}; + +pub const feature_avx512vbmi2 = Feature{ + .name = "avx512vbmi2", + .llvm_name = "avx512vbmi2", + .description = "Enable AVX-512 further Vector Byte Manipulation Instructions", + .dependencies = &[_]*const Feature { + &feature_sse, + }, +}; + +pub const feature_avx512vl = Feature{ + .name = "avx512vl", + .llvm_name = "avx512vl", + .description = "Enable AVX-512 Vector Length eXtensions", + .dependencies = &[_]*const Feature { + &feature_sse, + }, +}; + +pub const feature_avx512vnni = Feature{ + .name = "avx512vnni", + .llvm_name = "avx512vnni", + .description = "Enable AVX-512 Vector Neural Network Instructions", + .dependencies = &[_]*const Feature { + &feature_sse, + }, +}; + +pub const feature_avx512vp2intersect = Feature{ + .name = "avx512vp2intersect", + .llvm_name = "avx512vp2intersect", + .description = "Enable AVX-512 vp2intersect", + .dependencies = &[_]*const Feature { + &feature_sse, + }, +}; + +pub const feature_vpclmulqdq = Feature{ + .name = "vpclmulqdq", + .llvm_name = "vpclmulqdq", + .description = "Enable vpclmulqdq instructions", + .dependencies = &[_]*const Feature { + &feature_sse, + }, +}; + +pub const feature_avx512vpopcntdq = Feature{ + .name = "avx512vpopcntdq", + .llvm_name = "avx512vpopcntdq", + .description = "Enable AVX-512 Population Count Instructions", + .dependencies = &[_]*const Feature { + &feature_sse, + }, +}; + +pub const feature_waitpkg = Feature{ + .name = "waitpkg", + .llvm_name = "waitpkg", + .description = "Wait and pause enhancements", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_wbnoinvd = Feature{ + .name = "wbnoinvd", + .llvm_name = "wbnoinvd", + .description = "Write Back No Invalidate", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_x87 = Feature{ + .name = "x87", + .llvm_name = "x87", + .description = "Enable X87 float instructions", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_xop = Feature{ + .name = "xop", + .llvm_name = "xop", + .description = "Enable XOP instructions", + .dependencies = &[_]*const Feature { + &feature_sse, + }, +}; + +pub const feature_xsave = Feature{ + .name = "xsave", + .llvm_name = "xsave", + .description = "Support xsave instructions", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_xsavec = Feature{ + .name = "xsavec", + .llvm_name = "xsavec", + .description = "Support xsavec instructions", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_xsaveopt = Feature{ + .name = "xsaveopt", + .llvm_name = "xsaveopt", + .description = "Support xsaveopt instructions", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_xsaves = Feature{ + .name = "xsaves", + .llvm_name = "xsaves", + .description = "Support xsaves instructions", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_bitMode16 = Feature{ + .name = "bitMode16", + .llvm_name = "16bit-mode", + .description = "16-bit mode (i8086)", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_bitMode32 = Feature{ + .name = "bitMode32", + .llvm_name = "32bit-mode", + .description = "32-bit mode (80386)", + .dependencies = &[_]*const Feature { + }, +}; + +pub const feature_bitMode64 = Feature{ + .name = "bitMode64", + .llvm_name = "64bit-mode", + .description = "64-bit mode (x86_64)", + .dependencies = &[_]*const Feature { + }, +}; + +pub const features = &[_]*const Feature { + &feature_dnow3, + &feature_dnowa3, + &feature_bit64, + &feature_adx, + &feature_aes, + &feature_avx, + &feature_avx2, + &feature_avx512f, + &feature_avx512bf16, + &feature_avx512bitalg, + &feature_bmi, + &feature_bmi2, + &feature_avx512bw, + &feature_branchfusion, + &feature_avx512cd, + &feature_cldemote, + &feature_clflushopt, + &feature_clwb, + &feature_clzero, + &feature_cmov, + &feature_cx8, + &feature_cx16, + &feature_avx512dq, + &feature_enqcmd, + &feature_avx512er, + &feature_ermsb, + &feature_f16c, + &feature_fma, + &feature_fma4, + &feature_fsgsbase, + &feature_fxsr, + &feature_fast11bytenop, + &feature_fast15bytenop, + &feature_fastBextr, + &feature_fastHops, + &feature_fastLzcnt, + &feature_fastPartialYmmOrZmmWrite, + &feature_fastShldRotate, + &feature_fastScalarFsqrt, + &feature_fastScalarShiftMasks, + &feature_fastVariableShuffle, + &feature_fastVectorFsqrt, + &feature_fastVectorShiftMasks, + &feature_gfni, + &feature_fastGather, + &feature_avx512ifma, + &feature_invpcid, + &feature_sahf, + &feature_leaSp, + &feature_leaUsesAg, + &feature_lwp, + &feature_lzcnt, + &feature_falseDepsLzcntTzcnt, + &feature_mmx, + &feature_movbe, + &feature_movdir64b, + &feature_movdiri, + &feature_mpx, + &feature_mwaitx, + &feature_macrofusion, + &feature_mergeToThreewayBranch, + &feature_nopl, + &feature_pclmul, + &feature_pconfig, + &feature_avx512pf, + &feature_pku, + &feature_popcnt, + &feature_falseDepsPopcnt, + &feature_prefetchwt1, + &feature_prfchw, + &feature_ptwrite, + &feature_padShortFunctions, + &feature_prefer256Bit, + &feature_rdpid, + &feature_rdrnd, + &feature_rdseed, + &feature_rtm, + &feature_retpoline, + &feature_retpolineExternalThunk, + &feature_retpolineIndirectBranches, + &feature_retpolineIndirectCalls, + &feature_sgx, + &feature_sha, + &feature_shstk, + &feature_sse, + &feature_sse2, + &feature_sse3, + &feature_sse4a, + &feature_sse41, + &feature_sse42, + &feature_sseUnalignedMem, + &feature_ssse3, + &feature_slow3opsLea, + &feature_idivlToDivb, + &feature_idivqToDivl, + &feature_slowIncdec, + &feature_slowLea, + &feature_slowPmaddwd, + &feature_slowPmulld, + &feature_slowShld, + &feature_slowTwoMemOps, + &feature_slowUnalignedMem16, + &feature_slowUnalignedMem32, + &feature_softFloat, + &feature_tbm, + &feature_vaes, + &feature_avx512vbmi, + &feature_avx512vbmi2, + &feature_avx512vl, + &feature_avx512vnni, + &feature_avx512vp2intersect, + &feature_vpclmulqdq, + &feature_avx512vpopcntdq, + &feature_waitpkg, + &feature_wbnoinvd, + &feature_x87, + &feature_xop, + &feature_xsave, + &feature_xsavec, + &feature_xsaveopt, + &feature_xsaves, + &feature_bitMode16, + &feature_bitMode32, + &feature_bitMode64, +}; + +pub const cpu_amdfam10 = Cpu{ + .name = "amdfam10", + .llvm_name = "amdfam10", + .dependencies = &[_]*const Feature { + &feature_mmx, + &feature_dnowa3, + &feature_bit64, + &feature_cmov, + &feature_cx8, + &feature_cx16, + &feature_fxsr, + &feature_fastScalarShiftMasks, + &feature_sahf, + &feature_lzcnt, + &feature_nopl, + &feature_popcnt, + &feature_sse, + &feature_sse4a, + &feature_slowShld, + &feature_x87, + }, +}; + +pub const cpu_athlon = Cpu{ + .name = "athlon", + .llvm_name = "athlon", + .dependencies = &[_]*const Feature { + &feature_mmx, + &feature_dnowa3, + &feature_cmov, + &feature_cx8, + &feature_nopl, + &feature_slowShld, + &feature_slowUnalignedMem16, + &feature_x87, + }, +}; + +pub const cpu_athlon4 = Cpu{ + .name = "athlon4", + .llvm_name = "athlon-4", + .dependencies = &[_]*const Feature { + &feature_mmx, + &feature_dnowa3, + &feature_cmov, + &feature_cx8, + &feature_fxsr, + &feature_nopl, + &feature_sse, + &feature_slowShld, + &feature_slowUnalignedMem16, + &feature_x87, + }, +}; + +pub const cpu_athlonFx = Cpu{ + .name = "athlonFx", + .llvm_name = "athlon-fx", + .dependencies = &[_]*const Feature { + &feature_mmx, + &feature_dnowa3, + &feature_bit64, + &feature_cmov, + &feature_cx8, + &feature_fxsr, + &feature_fastScalarShiftMasks, + &feature_nopl, + &feature_sse, + &feature_sse2, + &feature_slowShld, + &feature_slowUnalignedMem16, + &feature_x87, + }, +}; + +pub const cpu_athlonMp = Cpu{ + .name = "athlonMp", + .llvm_name = "athlon-mp", + .dependencies = &[_]*const Feature { + &feature_mmx, + &feature_dnowa3, + &feature_cmov, + &feature_cx8, + &feature_fxsr, + &feature_nopl, + &feature_sse, + &feature_slowShld, + &feature_slowUnalignedMem16, + &feature_x87, + }, +}; + +pub const cpu_athlonTbird = Cpu{ + .name = "athlonTbird", + .llvm_name = "athlon-tbird", + .dependencies = &[_]*const Feature { + &feature_mmx, + &feature_dnowa3, + &feature_cmov, + &feature_cx8, + &feature_nopl, + &feature_slowShld, + &feature_slowUnalignedMem16, + &feature_x87, + }, +}; + +pub const cpu_athlonXp = Cpu{ + .name = "athlonXp", + .llvm_name = "athlon-xp", + .dependencies = &[_]*const Feature { + &feature_mmx, + &feature_dnowa3, + &feature_cmov, + &feature_cx8, + &feature_fxsr, + &feature_nopl, + &feature_sse, + &feature_slowShld, + &feature_slowUnalignedMem16, + &feature_x87, + }, +}; + +pub const cpu_athlon64 = Cpu{ + .name = "athlon64", + .llvm_name = "athlon64", + .dependencies = &[_]*const Feature { + &feature_mmx, + &feature_dnowa3, + &feature_bit64, + &feature_cmov, + &feature_cx8, + &feature_fxsr, + &feature_fastScalarShiftMasks, + &feature_nopl, + &feature_sse, + &feature_sse2, + &feature_slowShld, + &feature_slowUnalignedMem16, + &feature_x87, + }, +}; + +pub const cpu_athlon64Sse3 = Cpu{ + .name = "athlon64Sse3", + .llvm_name = "athlon64-sse3", + .dependencies = &[_]*const Feature { + &feature_mmx, + &feature_dnowa3, + &feature_bit64, + &feature_cmov, + &feature_cx8, + &feature_cx16, + &feature_fxsr, + &feature_fastScalarShiftMasks, + &feature_nopl, + &feature_sse, + &feature_sse3, + &feature_slowShld, + &feature_slowUnalignedMem16, + &feature_x87, + }, +}; + +pub const cpu_atom = Cpu{ + .name = "atom", + .llvm_name = "atom", + .dependencies = &[_]*const Feature { + &feature_bit64, + &feature_cmov, + &feature_cx8, + &feature_cx16, + &feature_fxsr, + &feature_sahf, + &feature_leaSp, + &feature_leaUsesAg, + &feature_mmx, + &feature_movbe, + &feature_nopl, + &feature_padShortFunctions, + &feature_sse, + &feature_ssse3, + &feature_idivlToDivb, + &feature_idivqToDivl, + &feature_slowTwoMemOps, + &feature_slowUnalignedMem16, + &feature_x87, + }, +}; + +pub const cpu_barcelona = Cpu{ + .name = "barcelona", + .llvm_name = "barcelona", + .dependencies = &[_]*const Feature { + &feature_mmx, + &feature_dnowa3, + &feature_bit64, + &feature_cmov, + &feature_cx8, + &feature_cx16, + &feature_fxsr, + &feature_fastScalarShiftMasks, + &feature_sahf, + &feature_lzcnt, + &feature_nopl, + &feature_popcnt, + &feature_sse, + &feature_sse4a, + &feature_slowShld, + &feature_x87, + }, +}; + +pub const cpu_bdver1 = Cpu{ + .name = "bdver1", + .llvm_name = "bdver1", + .dependencies = &[_]*const Feature { + &feature_bit64, + &feature_sse, + &feature_aes, + &feature_branchfusion, + &feature_cmov, + &feature_cx8, + &feature_cx16, + &feature_fxsr, + &feature_fast11bytenop, + &feature_fastScalarShiftMasks, + &feature_sahf, + &feature_lwp, + &feature_lzcnt, + &feature_mmx, + &feature_nopl, + &feature_pclmul, + &feature_popcnt, + &feature_prfchw, + &feature_slowShld, + &feature_x87, + &feature_xop, + &feature_xsave, + }, +}; + +pub const cpu_bdver2 = Cpu{ + .name = "bdver2", + .llvm_name = "bdver2", + .dependencies = &[_]*const Feature { + &feature_bit64, + &feature_sse, + &feature_aes, + &feature_bmi, + &feature_branchfusion, + &feature_cmov, + &feature_cx8, + &feature_cx16, + &feature_f16c, + &feature_fma, + &feature_fxsr, + &feature_fast11bytenop, + &feature_fastBextr, + &feature_fastScalarShiftMasks, + &feature_sahf, + &feature_lwp, + &feature_lzcnt, + &feature_mmx, + &feature_nopl, + &feature_pclmul, + &feature_popcnt, + &feature_prfchw, + &feature_slowShld, + &feature_tbm, + &feature_x87, + &feature_xop, + &feature_xsave, + }, +}; + +pub const cpu_bdver3 = Cpu{ + .name = "bdver3", + .llvm_name = "bdver3", + .dependencies = &[_]*const Feature { + &feature_bit64, + &feature_sse, + &feature_aes, + &feature_bmi, + &feature_branchfusion, + &feature_cmov, + &feature_cx8, + &feature_cx16, + &feature_f16c, + &feature_fma, + &feature_fsgsbase, + &feature_fxsr, + &feature_fast11bytenop, + &feature_fastBextr, + &feature_fastScalarShiftMasks, + &feature_sahf, + &feature_lwp, + &feature_lzcnt, + &feature_mmx, + &feature_nopl, + &feature_pclmul, + &feature_popcnt, + &feature_prfchw, + &feature_slowShld, + &feature_tbm, + &feature_x87, + &feature_xop, + &feature_xsave, + &feature_xsaveopt, + }, +}; + +pub const cpu_bdver4 = Cpu{ + .name = "bdver4", + .llvm_name = "bdver4", + .dependencies = &[_]*const Feature { + &feature_bit64, + &feature_sse, + &feature_aes, + &feature_avx2, + &feature_bmi, + &feature_bmi2, + &feature_branchfusion, + &feature_cmov, + &feature_cx8, + &feature_cx16, + &feature_f16c, + &feature_fma, + &feature_fsgsbase, + &feature_fxsr, + &feature_fast11bytenop, + &feature_fastBextr, + &feature_fastScalarShiftMasks, + &feature_sahf, + &feature_lwp, + &feature_lzcnt, + &feature_mmx, + &feature_mwaitx, + &feature_nopl, + &feature_pclmul, + &feature_popcnt, + &feature_prfchw, + &feature_slowShld, + &feature_tbm, + &feature_x87, + &feature_xop, + &feature_xsave, + &feature_xsaveopt, + }, +}; + +pub const cpu_bonnell = Cpu{ + .name = "bonnell", + .llvm_name = "bonnell", + .dependencies = &[_]*const Feature { + &feature_bit64, + &feature_cmov, + &feature_cx8, + &feature_cx16, + &feature_fxsr, + &feature_sahf, + &feature_leaSp, + &feature_leaUsesAg, + &feature_mmx, + &feature_movbe, + &feature_nopl, + &feature_padShortFunctions, + &feature_sse, + &feature_ssse3, + &feature_idivlToDivb, + &feature_idivqToDivl, + &feature_slowTwoMemOps, + &feature_slowUnalignedMem16, + &feature_x87, + }, +}; + +pub const cpu_broadwell = Cpu{ + .name = "broadwell", + .llvm_name = "broadwell", + .dependencies = &[_]*const Feature { + &feature_bit64, + &feature_adx, + &feature_sse, + &feature_avx, + &feature_avx2, + &feature_bmi, + &feature_bmi2, + &feature_cmov, + &feature_cx8, + &feature_cx16, + &feature_ermsb, + &feature_f16c, + &feature_fma, + &feature_fsgsbase, + &feature_fxsr, + &feature_fastShldRotate, + &feature_fastScalarFsqrt, + &feature_fastVariableShuffle, + &feature_invpcid, + &feature_sahf, + &feature_lzcnt, + &feature_falseDepsLzcntTzcnt, + &feature_mmx, + &feature_movbe, + &feature_macrofusion, + &feature_mergeToThreewayBranch, + &feature_nopl, + &feature_pclmul, + &feature_popcnt, + &feature_falseDepsPopcnt, + &feature_prfchw, + &feature_rdrnd, + &feature_rdseed, + &feature_sse42, + &feature_slow3opsLea, + &feature_idivqToDivl, + &feature_x87, + &feature_xsave, + &feature_xsaveopt, + }, +}; + +pub const cpu_btver1 = Cpu{ + .name = "btver1", + .llvm_name = "btver1", + .dependencies = &[_]*const Feature { + &feature_bit64, + &feature_cmov, + &feature_cx8, + &feature_cx16, + &feature_fxsr, + &feature_fast15bytenop, + &feature_fastScalarShiftMasks, + &feature_fastVectorShiftMasks, + &feature_sahf, + &feature_lzcnt, + &feature_mmx, + &feature_nopl, + &feature_popcnt, + &feature_prfchw, + &feature_sse, + &feature_sse4a, + &feature_ssse3, + &feature_slowShld, + &feature_x87, + }, +}; + +pub const cpu_btver2 = Cpu{ + .name = "btver2", + .llvm_name = "btver2", + .dependencies = &[_]*const Feature { + &feature_bit64, + &feature_sse, + &feature_aes, + &feature_avx, + &feature_bmi, + &feature_cmov, + &feature_cx8, + &feature_cx16, + &feature_f16c, + &feature_fxsr, + &feature_fast15bytenop, + &feature_fastBextr, + &feature_fastHops, + &feature_fastLzcnt, + &feature_fastPartialYmmOrZmmWrite, + &feature_fastScalarShiftMasks, + &feature_fastVectorShiftMasks, + &feature_sahf, + &feature_lzcnt, + &feature_mmx, + &feature_movbe, + &feature_nopl, + &feature_pclmul, + &feature_popcnt, + &feature_prfchw, + &feature_sse4a, + &feature_ssse3, + &feature_slowShld, + &feature_x87, + &feature_xsave, + &feature_xsaveopt, + }, +}; + +pub const cpu_c3 = Cpu{ + .name = "c3", + .llvm_name = "c3", + .dependencies = &[_]*const Feature { + &feature_mmx, + &feature_dnow3, + &feature_slowUnalignedMem16, + &feature_x87, + }, +}; + +pub const cpu_c32 = Cpu{ + .name = "c32", + .llvm_name = "c3-2", + .dependencies = &[_]*const Feature { + &feature_cmov, + &feature_cx8, + &feature_fxsr, + &feature_mmx, + &feature_sse, + &feature_slowUnalignedMem16, + &feature_x87, + }, +}; + +pub const cpu_cannonlake = Cpu{ + .name = "cannonlake", + .llvm_name = "cannonlake", + .dependencies = &[_]*const Feature { + &feature_bit64, + &feature_adx, + &feature_sse, + &feature_aes, + &feature_avx, + &feature_avx2, + &feature_avx512f, + &feature_bmi, + &feature_bmi2, + &feature_avx512bw, + &feature_avx512cd, + &feature_clflushopt, + &feature_cmov, + &feature_cx8, + &feature_cx16, + &feature_avx512dq, + &feature_ermsb, + &feature_f16c, + &feature_fma, + &feature_fsgsbase, + &feature_fxsr, + &feature_fastShldRotate, + &feature_fastScalarFsqrt, + &feature_fastVariableShuffle, + &feature_fastVectorFsqrt, + &feature_fastGather, + &feature_avx512ifma, + &feature_invpcid, + &feature_sahf, + &feature_lzcnt, + &feature_mmx, + &feature_movbe, + &feature_mpx, + &feature_macrofusion, + &feature_mergeToThreewayBranch, + &feature_nopl, + &feature_pclmul, + &feature_pku, + &feature_popcnt, + &feature_prfchw, + &feature_rdrnd, + &feature_rdseed, + &feature_sgx, + &feature_sha, + &feature_sse42, + &feature_slow3opsLea, + &feature_idivqToDivl, + &feature_avx512vbmi, + &feature_avx512vl, + &feature_x87, + &feature_xsave, + &feature_xsavec, + &feature_xsaveopt, + &feature_xsaves, + }, +}; + +pub const cpu_cascadelake = Cpu{ + .name = "cascadelake", + .llvm_name = "cascadelake", + .dependencies = &[_]*const Feature { + &feature_bit64, + &feature_adx, + &feature_sse, + &feature_aes, + &feature_avx, + &feature_avx2, + &feature_avx512f, + &feature_bmi, + &feature_bmi2, + &feature_avx512bw, + &feature_avx512cd, + &feature_clflushopt, + &feature_clwb, + &feature_cmov, + &feature_cx8, + &feature_cx16, + &feature_avx512dq, + &feature_ermsb, + &feature_f16c, + &feature_fma, + &feature_fsgsbase, + &feature_fxsr, + &feature_fastShldRotate, + &feature_fastScalarFsqrt, + &feature_fastVariableShuffle, + &feature_fastVectorFsqrt, + &feature_fastGather, + &feature_invpcid, + &feature_sahf, + &feature_lzcnt, + &feature_mmx, + &feature_movbe, + &feature_mpx, + &feature_macrofusion, + &feature_mergeToThreewayBranch, + &feature_nopl, + &feature_pclmul, + &feature_pku, + &feature_popcnt, + &feature_falseDepsPopcnt, + &feature_prfchw, + &feature_rdrnd, + &feature_rdseed, + &feature_sse42, + &feature_slow3opsLea, + &feature_idivqToDivl, + &feature_avx512vl, + &feature_avx512vnni, + &feature_x87, + &feature_xsave, + &feature_xsavec, + &feature_xsaveopt, + &feature_xsaves, + }, +}; + +pub const cpu_cooperlake = Cpu{ + .name = "cooperlake", + .llvm_name = "cooperlake", + .dependencies = &[_]*const Feature { + &feature_bit64, + &feature_adx, + &feature_sse, + &feature_aes, + &feature_avx, + &feature_avx2, + &feature_avx512f, + &feature_avx512bf16, + &feature_bmi, + &feature_bmi2, + &feature_avx512bw, + &feature_avx512cd, + &feature_clflushopt, + &feature_clwb, + &feature_cmov, + &feature_cx8, + &feature_cx16, + &feature_avx512dq, + &feature_ermsb, + &feature_f16c, + &feature_fma, + &feature_fsgsbase, + &feature_fxsr, + &feature_fastShldRotate, + &feature_fastScalarFsqrt, + &feature_fastVariableShuffle, + &feature_fastVectorFsqrt, + &feature_fastGather, + &feature_invpcid, + &feature_sahf, + &feature_lzcnt, + &feature_mmx, + &feature_movbe, + &feature_mpx, + &feature_macrofusion, + &feature_mergeToThreewayBranch, + &feature_nopl, + &feature_pclmul, + &feature_pku, + &feature_popcnt, + &feature_falseDepsPopcnt, + &feature_prfchw, + &feature_rdrnd, + &feature_rdseed, + &feature_sse42, + &feature_slow3opsLea, + &feature_idivqToDivl, + &feature_avx512vl, + &feature_avx512vnni, + &feature_x87, + &feature_xsave, + &feature_xsavec, + &feature_xsaveopt, + &feature_xsaves, + }, +}; + +pub const cpu_coreAvxI = Cpu{ + .name = "coreAvxI", + .llvm_name = "core-avx-i", + .dependencies = &[_]*const Feature { + &feature_bit64, + &feature_sse, + &feature_avx, + &feature_cmov, + &feature_cx8, + &feature_cx16, + &feature_f16c, + &feature_fsgsbase, + &feature_fxsr, + &feature_fastShldRotate, + &feature_fastScalarFsqrt, + &feature_sahf, + &feature_mmx, + &feature_macrofusion, + &feature_mergeToThreewayBranch, + &feature_nopl, + &feature_pclmul, + &feature_popcnt, + &feature_falseDepsPopcnt, + &feature_rdrnd, + &feature_sse42, + &feature_slow3opsLea, + &feature_idivqToDivl, + &feature_slowUnalignedMem32, + &feature_x87, + &feature_xsave, + &feature_xsaveopt, + }, +}; + +pub const cpu_coreAvx2 = Cpu{ + .name = "coreAvx2", + .llvm_name = "core-avx2", + .dependencies = &[_]*const Feature { + &feature_bit64, + &feature_sse, + &feature_avx, + &feature_avx2, + &feature_bmi, + &feature_bmi2, + &feature_cmov, + &feature_cx8, + &feature_cx16, + &feature_ermsb, + &feature_f16c, + &feature_fma, + &feature_fsgsbase, + &feature_fxsr, + &feature_fastShldRotate, + &feature_fastScalarFsqrt, + &feature_fastVariableShuffle, + &feature_invpcid, + &feature_sahf, + &feature_lzcnt, + &feature_falseDepsLzcntTzcnt, + &feature_mmx, + &feature_movbe, + &feature_macrofusion, + &feature_mergeToThreewayBranch, + &feature_nopl, + &feature_pclmul, + &feature_popcnt, + &feature_falseDepsPopcnt, + &feature_rdrnd, + &feature_sse42, + &feature_slow3opsLea, + &feature_idivqToDivl, + &feature_x87, + &feature_xsave, + &feature_xsaveopt, + }, +}; + +pub const cpu_core2 = Cpu{ + .name = "core2", + .llvm_name = "core2", + .dependencies = &[_]*const Feature { + &feature_bit64, + &feature_cmov, + &feature_cx8, + &feature_cx16, + &feature_fxsr, + &feature_sahf, + &feature_mmx, + &feature_macrofusion, + &feature_nopl, + &feature_sse, + &feature_ssse3, + &feature_slowUnalignedMem16, + &feature_x87, + }, +}; + +pub const cpu_corei7 = Cpu{ + .name = "corei7", + .llvm_name = "corei7", + .dependencies = &[_]*const Feature { + &feature_bit64, + &feature_cmov, + &feature_cx8, + &feature_cx16, + &feature_fxsr, + &feature_sahf, + &feature_mmx, + &feature_macrofusion, + &feature_nopl, + &feature_popcnt, + &feature_sse, + &feature_sse42, + &feature_x87, + }, +}; + +pub const cpu_corei7Avx = Cpu{ + .name = "corei7Avx", + .llvm_name = "corei7-avx", + .dependencies = &[_]*const Feature { + &feature_bit64, + &feature_sse, + &feature_avx, + &feature_cmov, + &feature_cx8, + &feature_cx16, + &feature_fxsr, + &feature_fastShldRotate, + &feature_fastScalarFsqrt, + &feature_sahf, + &feature_mmx, + &feature_macrofusion, + &feature_mergeToThreewayBranch, + &feature_nopl, + &feature_pclmul, + &feature_popcnt, + &feature_falseDepsPopcnt, + &feature_sse42, + &feature_slow3opsLea, + &feature_idivqToDivl, + &feature_slowUnalignedMem32, + &feature_x87, + &feature_xsave, + &feature_xsaveopt, + }, +}; + +pub const cpu_generic = Cpu{ + .name = "generic", + .llvm_name = "generic", + .dependencies = &[_]*const Feature { + &feature_cx8, + &feature_slowUnalignedMem16, + &feature_x87, + }, +}; + +pub const cpu_geode = Cpu{ + .name = "geode", + .llvm_name = "geode", + .dependencies = &[_]*const Feature { + &feature_mmx, + &feature_dnowa3, + &feature_cx8, + &feature_slowUnalignedMem16, + &feature_x87, + }, +}; + +pub const cpu_goldmont = Cpu{ + .name = "goldmont", + .llvm_name = "goldmont", + .dependencies = &[_]*const Feature { + &feature_bit64, + &feature_sse, + &feature_aes, + &feature_clflushopt, + &feature_cmov, + &feature_cx8, + &feature_cx16, + &feature_fsgsbase, + &feature_fxsr, + &feature_sahf, + &feature_mmx, + &feature_movbe, + &feature_mpx, + &feature_nopl, + &feature_pclmul, + &feature_popcnt, + &feature_falseDepsPopcnt, + &feature_prfchw, + &feature_rdrnd, + &feature_rdseed, + &feature_sha, + &feature_sse42, + &feature_ssse3, + &feature_slowIncdec, + &feature_slowLea, + &feature_slowTwoMemOps, + &feature_x87, + &feature_xsave, + &feature_xsavec, + &feature_xsaveopt, + &feature_xsaves, + }, +}; + +pub const cpu_goldmontPlus = Cpu{ + .name = "goldmontPlus", + .llvm_name = "goldmont-plus", + .dependencies = &[_]*const Feature { + &feature_bit64, + &feature_sse, + &feature_aes, + &feature_clflushopt, + &feature_cmov, + &feature_cx8, + &feature_cx16, + &feature_fsgsbase, + &feature_fxsr, + &feature_sahf, + &feature_mmx, + &feature_movbe, + &feature_mpx, + &feature_nopl, + &feature_pclmul, + &feature_popcnt, + &feature_prfchw, + &feature_ptwrite, + &feature_rdpid, + &feature_rdrnd, + &feature_rdseed, + &feature_sgx, + &feature_sha, + &feature_sse42, + &feature_ssse3, + &feature_slowIncdec, + &feature_slowLea, + &feature_slowTwoMemOps, + &feature_x87, + &feature_xsave, + &feature_xsavec, + &feature_xsaveopt, + &feature_xsaves, + }, +}; + +pub const cpu_haswell = Cpu{ + .name = "haswell", + .llvm_name = "haswell", + .dependencies = &[_]*const Feature { + &feature_bit64, + &feature_sse, + &feature_avx, + &feature_avx2, + &feature_bmi, + &feature_bmi2, + &feature_cmov, + &feature_cx8, + &feature_cx16, + &feature_ermsb, + &feature_f16c, + &feature_fma, + &feature_fsgsbase, + &feature_fxsr, + &feature_fastShldRotate, + &feature_fastScalarFsqrt, + &feature_fastVariableShuffle, + &feature_invpcid, + &feature_sahf, + &feature_lzcnt, + &feature_falseDepsLzcntTzcnt, + &feature_mmx, + &feature_movbe, + &feature_macrofusion, + &feature_mergeToThreewayBranch, + &feature_nopl, + &feature_pclmul, + &feature_popcnt, + &feature_falseDepsPopcnt, + &feature_rdrnd, + &feature_sse42, + &feature_slow3opsLea, + &feature_idivqToDivl, + &feature_x87, + &feature_xsave, + &feature_xsaveopt, + }, +}; + +pub const cpu_i386 = Cpu{ + .name = "i386", + .llvm_name = "i386", + .dependencies = &[_]*const Feature { + &feature_slowUnalignedMem16, + &feature_x87, + }, +}; + +pub const cpu_i486 = Cpu{ + .name = "i486", + .llvm_name = "i486", + .dependencies = &[_]*const Feature { + &feature_slowUnalignedMem16, + &feature_x87, + }, +}; + +pub const cpu_i586 = Cpu{ + .name = "i586", + .llvm_name = "i586", + .dependencies = &[_]*const Feature { + &feature_cx8, + &feature_slowUnalignedMem16, + &feature_x87, + }, +}; + +pub const cpu_i686 = Cpu{ + .name = "i686", + .llvm_name = "i686", + .dependencies = &[_]*const Feature { + &feature_cmov, + &feature_cx8, + &feature_slowUnalignedMem16, + &feature_x87, + }, +}; + +pub const cpu_icelakeClient = Cpu{ + .name = "icelakeClient", + .llvm_name = "icelake-client", + .dependencies = &[_]*const Feature { + &feature_bit64, + &feature_adx, + &feature_sse, + &feature_aes, + &feature_avx, + &feature_avx2, + &feature_avx512f, + &feature_avx512bitalg, + &feature_bmi, + &feature_bmi2, + &feature_avx512bw, + &feature_avx512cd, + &feature_clflushopt, + &feature_clwb, + &feature_cmov, + &feature_cx8, + &feature_cx16, + &feature_avx512dq, + &feature_ermsb, + &feature_f16c, + &feature_fma, + &feature_fsgsbase, + &feature_fxsr, + &feature_fastShldRotate, + &feature_fastScalarFsqrt, + &feature_fastVariableShuffle, + &feature_fastVectorFsqrt, + &feature_gfni, + &feature_fastGather, + &feature_avx512ifma, + &feature_invpcid, + &feature_sahf, + &feature_lzcnt, + &feature_mmx, + &feature_movbe, + &feature_mpx, + &feature_macrofusion, + &feature_mergeToThreewayBranch, + &feature_nopl, + &feature_pclmul, + &feature_pku, + &feature_popcnt, + &feature_prfchw, + &feature_rdpid, + &feature_rdrnd, + &feature_rdseed, + &feature_sgx, + &feature_sha, + &feature_sse42, + &feature_slow3opsLea, + &feature_idivqToDivl, + &feature_vaes, + &feature_avx512vbmi, + &feature_avx512vbmi2, + &feature_avx512vl, + &feature_avx512vnni, + &feature_vpclmulqdq, + &feature_avx512vpopcntdq, + &feature_x87, + &feature_xsave, + &feature_xsavec, + &feature_xsaveopt, + &feature_xsaves, + }, +}; + +pub const cpu_icelakeServer = Cpu{ + .name = "icelakeServer", + .llvm_name = "icelake-server", + .dependencies = &[_]*const Feature { + &feature_bit64, + &feature_adx, + &feature_sse, + &feature_aes, + &feature_avx, + &feature_avx2, + &feature_avx512f, + &feature_avx512bitalg, + &feature_bmi, + &feature_bmi2, + &feature_avx512bw, + &feature_avx512cd, + &feature_clflushopt, + &feature_clwb, + &feature_cmov, + &feature_cx8, + &feature_cx16, + &feature_avx512dq, + &feature_ermsb, + &feature_f16c, + &feature_fma, + &feature_fsgsbase, + &feature_fxsr, + &feature_fastShldRotate, + &feature_fastScalarFsqrt, + &feature_fastVariableShuffle, + &feature_fastVectorFsqrt, + &feature_gfni, + &feature_fastGather, + &feature_avx512ifma, + &feature_invpcid, + &feature_sahf, + &feature_lzcnt, + &feature_mmx, + &feature_movbe, + &feature_mpx, + &feature_macrofusion, + &feature_mergeToThreewayBranch, + &feature_nopl, + &feature_pclmul, + &feature_pconfig, + &feature_pku, + &feature_popcnt, + &feature_prfchw, + &feature_rdpid, + &feature_rdrnd, + &feature_rdseed, + &feature_sgx, + &feature_sha, + &feature_sse42, + &feature_slow3opsLea, + &feature_idivqToDivl, + &feature_vaes, + &feature_avx512vbmi, + &feature_avx512vbmi2, + &feature_avx512vl, + &feature_avx512vnni, + &feature_vpclmulqdq, + &feature_avx512vpopcntdq, + &feature_wbnoinvd, + &feature_x87, + &feature_xsave, + &feature_xsavec, + &feature_xsaveopt, + &feature_xsaves, + }, +}; + +pub const cpu_ivybridge = Cpu{ + .name = "ivybridge", + .llvm_name = "ivybridge", + .dependencies = &[_]*const Feature { + &feature_bit64, + &feature_sse, + &feature_avx, + &feature_cmov, + &feature_cx8, + &feature_cx16, + &feature_f16c, + &feature_fsgsbase, + &feature_fxsr, + &feature_fastShldRotate, + &feature_fastScalarFsqrt, + &feature_sahf, + &feature_mmx, + &feature_macrofusion, + &feature_mergeToThreewayBranch, + &feature_nopl, + &feature_pclmul, + &feature_popcnt, + &feature_falseDepsPopcnt, + &feature_rdrnd, + &feature_sse42, + &feature_slow3opsLea, + &feature_idivqToDivl, + &feature_slowUnalignedMem32, + &feature_x87, + &feature_xsave, + &feature_xsaveopt, + }, +}; + +pub const cpu_k6 = Cpu{ + .name = "k6", + .llvm_name = "k6", + .dependencies = &[_]*const Feature { + &feature_cx8, + &feature_mmx, + &feature_slowUnalignedMem16, + &feature_x87, + }, +}; + +pub const cpu_k62 = Cpu{ + .name = "k62", + .llvm_name = "k6-2", + .dependencies = &[_]*const Feature { + &feature_mmx, + &feature_dnow3, + &feature_cx8, + &feature_slowUnalignedMem16, + &feature_x87, + }, +}; + +pub const cpu_k63 = Cpu{ + .name = "k63", + .llvm_name = "k6-3", + .dependencies = &[_]*const Feature { + &feature_mmx, + &feature_dnow3, + &feature_cx8, + &feature_slowUnalignedMem16, + &feature_x87, + }, +}; + +pub const cpu_k8 = Cpu{ + .name = "k8", + .llvm_name = "k8", + .dependencies = &[_]*const Feature { + &feature_mmx, + &feature_dnowa3, + &feature_bit64, + &feature_cmov, + &feature_cx8, + &feature_fxsr, + &feature_fastScalarShiftMasks, + &feature_nopl, + &feature_sse, + &feature_sse2, + &feature_slowShld, + &feature_slowUnalignedMem16, + &feature_x87, + }, +}; + +pub const cpu_k8Sse3 = Cpu{ + .name = "k8Sse3", + .llvm_name = "k8-sse3", + .dependencies = &[_]*const Feature { + &feature_mmx, + &feature_dnowa3, + &feature_bit64, + &feature_cmov, + &feature_cx8, + &feature_cx16, + &feature_fxsr, + &feature_fastScalarShiftMasks, + &feature_nopl, + &feature_sse, + &feature_sse3, + &feature_slowShld, + &feature_slowUnalignedMem16, + &feature_x87, + }, +}; + +pub const cpu_knl = Cpu{ + .name = "knl", + .llvm_name = "knl", + .dependencies = &[_]*const Feature { + &feature_bit64, + &feature_adx, + &feature_sse, + &feature_aes, + &feature_avx512f, + &feature_bmi, + &feature_bmi2, + &feature_avx512cd, + &feature_cmov, + &feature_cx8, + &feature_cx16, + &feature_avx512er, + &feature_f16c, + &feature_fma, + &feature_fsgsbase, + &feature_fxsr, + &feature_fastPartialYmmOrZmmWrite, + &feature_fastGather, + &feature_sahf, + &feature_lzcnt, + &feature_mmx, + &feature_movbe, + &feature_nopl, + &feature_pclmul, + &feature_avx512pf, + &feature_popcnt, + &feature_prefetchwt1, + &feature_prfchw, + &feature_rdrnd, + &feature_rdseed, + &feature_slow3opsLea, + &feature_idivqToDivl, + &feature_slowIncdec, + &feature_slowPmaddwd, + &feature_slowTwoMemOps, + &feature_x87, + &feature_xsave, + &feature_xsaveopt, + }, +}; + +pub const cpu_knm = Cpu{ + .name = "knm", + .llvm_name = "knm", + .dependencies = &[_]*const Feature { + &feature_bit64, + &feature_adx, + &feature_sse, + &feature_aes, + &feature_avx512f, + &feature_bmi, + &feature_bmi2, + &feature_avx512cd, + &feature_cmov, + &feature_cx8, + &feature_cx16, + &feature_avx512er, + &feature_f16c, + &feature_fma, + &feature_fsgsbase, + &feature_fxsr, + &feature_fastPartialYmmOrZmmWrite, + &feature_fastGather, + &feature_sahf, + &feature_lzcnt, + &feature_mmx, + &feature_movbe, + &feature_nopl, + &feature_pclmul, + &feature_avx512pf, + &feature_popcnt, + &feature_prefetchwt1, + &feature_prfchw, + &feature_rdrnd, + &feature_rdseed, + &feature_slow3opsLea, + &feature_idivqToDivl, + &feature_slowIncdec, + &feature_slowPmaddwd, + &feature_slowTwoMemOps, + &feature_avx512vpopcntdq, + &feature_x87, + &feature_xsave, + &feature_xsaveopt, + }, +}; + +pub const cpu_lakemont = Cpu{ + .name = "lakemont", + .llvm_name = "lakemont", + .dependencies = &[_]*const Feature { + }, +}; + +pub const cpu_nehalem = Cpu{ + .name = "nehalem", + .llvm_name = "nehalem", + .dependencies = &[_]*const Feature { + &feature_bit64, + &feature_cmov, + &feature_cx8, + &feature_cx16, + &feature_fxsr, + &feature_sahf, + &feature_mmx, + &feature_macrofusion, + &feature_nopl, + &feature_popcnt, + &feature_sse, + &feature_sse42, + &feature_x87, + }, +}; + +pub const cpu_nocona = Cpu{ + .name = "nocona", + .llvm_name = "nocona", + .dependencies = &[_]*const Feature { + &feature_bit64, + &feature_cmov, + &feature_cx8, + &feature_cx16, + &feature_fxsr, + &feature_mmx, + &feature_nopl, + &feature_sse, + &feature_sse3, + &feature_slowUnalignedMem16, + &feature_x87, + }, +}; + +pub const cpu_opteron = Cpu{ + .name = "opteron", + .llvm_name = "opteron", + .dependencies = &[_]*const Feature { + &feature_mmx, + &feature_dnowa3, + &feature_bit64, + &feature_cmov, + &feature_cx8, + &feature_fxsr, + &feature_fastScalarShiftMasks, + &feature_nopl, + &feature_sse, + &feature_sse2, + &feature_slowShld, + &feature_slowUnalignedMem16, + &feature_x87, + }, +}; + +pub const cpu_opteronSse3 = Cpu{ + .name = "opteronSse3", + .llvm_name = "opteron-sse3", + .dependencies = &[_]*const Feature { + &feature_mmx, + &feature_dnowa3, + &feature_bit64, + &feature_cmov, + &feature_cx8, + &feature_cx16, + &feature_fxsr, + &feature_fastScalarShiftMasks, + &feature_nopl, + &feature_sse, + &feature_sse3, + &feature_slowShld, + &feature_slowUnalignedMem16, + &feature_x87, + }, +}; + +pub const cpu_penryn = Cpu{ + .name = "penryn", + .llvm_name = "penryn", + .dependencies = &[_]*const Feature { + &feature_bit64, + &feature_cmov, + &feature_cx8, + &feature_cx16, + &feature_fxsr, + &feature_sahf, + &feature_mmx, + &feature_macrofusion, + &feature_nopl, + &feature_sse, + &feature_sse41, + &feature_slowUnalignedMem16, + &feature_x87, + }, +}; + +pub const cpu_pentium = Cpu{ + .name = "pentium", + .llvm_name = "pentium", + .dependencies = &[_]*const Feature { + &feature_cx8, + &feature_slowUnalignedMem16, + &feature_x87, + }, +}; + +pub const cpu_pentiumM = Cpu{ + .name = "pentiumM", + .llvm_name = "pentium-m", + .dependencies = &[_]*const Feature { + &feature_cmov, + &feature_cx8, + &feature_fxsr, + &feature_mmx, + &feature_nopl, + &feature_sse, + &feature_sse2, + &feature_slowUnalignedMem16, + &feature_x87, + }, +}; + +pub const cpu_pentiumMmx = Cpu{ + .name = "pentiumMmx", + .llvm_name = "pentium-mmx", + .dependencies = &[_]*const Feature { + &feature_cx8, + &feature_mmx, + &feature_slowUnalignedMem16, + &feature_x87, + }, +}; + +pub const cpu_pentium2 = Cpu{ + .name = "pentium2", + .llvm_name = "pentium2", + .dependencies = &[_]*const Feature { + &feature_cmov, + &feature_cx8, + &feature_fxsr, + &feature_mmx, + &feature_nopl, + &feature_slowUnalignedMem16, + &feature_x87, + }, +}; + +pub const cpu_pentium3 = Cpu{ + .name = "pentium3", + .llvm_name = "pentium3", + .dependencies = &[_]*const Feature { + &feature_cmov, + &feature_cx8, + &feature_fxsr, + &feature_mmx, + &feature_nopl, + &feature_sse, + &feature_slowUnalignedMem16, + &feature_x87, + }, +}; + +pub const cpu_pentium3m = Cpu{ + .name = "pentium3m", + .llvm_name = "pentium3m", + .dependencies = &[_]*const Feature { + &feature_cmov, + &feature_cx8, + &feature_fxsr, + &feature_mmx, + &feature_nopl, + &feature_sse, + &feature_slowUnalignedMem16, + &feature_x87, + }, +}; + +pub const cpu_pentium4 = Cpu{ + .name = "pentium4", + .llvm_name = "pentium4", + .dependencies = &[_]*const Feature { + &feature_cmov, + &feature_cx8, + &feature_fxsr, + &feature_mmx, + &feature_nopl, + &feature_sse, + &feature_sse2, + &feature_slowUnalignedMem16, + &feature_x87, + }, +}; + +pub const cpu_pentium4m = Cpu{ + .name = "pentium4m", + .llvm_name = "pentium4m", + .dependencies = &[_]*const Feature { + &feature_cmov, + &feature_cx8, + &feature_fxsr, + &feature_mmx, + &feature_nopl, + &feature_sse, + &feature_sse2, + &feature_slowUnalignedMem16, + &feature_x87, + }, +}; + +pub const cpu_pentiumpro = Cpu{ + .name = "pentiumpro", + .llvm_name = "pentiumpro", + .dependencies = &[_]*const Feature { + &feature_cmov, + &feature_cx8, + &feature_nopl, + &feature_slowUnalignedMem16, + &feature_x87, + }, +}; + +pub const cpu_prescott = Cpu{ + .name = "prescott", + .llvm_name = "prescott", + .dependencies = &[_]*const Feature { + &feature_cmov, + &feature_cx8, + &feature_fxsr, + &feature_mmx, + &feature_nopl, + &feature_sse, + &feature_sse3, + &feature_slowUnalignedMem16, + &feature_x87, + }, +}; + +pub const cpu_sandybridge = Cpu{ + .name = "sandybridge", + .llvm_name = "sandybridge", + .dependencies = &[_]*const Feature { + &feature_bit64, + &feature_sse, + &feature_avx, + &feature_cmov, + &feature_cx8, + &feature_cx16, + &feature_fxsr, + &feature_fastShldRotate, + &feature_fastScalarFsqrt, + &feature_sahf, + &feature_mmx, + &feature_macrofusion, + &feature_mergeToThreewayBranch, + &feature_nopl, + &feature_pclmul, + &feature_popcnt, + &feature_falseDepsPopcnt, + &feature_sse42, + &feature_slow3opsLea, + &feature_idivqToDivl, + &feature_slowUnalignedMem32, + &feature_x87, + &feature_xsave, + &feature_xsaveopt, + }, +}; + +pub const cpu_silvermont = Cpu{ + .name = "silvermont", + .llvm_name = "silvermont", + .dependencies = &[_]*const Feature { + &feature_bit64, + &feature_cmov, + &feature_cx8, + &feature_cx16, + &feature_fxsr, + &feature_sahf, + &feature_mmx, + &feature_movbe, + &feature_nopl, + &feature_sse, + &feature_pclmul, + &feature_popcnt, + &feature_falseDepsPopcnt, + &feature_prfchw, + &feature_rdrnd, + &feature_sse42, + &feature_ssse3, + &feature_idivqToDivl, + &feature_slowIncdec, + &feature_slowLea, + &feature_slowPmulld, + &feature_slowTwoMemOps, + &feature_x87, + }, +}; + +pub const cpu_skx = Cpu{ + .name = "skx", + .llvm_name = "skx", + .dependencies = &[_]*const Feature { + &feature_bit64, + &feature_adx, + &feature_sse, + &feature_aes, + &feature_avx, + &feature_avx2, + &feature_avx512f, + &feature_bmi, + &feature_bmi2, + &feature_avx512bw, + &feature_avx512cd, + &feature_clflushopt, + &feature_clwb, + &feature_cmov, + &feature_cx8, + &feature_cx16, + &feature_avx512dq, + &feature_ermsb, + &feature_f16c, + &feature_fma, + &feature_fsgsbase, + &feature_fxsr, + &feature_fastShldRotate, + &feature_fastScalarFsqrt, + &feature_fastVariableShuffle, + &feature_fastVectorFsqrt, + &feature_fastGather, + &feature_invpcid, + &feature_sahf, + &feature_lzcnt, + &feature_mmx, + &feature_movbe, + &feature_mpx, + &feature_macrofusion, + &feature_mergeToThreewayBranch, + &feature_nopl, + &feature_pclmul, + &feature_pku, + &feature_popcnt, + &feature_falseDepsPopcnt, + &feature_prfchw, + &feature_rdrnd, + &feature_rdseed, + &feature_sse42, + &feature_slow3opsLea, + &feature_idivqToDivl, + &feature_avx512vl, + &feature_x87, + &feature_xsave, + &feature_xsavec, + &feature_xsaveopt, + &feature_xsaves, + }, +}; + +pub const cpu_skylake = Cpu{ + .name = "skylake", + .llvm_name = "skylake", + .dependencies = &[_]*const Feature { + &feature_bit64, + &feature_adx, + &feature_sse, + &feature_aes, + &feature_avx, + &feature_avx2, + &feature_bmi, + &feature_bmi2, + &feature_clflushopt, + &feature_cmov, + &feature_cx8, + &feature_cx16, + &feature_ermsb, + &feature_f16c, + &feature_fma, + &feature_fsgsbase, + &feature_fxsr, + &feature_fastShldRotate, + &feature_fastScalarFsqrt, + &feature_fastVariableShuffle, + &feature_fastVectorFsqrt, + &feature_fastGather, + &feature_invpcid, + &feature_sahf, + &feature_lzcnt, + &feature_mmx, + &feature_movbe, + &feature_mpx, + &feature_macrofusion, + &feature_mergeToThreewayBranch, + &feature_nopl, + &feature_pclmul, + &feature_popcnt, + &feature_falseDepsPopcnt, + &feature_prfchw, + &feature_rdrnd, + &feature_rdseed, + &feature_sgx, + &feature_sse42, + &feature_slow3opsLea, + &feature_idivqToDivl, + &feature_x87, + &feature_xsave, + &feature_xsavec, + &feature_xsaveopt, + &feature_xsaves, + }, +}; + +pub const cpu_skylakeAvx512 = Cpu{ + .name = "skylakeAvx512", + .llvm_name = "skylake-avx512", + .dependencies = &[_]*const Feature { + &feature_bit64, + &feature_adx, + &feature_sse, + &feature_aes, + &feature_avx, + &feature_avx2, + &feature_avx512f, + &feature_bmi, + &feature_bmi2, + &feature_avx512bw, + &feature_avx512cd, + &feature_clflushopt, + &feature_clwb, + &feature_cmov, + &feature_cx8, + &feature_cx16, + &feature_avx512dq, + &feature_ermsb, + &feature_f16c, + &feature_fma, + &feature_fsgsbase, + &feature_fxsr, + &feature_fastShldRotate, + &feature_fastScalarFsqrt, + &feature_fastVariableShuffle, + &feature_fastVectorFsqrt, + &feature_fastGather, + &feature_invpcid, + &feature_sahf, + &feature_lzcnt, + &feature_mmx, + &feature_movbe, + &feature_mpx, + &feature_macrofusion, + &feature_mergeToThreewayBranch, + &feature_nopl, + &feature_pclmul, + &feature_pku, + &feature_popcnt, + &feature_falseDepsPopcnt, + &feature_prfchw, + &feature_rdrnd, + &feature_rdseed, + &feature_sse42, + &feature_slow3opsLea, + &feature_idivqToDivl, + &feature_avx512vl, + &feature_x87, + &feature_xsave, + &feature_xsavec, + &feature_xsaveopt, + &feature_xsaves, + }, +}; + +pub const cpu_slm = Cpu{ + .name = "slm", + .llvm_name = "slm", + .dependencies = &[_]*const Feature { + &feature_bit64, + &feature_cmov, + &feature_cx8, + &feature_cx16, + &feature_fxsr, + &feature_sahf, + &feature_mmx, + &feature_movbe, + &feature_nopl, + &feature_sse, + &feature_pclmul, + &feature_popcnt, + &feature_falseDepsPopcnt, + &feature_prfchw, + &feature_rdrnd, + &feature_sse42, + &feature_ssse3, + &feature_idivqToDivl, + &feature_slowIncdec, + &feature_slowLea, + &feature_slowPmulld, + &feature_slowTwoMemOps, + &feature_x87, + }, +}; + +pub const cpu_tremont = Cpu{ + .name = "tremont", + .llvm_name = "tremont", + .dependencies = &[_]*const Feature { + &feature_bit64, + &feature_sse, + &feature_aes, + &feature_cldemote, + &feature_clflushopt, + &feature_cmov, + &feature_cx8, + &feature_cx16, + &feature_fsgsbase, + &feature_fxsr, + &feature_gfni, + &feature_sahf, + &feature_mmx, + &feature_movbe, + &feature_movdir64b, + &feature_movdiri, + &feature_mpx, + &feature_nopl, + &feature_pclmul, + &feature_popcnt, + &feature_prfchw, + &feature_ptwrite, + &feature_rdpid, + &feature_rdrnd, + &feature_rdseed, + &feature_sgx, + &feature_sha, + &feature_sse42, + &feature_ssse3, + &feature_slowIncdec, + &feature_slowLea, + &feature_slowTwoMemOps, + &feature_waitpkg, + &feature_x87, + &feature_xsave, + &feature_xsavec, + &feature_xsaveopt, + &feature_xsaves, + }, +}; + +pub const cpu_westmere = Cpu{ + .name = "westmere", + .llvm_name = "westmere", + .dependencies = &[_]*const Feature { + &feature_bit64, + &feature_cmov, + &feature_cx8, + &feature_cx16, + &feature_fxsr, + &feature_sahf, + &feature_mmx, + &feature_macrofusion, + &feature_nopl, + &feature_sse, + &feature_pclmul, + &feature_popcnt, + &feature_sse42, + &feature_x87, + }, +}; + +pub const cpu_winchipC6 = Cpu{ + .name = "winchipC6", + .llvm_name = "winchip-c6", + .dependencies = &[_]*const Feature { + &feature_mmx, + &feature_slowUnalignedMem16, + &feature_x87, + }, +}; + +pub const cpu_winchip2 = Cpu{ + .name = "winchip2", + .llvm_name = "winchip2", + .dependencies = &[_]*const Feature { + &feature_mmx, + &feature_dnow3, + &feature_slowUnalignedMem16, + &feature_x87, + }, +}; + +pub const cpu_x8664 = Cpu{ + .name = "x8664", + .llvm_name = "x86-64", + .dependencies = &[_]*const Feature { + &feature_bit64, + &feature_cmov, + &feature_cx8, + &feature_fxsr, + &feature_mmx, + &feature_macrofusion, + &feature_nopl, + &feature_sse, + &feature_sse2, + &feature_slow3opsLea, + &feature_slowIncdec, + &feature_x87, + }, +}; + +pub const cpu_yonah = Cpu{ + .name = "yonah", + .llvm_name = "yonah", + .dependencies = &[_]*const Feature { + &feature_cmov, + &feature_cx8, + &feature_fxsr, + &feature_mmx, + &feature_nopl, + &feature_sse, + &feature_sse3, + &feature_slowUnalignedMem16, + &feature_x87, + }, +}; + +pub const cpu_znver1 = Cpu{ + .name = "znver1", + .llvm_name = "znver1", + .dependencies = &[_]*const Feature { + &feature_bit64, + &feature_adx, + &feature_sse, + &feature_aes, + &feature_avx2, + &feature_bmi, + &feature_bmi2, + &feature_branchfusion, + &feature_clflushopt, + &feature_clzero, + &feature_cmov, + &feature_cx8, + &feature_cx16, + &feature_f16c, + &feature_fma, + &feature_fsgsbase, + &feature_fxsr, + &feature_fast15bytenop, + &feature_fastBextr, + &feature_fastLzcnt, + &feature_fastScalarShiftMasks, + &feature_sahf, + &feature_lzcnt, + &feature_mmx, + &feature_movbe, + &feature_mwaitx, + &feature_nopl, + &feature_pclmul, + &feature_popcnt, + &feature_prfchw, + &feature_rdrnd, + &feature_rdseed, + &feature_sha, + &feature_sse4a, + &feature_slowShld, + &feature_x87, + &feature_xsave, + &feature_xsavec, + &feature_xsaveopt, + &feature_xsaves, + }, +}; + +pub const cpu_znver2 = Cpu{ + .name = "znver2", + .llvm_name = "znver2", + .dependencies = &[_]*const Feature { + &feature_bit64, + &feature_adx, + &feature_sse, + &feature_aes, + &feature_avx2, + &feature_bmi, + &feature_bmi2, + &feature_branchfusion, + &feature_clflushopt, + &feature_clwb, + &feature_clzero, + &feature_cmov, + &feature_cx8, + &feature_cx16, + &feature_f16c, + &feature_fma, + &feature_fsgsbase, + &feature_fxsr, + &feature_fast15bytenop, + &feature_fastBextr, + &feature_fastLzcnt, + &feature_fastScalarShiftMasks, + &feature_sahf, + &feature_lzcnt, + &feature_mmx, + &feature_movbe, + &feature_mwaitx, + &feature_nopl, + &feature_pclmul, + &feature_popcnt, + &feature_prfchw, + &feature_rdpid, + &feature_rdrnd, + &feature_rdseed, + &feature_sha, + &feature_sse4a, + &feature_slowShld, + &feature_wbnoinvd, + &feature_x87, + &feature_xsave, + &feature_xsavec, + &feature_xsaveopt, + &feature_xsaves, + }, +}; + +pub const cpus = &[_]*const Cpu { + &cpu_amdfam10, + &cpu_athlon, + &cpu_athlon4, + &cpu_athlonFx, + &cpu_athlonMp, + &cpu_athlonTbird, + &cpu_athlonXp, + &cpu_athlon64, + &cpu_athlon64Sse3, + &cpu_atom, + &cpu_barcelona, + &cpu_bdver1, + &cpu_bdver2, + &cpu_bdver3, + &cpu_bdver4, + &cpu_bonnell, + &cpu_broadwell, + &cpu_btver1, + &cpu_btver2, + &cpu_c3, + &cpu_c32, + &cpu_cannonlake, + &cpu_cascadelake, + &cpu_cooperlake, + &cpu_coreAvxI, + &cpu_coreAvx2, + &cpu_core2, + &cpu_corei7, + &cpu_corei7Avx, + &cpu_generic, + &cpu_geode, + &cpu_goldmont, + &cpu_goldmontPlus, + &cpu_haswell, + &cpu_i386, + &cpu_i486, + &cpu_i586, + &cpu_i686, + &cpu_icelakeClient, + &cpu_icelakeServer, + &cpu_ivybridge, + &cpu_k6, + &cpu_k62, + &cpu_k63, + &cpu_k8, + &cpu_k8Sse3, + &cpu_knl, + &cpu_knm, + &cpu_lakemont, + &cpu_nehalem, + &cpu_nocona, + &cpu_opteron, + &cpu_opteronSse3, + &cpu_penryn, + &cpu_pentium, + &cpu_pentiumM, + &cpu_pentiumMmx, + &cpu_pentium2, + &cpu_pentium3, + &cpu_pentium3m, + &cpu_pentium4, + &cpu_pentium4m, + &cpu_pentiumpro, + &cpu_prescott, + &cpu_sandybridge, + &cpu_silvermont, + &cpu_skx, + &cpu_skylake, + &cpu_skylakeAvx512, + &cpu_slm, + &cpu_tremont, + &cpu_westmere, + &cpu_winchipC6, + &cpu_winchip2, + &cpu_x8664, + &cpu_yonah, + &cpu_znver1, + &cpu_znver2, +}; diff --git a/src-self-hosted/stage1.zig b/src-self-hosted/stage1.zig index ec683e4ba882..9b6ae2548b0f 100644 --- a/src-self-hosted/stage1.zig +++ b/src-self-hosted/stage1.zig @@ -9,6 +9,7 @@ const process = std.process; const Allocator = mem.Allocator; const ArrayList = std.ArrayList; const Buffer = std.Buffer; +const Target = std.Target; const self_hosted_main = @import("main.zig"); const errmsg = @import("errmsg.zig"); const DepTokenizer = @import("dep_tokenizer.zig").Tokenizer; @@ -527,3 +528,388 @@ export fn stage2_progress_update_node(node: *std.Progress.Node, done_count: usiz node.activate(); node.context.maybeRefresh(); } + +// ABI warning +export fn stage2_list_features_for_arch(arch_name_ptr: [*]const u8, arch_name_len: usize, show_dependencies: bool) void { + printFeaturesForArch(arch_name_ptr[0..arch_name_len], show_dependencies) catch |err| { + std.debug.warn("Failed to list features: {}\n", .{ @errorName(err) }); + }; +} + +fn printFeaturesForArch(arch_name: []const u8, show_dependencies: bool) !void { + const stdout_stream = &std.io.getStdOut().outStream().stream; + + const arch = Target.parseArchTag(arch_name) catch { + std.debug.warn("Failed to parse arch '{}'\nInvoke 'zig targets' for a list of valid architectures\n", .{ arch_name }); + return; + }; + + try stdout_stream.print("Available features for {}:\n", .{ @tagName(arch) }); + + const features = std.target.getFeaturesForArch(arch); + + var longest_len: usize = 0; + for (features) |feature| { + if (feature.name.len > longest_len) { + longest_len = feature.name.len; + } + } + + for (features) |feature| { + try stdout_stream.print(" {}", .{ feature.name }); + + var i: usize = 0; + while (i < longest_len - feature.name.len) : (i += 1) { + try stdout_stream.write(" "); + } + + try stdout_stream.print(" - {}\n", .{ feature.description }); + + if (show_dependencies and feature.dependencies.len > 0) { + for (feature.dependencies) |dependency| { + try stdout_stream.print(" {}\n", .{ dependency.name }); + } + } + } +} + +// ABI warning +export fn stage2_list_cpus_for_arch(arch_name_ptr: [*]const u8, arch_name_len: usize, show_dependencies: bool) void { + printCpusForArch(arch_name_ptr[0..arch_name_len], show_dependencies) catch |err| { + std.debug.warn("Failed to list features: {}\n", .{ @errorName(err) }); + }; +} + +fn printCpusForArch(arch_name: []const u8, show_dependencies: bool) !void { + const stdout_stream = &std.io.getStdOut().outStream().stream; + + const arch = Target.parseArchTag(arch_name) catch { + std.debug.warn("Failed to parse arch '{}'\nInvoke 'zig targets' for a list of valid architectures\n", .{ arch_name }); + return; + }; + + const cpus = std.target.getCpusForArch(arch); + + try stdout_stream.print("Available cpus for {}:\n", .{ @tagName(arch) }); + + var longest_len: usize = 0; + for (cpus) |cpu| { + if (cpu.name.len > longest_len) { + longest_len = cpu.name.len; + } + } + + for (cpus) |cpu| { + try stdout_stream.print(" {}", .{ cpu.name }); + + var i: usize = 0; + while (i < longest_len - cpu.name.len) : (i += 1) { + try stdout_stream.write(" "); + } + + try stdout_stream.write("\n"); + + if (show_dependencies and cpu.dependencies.len > 0) { + for (cpu.dependencies) |dependency| { + try stdout_stream.print(" {}\n", .{ dependency.name }); + } + } + } +} + +const null_terminated_empty_string = (&[_]u8 { 0 })[0..0 :0]; + +fn toNullTerminatedStringAlloc(allocator: *std.mem.Allocator, str: []const u8) ![:0]const u8 { + var buffer = try std.Buffer.init(allocator, str); + + const len = buffer.len(); + + // Don't deinit since we steal all the buffer's memory here. + return buffer.list.toOwnedSlice()[0..len :0]; +} + +const Stage2TargetDetails = struct { + allocator: *std.mem.Allocator, + target_details: std.target.TargetDetails, + + llvm_cpu_str: [:0]const u8, + llvm_features_str: [:0]const u8, + + builtin_str: [:0]const u8, + + const Self = @This(); + + fn initCpu(allocator: *std.mem.Allocator, arch: @TagType(std.Target.Arch), cpu: *const std.target.Cpu) !Self { + var builtin_str_buffer = try std.Buffer.init( + allocator, + "@import(\"std\").target.TargetDetails{.cpu=&@import(\"std\").target."); + + try builtin_str_buffer.append(@tagName(arch)); + try builtin_str_buffer.append(".cpu_"); + try builtin_str_buffer.append(cpu.name); + try builtin_str_buffer.append("};"); + + const cpu_string = cpu.llvm_name orelse ""; + + return Self{ + .allocator = allocator, + .target_details = .{ + .cpu = cpu, + }, + .llvm_cpu_str = try toNullTerminatedStringAlloc(allocator, cpu_string), + .llvm_features_str = null_terminated_empty_string, + .builtin_str = builtin_str_buffer.toSliceConst(), + }; + } + + fn initFeatures(allocator: *std.mem.Allocator, arch: @TagType(std.Target.Arch), features: []*const std.target.Feature) !Self { + var builtin_str_buffer = try std.Buffer.init( + allocator, + "@import(\"std\").target.TargetDetails{.features=&[_]*const @import(\"std\").target.Feature{\n"); + + var llvm_features_buffer = try std.Buffer.initSize(allocator, 0); + + // First, disable all features. + // This way, we only get the ones the user requests. + for (std.target.getFeaturesForArch(arch)) |feature| { + if (feature.llvm_name) |llvm_name| { + try llvm_features_buffer.append("-"); + try llvm_features_buffer.append(llvm_name); + try llvm_features_buffer.append(","); + } + } + + for (features) |feature| { + if (feature.llvm_name) |llvm_name| { + try llvm_features_buffer.append("+"); + try llvm_features_buffer.append(llvm_name); + try llvm_features_buffer.append(","); + + try builtin_str_buffer.append("&@import(\"std\").target."); + try builtin_str_buffer.append(@tagName(arch)); + try builtin_str_buffer.append(".feature_"); + try builtin_str_buffer.append(feature.name); + try builtin_str_buffer.append(","); + } + } + + try builtin_str_buffer.append("}};"); + + return Self{ + .allocator = allocator, + .target_details = std.target.TargetDetails{ + .features = features, + }, + .llvm_cpu_str = null_terminated_empty_string, + .llvm_features_str = llvm_features_buffer.toSliceConst(), + .builtin_str = builtin_str_buffer.toSliceConst(), + }; + } +}; + +// ABI warning +export fn stage2_target_details_parse_cpu(arch_str: ?[*:0]const u8, cpu_str: ?[*:0]const u8) ?*Stage2TargetDetails { + if (cpu_str == null) return null; + if (arch_str == null) return null; + + const arch = Target.parseArchTag(std.mem.toSliceConst(u8, arch_str.?)) catch { + return null; + }; + return parseCpu(arch, std.mem.toSliceConst(u8, cpu_str.?)) catch |err| { + switch (err) { + error.OutOfMemory => @panic("out of memory"), + else => return null, + } + }; +} + +// ABI warning +export fn stage2_target_details_parse_features(arch_str: ?[*:0]const u8, features_str: ?[*:0]const u8) ?*Stage2TargetDetails { + if (features_str == null) return null; + if (arch_str == null) return null; + + const arch = Target.parseArchTag(std.mem.toSliceConst(u8, arch_str.?)) catch return null; + return parseFeatures(arch, std.mem.toSliceConst(u8, features_str.?)) catch |err| { + switch (err) { + error.OutOfMemory => @panic("out of memory"), + else => return null, + } + }; +} + +fn parseCpu(arch: @TagType(std.Target.Arch), str: []const u8) !*Stage2TargetDetails { + const allocator = std.heap.c_allocator; + + const cpus = std.target.getCpusForArch(arch); + + for (cpus) |cpu| { + if (std.mem.eql(u8, str, cpu.name)) { + const ptr = try allocator.create(Stage2TargetDetails); + ptr.* = try Stage2TargetDetails.initCpu(std.heap.c_allocator, arch, cpu); + + return ptr; + } + } + + return error.InvalidCpu; +} + +fn parseFeatures(arch: @TagType(std.Target.Arch), str: []const u8) !*Stage2TargetDetails { + const allocator = std.heap.c_allocator; + + const known_features = std.target.getFeaturesForArch(arch); + + var features = std.ArrayList(*const std.target.Feature).init(allocator); + defer features.deinit(); + + var start: usize = 0; + while (start < str.len) { + const next_comma_pos = std.mem.indexOfScalar(u8, str[start..], ',') orelse str.len - start; + const feature_str = std.mem.trim(u8, str[start..start+next_comma_pos], " "); + + start += next_comma_pos + 1; + + if (feature_str.len == 0) continue; + + var feature: ?*const std.target.Feature = null; + for (known_features) |known_feature| { + if (std.mem.eql(u8, feature_str, known_feature.name)) { + feature = known_feature; + break; + } + } + + if (feature) |f| { + features.append(f) catch @panic("out of memory"); + + } else { + return error.InvalidFeature; + } + } + + const features_slice = features.toOwnedSlice(); + + const ptr = try allocator.create(Stage2TargetDetails); + ptr.* = try Stage2TargetDetails.initFeatures(allocator, arch, features_slice); + + return ptr; +} + +// ABI warning +export fn stage2_target_details_get_cache_str(target_details: ?*const Stage2TargetDetails) [*:0]const u8 { + if (target_details) |td| { + return @as([*:0]const u8, switch (td.target_details) { + .cpu => td.llvm_cpu_str, + .features => td.llvm_features_str, + }); + } + + return @as([*:0]const u8, null_terminated_empty_string); +} + +// ABI warning +export fn stage2_target_details_get_llvm_cpu(target_details: ?*const Stage2TargetDetails) [*:0]const u8 { + if (target_details) |td| { + return @as([*:0]const u8, td.llvm_cpu_str); + } + + return @as([*:0]const u8, null_terminated_empty_string); +} + +// ABI warning +export fn stage2_target_details_get_llvm_features(target_details: ?*const Stage2TargetDetails) [*:0]const u8 { + if (target_details) |td| { + return @as([*:0]const u8, td.llvm_features_str); + } + + return @as([*:0]const u8, null_terminated_empty_string); +} + +// ABI warning +export fn stage2_target_details_get_builtin_str(target_details: ?*const Stage2TargetDetails) [*:0]const u8 { + if (target_details) |td| { + return @as([*:0]const u8, td.builtin_str); + } + + return @as([*:0]const u8, null_terminated_empty_string); +} + +const riscv32_default_features: []*const std.target.Feature = &[_]*const std.target.Feature { + &std.target.riscv.feature_a, + &std.target.riscv.feature_c, + &std.target.riscv.feature_d, + &std.target.riscv.feature_f, + &std.target.riscv.feature_m, + &std.target.riscv.feature_relax, +}; + +const riscv64_default_features: []*const std.target.Feature = &[_]*const std.target.Feature { + &std.target.riscv.feature_bit64, + &std.target.riscv.feature_a, + &std.target.riscv.feature_c, + &std.target.riscv.feature_d, + &std.target.riscv.feature_f, + &std.target.riscv.feature_m, + &std.target.riscv.feature_relax, +}; + +const i386_default_features: []*const std.target.Feature = &[_]*const std.target.Feature { + &std.target.x86.feature_cmov, + &std.target.x86.feature_cx8, + &std.target.x86.feature_fxsr, + &std.target.x86.feature_mmx, + &std.target.x86.feature_nopl, + &std.target.x86.feature_sse, + &std.target.x86.feature_sse2, + &std.target.x86.feature_slowUnalignedMem16, + &std.target.x86.feature_x87, +}; + +// Same as above but without sse. +const i386_default_features_freestanding: []*const std.target.Feature = &[_]*const std.target.Feature { + &std.target.x86.feature_cmov, + &std.target.x86.feature_cx8, + &std.target.x86.feature_fxsr, + &std.target.x86.feature_mmx, + &std.target.x86.feature_nopl, + &std.target.x86.feature_slowUnalignedMem16, + &std.target.x86.feature_x87, +}; + +// ABI warning +export fn stage2_target_details_get_default(arch_str: ?[*:0]const u8, os_str: ?[*:0]const u8) ?*Stage2TargetDetails { + if (arch_str == null) return null; + if (os_str == null) return null; + + const arch = Target.parseArchTag(std.mem.toSliceConst(u8, arch_str.?)) catch return null; + const os = Target.parseOs(std.mem.toSliceConst(u8, os_str.?)) catch return null; + + return createDefaultTargetDetails(arch, os) catch return null; +} + +fn createDefaultTargetDetails(arch: @TagType(std.Target.Arch), os: std.Target.Os) !?*Stage2TargetDetails { + const allocator = std.heap.c_allocator; + + return switch (arch) { + .riscv32 => blk: { + const ptr = try allocator.create(Stage2TargetDetails); + ptr.* = try Stage2TargetDetails.initFeatures(allocator, arch, riscv32_default_features); + break :blk ptr; + }, + .riscv64 => blk: { + const ptr = try allocator.create(Stage2TargetDetails); + ptr.* = try Stage2TargetDetails.initFeatures(allocator, arch, riscv64_default_features); + break :blk ptr; + }, + .i386 => blk: { + const ptr = try allocator.create(Stage2TargetDetails); + const features = switch (os) { + .freestanding => i386_default_features_freestanding, + else => i386_default_features, + }; + ptr.* = try Stage2TargetDetails.initFeatures(allocator, arch, features); + break :blk ptr; + }, + else => null, + }; +} diff --git a/src/all_types.hpp b/src/all_types.hpp index 4d6f68daff87..53929392330e 100644 --- a/src/all_types.hpp +++ b/src/all_types.hpp @@ -2214,6 +2214,8 @@ struct CodeGen { const char **clang_argv; size_t clang_argv_len; + + Stage2TargetDetails *target_details; }; struct ZigVar { diff --git a/src/codegen.cpp b/src/codegen.cpp index cd009b3beaf9..885153141bd0 100644 --- a/src/codegen.cpp +++ b/src/codegen.cpp @@ -30,11 +30,6 @@ enum ResumeId { ResumeIdCall, }; -// TODO https://github.com/ziglang/zig/issues/2883 -// Until then we have this same default as Clang. -// This avoids https://github.com/ziglang/zig/issues/3275 -static const char *riscv_default_features = "+a,+c,+d,+f,+m,+relax"; - static void init_darwin_native(CodeGen *g) { char *osx_target = getenv("MACOSX_DEPLOYMENT_TARGET"); char *ios_target = getenv("IPHONEOS_DEPLOYMENT_TARGET"); @@ -8602,6 +8597,14 @@ Buf *codegen_generate_builtin_source(CodeGen *g) { "pub var test_functions: []TestFn = undefined; // overwritten later\n" ); } + + buf_appendf(contents, "pub const target_details: ?@import(\"std\").target.TargetDetails = "); + if (g->target_details) { + buf_appendf(contents, "%s", stage2_target_details_get_builtin_str(g->target_details)); + } else { + buf_appendf(contents, "null;"); + } + buf_appendf(contents, "\n"); return contents; } @@ -8651,6 +8654,10 @@ static Error define_builtin_compile_vars(CodeGen *g) { cache_bool(&cache_hash, g->link_eh_frame_hdr); cache_int(&cache_hash, detect_subsystem(g)); + if (g->target_details) { + cache_str(&cache_hash, stage2_target_details_get_cache_str(g->target_details)); + } + Buf digest = BUF_INIT; buf_resize(&digest, 0); if ((err = cache_hit(&cache_hash, &digest))) { @@ -8764,8 +8771,9 @@ static void init(CodeGen *g) { reloc_mode = LLVMRelocStatic; } - const char *target_specific_cpu_args; - const char *target_specific_features; + const char *target_specific_cpu_args = ""; + const char *target_specific_features = ""; + if (g->zig_target->is_native) { // LLVM creates invalid binaries on Windows sometimes. // See https://github.com/ziglang/zig/issues/508 @@ -8777,24 +8785,14 @@ static void init(CodeGen *g) { target_specific_cpu_args = ZigLLVMGetHostCPUName(); target_specific_features = ZigLLVMGetNativeFeatures(); } - } else if (target_is_riscv(g->zig_target)) { - // TODO https://github.com/ziglang/zig/issues/2883 - // Be aware of https://github.com/ziglang/zig/issues/3275 - target_specific_cpu_args = ""; - target_specific_features = riscv_default_features; - } else if (g->zig_target->arch == ZigLLVM_x86) { - // This is because we're really targeting i686 rather than i386. - // It's pretty much impossible to use many of the language features - // such as fp16 if you stick use the x87 only. This is also what clang - // uses as base cpu. - // TODO https://github.com/ziglang/zig/issues/2883 - target_specific_cpu_args = "pentium4"; - target_specific_features = (g->zig_target->os == OsFreestanding) ? "-sse": ""; - } else { - target_specific_cpu_args = ""; - target_specific_features = ""; } + // Override CPU and features if defined by user. + if (g->target_details) { + target_specific_cpu_args = stage2_target_details_get_llvm_cpu(g->target_details); + target_specific_features = stage2_target_details_get_llvm_features(g->target_details); + } + g->target_machine = ZigLLVMCreateTargetMachine(target_ref, buf_ptr(&g->llvm_triple_str), target_specific_cpu_args, target_specific_features, opt_level, reloc_mode, LLVMCodeModelDefault, g->function_sections); @@ -9120,21 +9118,18 @@ void add_cc_args(CodeGen *g, ZigList &args, const char *out_dep_pa args.append("-target"); args.append(buf_ptr(&g->llvm_triple_str)); - if (target_is_musl(g->zig_target) && target_is_riscv(g->zig_target)) { - // Musl depends on atomic instructions, which are disabled by default in Clang/LLVM's - // cross compilation CPU info for RISCV. - // TODO: https://github.com/ziglang/zig/issues/2883 + if (g->target_details) { args.append("-Xclang"); - args.append("-target-feature"); + args.append("-target-cpu"); args.append("-Xclang"); - args.append(riscv_default_features); - } else if (g->zig_target->os == OsFreestanding && g->zig_target->arch == ZigLLVM_x86) { + args.append(stage2_target_details_get_llvm_cpu(g->target_details)); args.append("-Xclang"); args.append("-target-feature"); args.append("-Xclang"); - args.append("-sse"); + args.append(stage2_target_details_get_llvm_features(g->target_details)); } } + if (g->zig_target->os == OsFreestanding) { args.append("-ffreestanding"); } @@ -10375,6 +10370,10 @@ static Error check_cache(CodeGen *g, Buf *manifest_dir, Buf *digest) { cache_buf_opt(ch, g->dynamic_linker_path); cache_buf_opt(ch, g->version_script_path); + if (g->target_details) { + cache_str(ch, stage2_target_details_get_cache_str(g->target_details)); + } + // gen_c_objects appends objects to g->link_objects which we want to include in the hash gen_c_objects(g); cache_list_of_file(ch, g->link_objects.items, g->link_objects.length); @@ -10657,6 +10656,7 @@ CodeGen *create_child_codegen(CodeGen *parent_gen, Buf *root_src_path, OutType o CodeGen *child_gen = codegen_create(nullptr, root_src_path, parent_gen->zig_target, out_type, parent_gen->build_mode, parent_gen->zig_lib_dir, libc, get_global_cache_dir(), false, child_progress_node); + child_gen->target_details = parent_gen->target_details; child_gen->root_out_name = buf_create_from_str(name); child_gen->disable_gen_h = true; child_gen->want_stack_check = WantStackCheckDisabled; diff --git a/src/main.cpp b/src/main.cpp index d89ac352a5e8..441bc2afb0e2 100644 --- a/src/main.cpp +++ b/src/main.cpp @@ -100,6 +100,8 @@ static int print_full_usage(const char *arg0, FILE *file, int return_code) { " --override-lib-dir [arg] override path to Zig lib directory\n" " -ffunction-sections places each function in a separate section\n" " -D[macro]=[value] define C [macro] to [value] (1 if [value] omitted)\n" + " --cpu [cpu] compile for [cpu] on the current target\n" + " --features [feature_str] compile with features in [feature_str] on the current target\n" "\n" "Link Options:\n" " --bundle-compiler-rt for static libraries, include compiler-rt symbols\n" @@ -129,6 +131,11 @@ static int print_full_usage(const char *arg0, FILE *file, int return_code) { " --test-name-prefix [text] add prefix to all tests\n" " --test-cmd [arg] specify test execution command one arg at a time\n" " --test-cmd-bin appends test binary path to test cmd args\n" + "\n" + "Targets Options:\n" + " --list-features [arch] list available features for the given architecture\n" + " --list-cpus [arch] list available cpus for the given architecture\n" + " --show-dependencies list feature dependencies for each entry from --list-{features,cpus}\n" , arg0); return return_code; } @@ -528,6 +535,12 @@ int main(int argc, char **argv) { WantStackCheck want_stack_check = WantStackCheckAuto; WantCSanitize want_sanitize_c = WantCSanitizeAuto; bool function_sections = false; + const char *cpu = nullptr; + const char *features = nullptr; + + const char *targets_list_features_arch = nullptr; + const char *targets_list_cpus_arch = nullptr; + bool targets_show_dependencies = false; ZigList llvm_argv = {0}; llvm_argv.append("zig (LLVM option parsing)"); @@ -779,6 +792,8 @@ int main(int argc, char **argv) { cur_pkg = cur_pkg->parent; } else if (strcmp(arg, "-ffunction-sections") == 0) { function_sections = true; + } else if (strcmp(arg, "--show-dependencies") == 0) { + targets_show_dependencies = true; } else if (i + 1 >= argc) { fprintf(stderr, "Expected another argument after %s\n", arg); return print_error_usage(arg0); @@ -936,7 +951,15 @@ int main(int argc, char **argv) { , argv[i]); return EXIT_FAILURE; } - } else { + } else if (strcmp(arg, "--list-features") == 0) { + targets_list_features_arch = argv[i]; + } else if (strcmp(arg, "--list-cpus") == 0) { + targets_list_cpus_arch = argv[i]; + } else if (strcmp(arg, "--cpu") == 0) { + cpu = argv[i]; + } else if (strcmp(arg, "--features") == 0) { + features = argv[i]; + }else { fprintf(stderr, "Invalid argument: %s\n", arg); return print_error_usage(arg0); } @@ -1051,6 +1074,30 @@ int main(int argc, char **argv) { } } + Stage2TargetDetails *target_details = nullptr; + if (cpu && features) { + fprintf(stderr, "--cpu and --features options not allowed together\n"); + return main_exit(root_progress_node, EXIT_FAILURE); + } else if (cpu) { + target_details = stage2_target_details_parse_cpu(target_arch_name(target.arch), cpu); + if (!target_details) { + fprintf(stderr, "invalid --cpu value\n"); + return main_exit(root_progress_node, EXIT_FAILURE); + } + } else if (features) { + target_details = stage2_target_details_parse_features(target_arch_name(target.arch), features); + if (!target_details) { + fprintf(stderr, "invalid --features value\n"); + return main_exit(root_progress_node, EXIT_FAILURE); + } + } else { + // If no details are specified and we are not native, load + // cross-compilation default features. + if (!target.is_native) { + target_details = stage2_target_details_get_default(target_arch_name(target.arch), target_os_name(target.os)); + } + } + if (output_dir != nullptr && enable_cache == CacheOptOn) { fprintf(stderr, "`--output-dir` is incompatible with --cache on.\n"); return print_error_usage(arg0); @@ -1101,6 +1148,7 @@ int main(int argc, char **argv) { g->want_stack_check = want_stack_check; g->want_sanitize_c = want_sanitize_c; g->want_single_threaded = want_single_threaded; + g->target_details = target_details; Buf *builtin_source = codegen_generate_builtin_source(g); if (fwrite(buf_ptr(builtin_source), 1, buf_len(builtin_source), stdout) != buf_len(builtin_source)) { fprintf(stderr, "unable to write to stdout: %s\n", strerror(ferror(stdout))); @@ -1233,6 +1281,7 @@ int main(int argc, char **argv) { g->system_linker_hack = system_linker_hack; g->function_sections = function_sections; + for (size_t i = 0; i < lib_dirs.length; i += 1) { codegen_add_lib_dir(g, lib_dirs.at(i)); } @@ -1254,6 +1303,8 @@ int main(int argc, char **argv) { codegen_add_rpath(g, rpath_list.at(i)); } + g->target_details = target_details; + codegen_set_rdynamic(g, rdynamic); if (mmacosx_version_min && mios_version_min) { fprintf(stderr, "-mmacosx-version-min and -mios-version-min options not allowed together\n"); @@ -1413,7 +1464,21 @@ int main(int argc, char **argv) { return main_exit(root_progress_node, EXIT_SUCCESS); } case CmdTargets: - return print_target_list(stdout); + if (targets_list_features_arch != nullptr) { + stage2_list_features_for_arch( + targets_list_features_arch, + strlen(targets_list_features_arch), + targets_show_dependencies); + return 0; + } else if (targets_list_cpus_arch != nullptr) { + stage2_list_cpus_for_arch( + targets_list_cpus_arch, + strlen(targets_list_cpus_arch), + targets_show_dependencies); + return 0; + } else { + return print_target_list(stdout); + } case CmdNone: return print_full_usage(arg0, stderr, EXIT_FAILURE); } diff --git a/src/userland.cpp b/src/userland.cpp index 263ef0cbc38c..0e173d7e7642 100644 --- a/src/userland.cpp +++ b/src/userland.cpp @@ -88,3 +88,27 @@ void stage2_progress_end(Stage2ProgressNode *node) {} void stage2_progress_complete_one(Stage2ProgressNode *node) {} void stage2_progress_disable_tty(Stage2Progress *progress) {} void stage2_progress_update_node(Stage2ProgressNode *node, size_t completed_count, size_t estimated_total_items){} + +void stage2_list_features_for_arch(const char *arch_name_ptr, size_t arch_name_len, bool show_subfeatures) {} +void stage2_list_cpus_for_arch(const char *arch_name_ptr, size_t arch_name_len, bool show_subfeatures) {} +Stage2TargetDetails *stage2_target_details_parse_cpu(const char *arch, const char *str) { + return nullptr; +} +Stage2TargetDetails *stage2_target_details_parse_features(const char *arch, const char *str) { + return nullptr; +} +const char *stage2_target_details_get_cache_str(const Stage2TargetDetails *target_details) { + return ""; +} +const char *stage2_target_details_get_llvm_cpu(const Stage2TargetDetails *target_details) { + return ""; +} +const char *stage2_target_details_get_llvm_features(const Stage2TargetDetails *target_details) { + return ""; +} +const char *stage2_target_details_get_builtin_str(const Stage2TargetDetails *target_details) { + return ""; +} +Stage2TargetDetails *stage2_target_details_get_default(const char *arch, const char *os) { + return nullptr; +} diff --git a/src/userland.h b/src/userland.h index fe3f072ae569..f954efd3fe0d 100644 --- a/src/userland.h +++ b/src/userland.h @@ -174,4 +174,34 @@ ZIG_EXTERN_C void stage2_progress_complete_one(Stage2ProgressNode *node); ZIG_EXTERN_C void stage2_progress_update_node(Stage2ProgressNode *node, size_t completed_count, size_t estimated_total_items); +// ABI warning +ZIG_EXTERN_C void stage2_list_features_for_arch(const char *arch_name_ptr, size_t arch_name_len, bool show_subfeatures); + +// ABI warning +ZIG_EXTERN_C void stage2_list_cpus_for_arch(const char *arch_name_ptr, size_t arch_name_len, bool show_subfeatures); + +// ABI warning +struct Stage2TargetDetails; + +// ABI warning +ZIG_EXTERN_C Stage2TargetDetails *stage2_target_details_parse_cpu(const char *arch, const char *str); + +// ABI warning +ZIG_EXTERN_C Stage2TargetDetails *stage2_target_details_parse_features(const char *arch, const char *str); + +// ABI warning +ZIG_EXTERN_C const char *stage2_target_details_get_cache_str(const Stage2TargetDetails *target_details); + +// ABI warning +ZIG_EXTERN_C const char *stage2_target_details_get_llvm_cpu(const Stage2TargetDetails *target_details); + +// ABI warning +ZIG_EXTERN_C const char *stage2_target_details_get_llvm_features(const Stage2TargetDetails *target_details); + +// ABI warning +ZIG_EXTERN_C const char *stage2_target_details_get_builtin_str(const Stage2TargetDetails *target_details); + +// ABI warning +ZIG_EXTERN_C Stage2TargetDetails *stage2_target_details_get_default(const char *arch, const char *os); + #endif