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MIPS: ralink: mt7621: do memory detection on KSEG1
It's reported that current memory detection code occasionally detects larger memory under some bootloaders. Current memory detection code tests whether address space wraps around on KSEG0, which is unreliable because it's cached. Rewrite memory size detection to perform the same test on KSEG1 instead. While at it, this patch also does the following two things: 1. use a fixed pattern instead of a random function pointer as the magic value. 2. add an additional memory write and a second comparison as part of the test to prevent possible smaller memory detection result due to leftover values in memory. Fixes: 139c949 MIPS: ("ralink: mt7621: add memory detection support") Reported-by: Rui Salvaterra <[email protected]> Signed-off-by: Chuanhong Guo <[email protected]> Tested-by: Sergio Paracuellos <[email protected]> Tested-by: Rui Salvaterra <[email protected]> Signed-off-by: Thomas Bogendoerfer <[email protected]>
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arch/mips/ralink/mt7621.c

+23-13
Original file line numberDiff line numberDiff line change
@@ -22,7 +22,9 @@
2222

2323
#include "common.h"
2424

25-
static void *detect_magic __initdata = detect_memory_region;
25+
#define MT7621_MEM_TEST_PATTERN 0xaa5555aa
26+
27+
static u32 detect_magic __initdata;
2628

2729
int pcibios_root_bridge_prepare(struct pci_host_bridge *bridge)
2830
{
@@ -58,24 +60,32 @@ phys_addr_t mips_cpc_default_phys_base(void)
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panic("Cannot detect cpc address");
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}
6062

63+
static bool __init mt7621_addr_wraparound_test(phys_addr_t size)
64+
{
65+
void *dm = (void *)KSEG1ADDR(&detect_magic);
66+
67+
if (CPHYSADDR(dm + size) >= MT7621_LOWMEM_MAX_SIZE)
68+
return true;
69+
__raw_writel(MT7621_MEM_TEST_PATTERN, dm);
70+
if (__raw_readl(dm) != __raw_readl(dm + size))
71+
return false;
72+
__raw_writel(!MT7621_MEM_TEST_PATTERN, dm);
73+
return __raw_readl(dm) == __raw_readl(dm + size);
74+
}
75+
6176
static void __init mt7621_memory_detect(void)
6277
{
63-
void *dm = &detect_magic;
6478
phys_addr_t size;
6579

66-
for (size = 32 * SZ_1M; size < 256 * SZ_1M; size <<= 1) {
67-
if (!__builtin_memcmp(dm, dm + size, sizeof(detect_magic)))
68-
break;
80+
for (size = 32 * SZ_1M; size <= 256 * SZ_1M; size <<= 1) {
81+
if (mt7621_addr_wraparound_test(size)) {
82+
memblock_add(MT7621_LOWMEM_BASE, size);
83+
return;
84+
}
6985
}
7086

71-
if ((size == 256 * SZ_1M) &&
72-
(CPHYSADDR(dm + size) < MT7621_LOWMEM_MAX_SIZE) &&
73-
__builtin_memcmp(dm, dm + size, sizeof(detect_magic))) {
74-
memblock_add(MT7621_LOWMEM_BASE, MT7621_LOWMEM_MAX_SIZE);
75-
memblock_add(MT7621_HIGHMEM_BASE, MT7621_HIGHMEM_SIZE);
76-
} else {
77-
memblock_add(MT7621_LOWMEM_BASE, size);
78-
}
87+
memblock_add(MT7621_LOWMEM_BASE, MT7621_LOWMEM_MAX_SIZE);
88+
memblock_add(MT7621_HIGHMEM_BASE, MT7621_HIGHMEM_SIZE);
7989
}
8090

8191
void __init ralink_of_remap(void)

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