From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: John Doe <john.doe@somewhere.on.planet>
Date: Mon, 27 Jan 2025 15:04:19 +0800
Subject: Patching kernel NanoPi-R3S dts

Signed-off-by: John Doe <john.doe@somewhere.on.planet>
---
 arch/arm64/boot/dts/rockchip/rk3566-nanopi-r3s.dts | 45 +++++++---
 1 file changed, 34 insertions(+), 11 deletions(-)

diff --git a/arch/arm64/boot/dts/rockchip/rk3566-nanopi-r3s.dts b/arch/arm64/boot/dts/rockchip/rk3566-nanopi-r3s.dts
index fb1f65c86..09f0b6fc4 100644
--- a/arch/arm64/boot/dts/rockchip/rk3566-nanopi-r3s.dts
+++ b/arch/arm64/boot/dts/rockchip/rk3566-nanopi-r3s.dts
@@ -50,22 +50,24 @@ gpio-leds {
 
 		power_led: led-0 {
 			color = <LED_COLOR_ID_RED>;
 			function = LED_FUNCTION_POWER;
 			gpios = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>;
-			default-state = "on";
+			linux,default-trigger = "heartbeat";
 		};
 
 		lan_led: led-1 {
 			color = <LED_COLOR_ID_GREEN>;
 			function = LED_FUNCTION_LAN;
+			function-enumerator = <2>;
 			gpios = <&gpio3 RK_PC2 GPIO_ACTIVE_HIGH>;
 		};
 
 		wan_led: led-2 {
 			color = <LED_COLOR_ID_GREEN>;
 			function = LED_FUNCTION_WAN;
+			function-enumerator = <3>;
 			gpios = <&gpio3 RK_PC3 GPIO_ACTIVE_HIGH>;
 		};
 	};
 
 	vcc3v3_sys: regulator-vcc3v3-sys {
@@ -135,22 +137,33 @@ &cpu2 {
 &cpu3 {
 	cpu-supply = <&vdd_cpu>;
 };
 
 &gmac1 {
+	phy-mode = "rgmii";
+	clock_in_out = "output";
+
+	snps,reset-gpio = <&gpio4 RK_PC2 GPIO_ACTIVE_LOW>;
+	snps,reset-active-low;
+	/* Reset time is 15ms, 50ms for rtl8211f */
+	snps,reset-delays-us = <0 15000 50000>;
+
 	assigned-clocks = <&cru SCLK_GMAC1_RX_TX>, <&cru SCLK_GMAC1>;
 	assigned-clock-parents = <&cru SCLK_GMAC1_RGMII_SPEED>, <&cru CLK_MAC1_2TOP>;
 	assigned-clock-rates = <0>, <125000000>;
-	clock_in_out = "output";
-	phy-mode = "rgmii-id";
-	phy-handle = <&rgmii_phy1>;
+
 	pinctrl-names = "default";
 	pinctrl-0 = <&gmac1m0_miim
 		     &gmac1m0_tx_bus2_level3
 		     &gmac1m0_rx_bus2
 		     &gmac1m0_rgmii_clk_level2
 		     &gmac1m0_rgmii_bus_level3>;
+
+	tx_delay = <0x3c>;
+	rx_delay = <0x2f>;
+
+	phy-handle = <&rgmii_phy1>;
 	status = "okay";
 };
 
 &gpu {
 	mali-supply = <&vdd_gpu>;
@@ -403,26 +416,36 @@ hym8563: rtc@51 {
 };
 
 &mdio1 {
 	rgmii_phy1: ethernet-phy@1 {
 		compatible = "ethernet-phy-ieee802.3-c22";
-		reg = <1>;
+		reg = <0x1>;
 		interrupt-parent = <&gpio4>;
 		interrupts = <RK_PC3 IRQ_TYPE_LEVEL_LOW>;
 		pinctrl-names = "default";
-		pinctrl-0 = <&eth_phy_reset_pin>;
-		reset-assert-us = <20000>;
-		reset-deassert-us = <100000>;
-		reset-gpios = <&gpio4 RK_PC2 GPIO_ACTIVE_LOW>;
+		pinctrl-0 = <&gmac_int>;
+		realtek,ledsel = <0xae00>;
 	};
 };
 
 &pcie2x1 {
 	pinctrl-names = "default";
 	pinctrl-0 = <&pcie_reset_h>;
 	reset-gpios = <&gpio4 RK_PC6 GPIO_ACTIVE_HIGH>;
 	status = "okay";
+	
+	pcie@0,0 {
+		reg = <0x00000000 0 0 0 0>;
+		#address-cells = <3>;
+		#size-cells = <2>;
+
+		r8169: pcie@1,0 {
+			reg = <0x000000 0 0 0 0>;
+			local-mac-address = [ 00 00 00 00 00 00 ];
+			realtek,ledsel = <0x870>;
+		};
+	};
 };
 
 &pinctrl {
 	gpio-leds {
 		lan_led_pin: lan-led-pin {
@@ -437,12 +460,12 @@ wan_led_pin: wan-led-pin {
 			rockchip,pins = <3 RK_PC3 RK_FUNC_GPIO &pcfg_pull_none>;
 		};
 	};
 
 	gmac {
-		eth_phy_reset_pin: eth-phy-reset-pin {
-			rockchip,pins = <4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_up>;
+		gmac_int: gmac-int {
+			rockchip,pins = <4 RK_PC3 RK_FUNC_GPIO &pcfg_pull_up>;
 		};
 	};
 
 	pcie {
 		pcie_reset_h: pcie-reset-h {
-- 
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