From 410bebcb812b216eb582a8ac611a5dff46c0628a Mon Sep 17 00:00:00 2001 From: stnolting <22944758+stnolting@users.noreply.github.com> Date: Fri, 2 Jun 2023 13:25:55 +0200 Subject: [PATCH 1/4] [linker script] fix continuity issue #623 --- sw/common/neorv32.ld | 36 ++++++++++++++++-------------------- 1 file changed, 16 insertions(+), 20 deletions(-) diff --git a/sw/common/neorv32.ld b/sw/common/neorv32.ld index 7d340c686..9c9f5ea72 100644 --- a/sw/common/neorv32.ld +++ b/sw/common/neorv32.ld @@ -101,29 +101,11 @@ SECTIONS /* .gnu.warning sections are handled specially by elf.em. */ *(.gnu.warning) - KEEP (*(SORT_NONE(.init))) - KEEP (*(SORT_NONE(.fini))) - KEEP (*(SORT(.ctors.*))) - KEEP (*(.ctors)) - KEEP (*(SORT(.dtors.*))) - KEEP (*(.dtors)) - - /* finish section on WORD boundary */ - . = ALIGN(4); - PROVIDE (__etext = .); - PROVIDE (_etext = .); - PROVIDE (etext = .); - } > rom - - - /* Second part of the actual executable: read-only data, placed right next to .text */ - .rodata : ALIGN(4) - { /* these are a list of 32-bit pointers that point to functions * that are called before/after executing "main". */ - /* The following defines an array with constructors, which are called - from crt0.s before "main", but of course after data init / bss clear. */ + /* The following defines an array with constructors, which are called + * from crt0.s before "main", but of course after data init / bss clear. */ PROVIDE_HIDDEN(__init_array_start = .); KEEP (*(.preinit_array)) @@ -131,6 +113,9 @@ SECTIONS KEEP (*(.init_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .ctors)) PROVIDE_HIDDEN(__init_array_end = .); + KEEP (*(SORT_NONE(.init))) + KEEP (*(SORT_NONE(.fini))) + /* main should never return, but if it does, the destructors are called. */ PROVIDE_HIDDEN(__fini_array_start = .); @@ -138,6 +123,17 @@ SECTIONS KEEP (*(.fini_array EXCLUDE_FILE (*crtbegin.o *crtbegin?.o *crtend.o *crtend?.o ) .dtors)) PROVIDE_HIDDEN(__fini_array_end = .); + /* finish section on WORD boundary */ + . = ALIGN(4); + PROVIDE (__etext = .); + PROVIDE (_etext = .); + PROVIDE (etext = .); + } > rom + + + /* Second part of the actual executable: read-only data, PLACED RIGHT NEXT to .text using "__etext" symbol */ + .rodata __etext : + { /* constant data like strings */ *(.rodata .rodata.* .gnu.linkonce.r.*) *(.rodata1) From b625cb341e24bb775ec6e9f0e7ec4b853dda31f7 Mon Sep 17 00:00:00 2001 From: stnolting <22944758+stnolting@users.noreply.github.com> Date: Fri, 2 Jun 2023 13:34:42 +0200 Subject: [PATCH 2/4] update version: 1.8.5.3 --- CHANGELOG.md | 1 + rtl/core/neorv32_package.vhd | 2 +- 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index de09f6429..1e4d96c5b 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -33,6 +33,7 @@ mimpid = 0x01080200 => Version 01.08.02.00 => v1.8.2 | Date (*dd.mm.yyyy*) | Version | Comment | |:-------------------:|:-------:|:--------| +| 02.06.2023 | 1.8.5.3 | :bug: executable generation: fix address continuity between `.text` and `.rodata` segments; [#626](https://github.com/stnolting/neorv32/pull/626) | | 19.05.2023 | 1.8.5.2 | :sparkles: add automatic trigger mode to **DMA** (trigger transfer if a processor-internal peripheral issues an interrupt request); [#618](https://github.com/stnolting/neorv32/pull/618) | | 18.05.2023 | 1.8.5.1 | software can now retrieve the configured FIFO size of the **TRNG**; [#616](https://github.com/stnolting/neorv32/pull/616) | | 18.05.2023 | [**:rocket:1.8.5**](https://github.com/stnolting/neorv32/releases/tag/v1.8.5) | **New release** | diff --git a/rtl/core/neorv32_package.vhd b/rtl/core/neorv32_package.vhd index 55c43addd..92d102163 100644 --- a/rtl/core/neorv32_package.vhd +++ b/rtl/core/neorv32_package.vhd @@ -60,7 +60,7 @@ package neorv32_package is -- Architecture Constants ----------------------------------------------------------------- -- ------------------------------------------------------------------------------------------- - constant hw_version_c : std_ulogic_vector(31 downto 0) := x"01080502"; -- hardware version + constant hw_version_c : std_ulogic_vector(31 downto 0) := x"01080503"; -- hardware version constant archid_c : natural := 19; -- official RISC-V architecture ID constant XLEN : natural := 32; -- native data path width, do not change! From 2ef00c2e2197ab00518b0b505c33dbce78837655 Mon Sep 17 00:00:00 2001 From: stnolting <22944758+stnolting@users.noreply.github.com> Date: Fri, 2 Jun 2023 13:36:36 +0200 Subject: [PATCH 3/4] [rtl] update/re-link default IMEM image generated from sw/example/demo_blink_led --- rtl/core/neorv32_application_image.vhd | 24 ++++++++++++++---------- 1 file changed, 14 insertions(+), 10 deletions(-) diff --git a/rtl/core/neorv32_application_image.vhd b/rtl/core/neorv32_application_image.vhd index 407d21e6f..babd71b6b 100644 --- a/rtl/core/neorv32_application_image.vhd +++ b/rtl/core/neorv32_application_image.vhd @@ -1,8 +1,8 @@ -- The NEORV32 RISC-V Processor: https://github.com/stnolting/neorv32 -- Auto-generated memory initialization file (for APPLICATION) from source file --- Size: 1076 bytes +-- Size: 1092 bytes -- MARCH: default --- Built: 24.02.2023 18:13:22 +-- Built: 02.06.2023 11:53:17 -- prototype defined in 'neorv32_package.vhd' package body neorv32_application_image is @@ -11,7 +11,7 @@ constant application_init_image : mem32_t := ( x"30005073", x"30401073", x"00000097", -x"12408093", +x"13408093", x"30509073", x"80002117", x"fe810113", @@ -39,7 +39,7 @@ x"00000e13", x"00000e93", x"00000f13", x"00000f93", -x"43400593", +x"44400593", x"80000617", x"f8060613", x"80000697", @@ -59,8 +59,10 @@ x"00f75863", x"00072023", x"00470713", x"ff5ff06f", -x"43400413", -x"43400493", +x"00000417", +x"37840413", +x"00000497", +x"37048493", x"00945a63", x"00042083", x"000080e7", @@ -68,11 +70,13 @@ x"00440413", x"ff1ff06f", x"00000513", x"00000593", -x"088000ef", +x"090000ef", x"30401073", x"34051073", -x"43400413", -x"43400493", +x"00000417", +x"34040413", +x"00000497", +x"33848493", x"00945a63", x"00042083", x"000080e7", @@ -82,7 +86,7 @@ x"00000093", x"00008463", x"000080e7", x"10500073", -x"0000006f", +x"ffdff06f", x"ff810113", x"00812023", x"00912223", From 3533c900b3fd600a7c325310558dc7dcd2fbb143 Mon Sep 17 00:00:00 2001 From: stnolting <22944758+stnolting@users.noreply.github.com> Date: Fri, 2 Jun 2023 13:37:39 +0200 Subject: [PATCH 4/4] [bootloader] re-link + minor edits Add memory sync to bootloader (flush caches before booting the application). --- rtl/core/neorv32_bootloader_image.vhd | 95 ++++++++++++++------------- sw/bootloader/bootloader.c | 6 ++ 2 files changed, 56 insertions(+), 45 deletions(-) diff --git a/rtl/core/neorv32_bootloader_image.vhd b/rtl/core/neorv32_bootloader_image.vhd index 37a0428ae..21b947905 100644 --- a/rtl/core/neorv32_bootloader_image.vhd +++ b/rtl/core/neorv32_bootloader_image.vhd @@ -1,8 +1,8 @@ -- The NEORV32 RISC-V Processor: https://github.com/stnolting/neorv32 -- Auto-generated memory initialization file (for BOOTLOADER) from source file --- Size: 4044 bytes +-- Size: 4064 bytes -- MARCH: default --- Built: 16.03.2023 20:18:06 +-- Built: 02.06.2023 11:53:49 -- prototype defined in 'neorv32_package.vhd' package body neorv32_bootloader_image is @@ -40,7 +40,7 @@ x"00000e93", x"00000f13", x"00000f93", x"00001597", -x"f5058593", +x"f6458593", x"80010617", x"f7c60613", x"80010697", @@ -65,7 +65,7 @@ x"060000ef", x"30401073", x"34051073", x"10500073", -x"0000006f", +x"ffdff06f", x"ff810113", x"00812023", x"00912223", @@ -187,63 +187,63 @@ x"30479073", x"00800793", x"3007a073", x"ffff1537", -x"dc450513", +x"dd850513", x"6b0000ef", x"f1302573", x"634000ef", x"ffff1537", -x"dfc50513", +x"e1050513", x"69c000ef", x"fe402503", x"620000ef", x"ffff1537", -x"e0450513", +x"e1850513", x"688000ef", x"fe002503", x"60c000ef", x"ffff1537", -x"e0c50513", +x"e2050513", x"674000ef", x"30102573", x"5f8000ef", x"ffff1537", -x"e1450513", +x"e2850513", x"660000ef", x"fc002573", x"5e4000ef", x"ffff1537", -x"e1c50513", +x"e3050513", x"64c000ef", x"fe802503", x"ffff1437", x"ffff1937", x"5c8000ef", x"ffff1537", -x"e2450513", +x"e3850513", x"630000ef", x"ff802503", x"5b4000ef", -x"e2c40513", +x"e4040513", x"620000ef", x"ff002503", x"5a4000ef", x"ffff1537", -x"e3850513", +x"e4c50513", x"60c000ef", x"ffc02503", x"590000ef", -x"e2c40513", +x"e4040513", x"5fc000ef", x"ff402503", x"580000ef", -x"dc090513", +x"dd490513", x"5ec000ef", x"fe802783", x"00020737", x"00e7f7b3", x"04078c63", x"ffff1537", -x"e4050513", +x"e5450513", x"5d0000ef", x"2bc000ef", x"fe002403", @@ -261,17 +261,17 @@ x"0157f7b3", x"0a078063", x"ffff1537", x"fa402783", -x"e6c50513", +x"e8050513", x"588000ef", x"ffff1a37", -x"e78a0513", +x"e8ca0513", x"57c000ef", x"06c00a93", x"07800b93", x"07300c13", x"06500c93", x"ffff17b7", -x"ef878513", +x"f0c78513", x"560000ef", x"fa002783", x"00010737", @@ -281,7 +281,7 @@ x"fa402403", x"0ff47413", x"00040513", x"4b4000ef", -x"dc090513", +x"dd490513", x"538000ef", x"07200793", x"06f41063", @@ -304,7 +304,7 @@ x"00b41463", x"f53560e3", x"00100513", x"718000ef", -x"dc090513", +x"dd490513", x"4dc000ef", x"00000513", x"069000ef", @@ -312,12 +312,12 @@ x"19540863", x"028ae463", x"19940863", x"06800793", -x"e78a0513", +x"e8ca0513", x"02f40c63", x"03f00793", x"18f40c63", x"ffff1537", -x"f9c50513", +x"fb050513", x"0240006f", x"07500793", x"02f40263", @@ -326,24 +326,24 @@ x"ff8414e3", x"0044a403", x"02041063", x"ffff1537", -x"f0050513", +x"f1450513", x"484000ef", x"f19ff06f", x"00000513", x"6ac000ef", x"f0dff06f", x"ffff1537", -x"f1c50513", +x"f3050513", x"468000ef", x"00040513", x"3ec000ef", x"ffff1537", -x"f2450513", +x"f3850513", x"454000ef", x"00400537", x"3d8000ef", x"ffff1537", -x"f3c50513", +x"f5050513", x"440000ef", x"00010737", x"fa002783", @@ -360,7 +360,7 @@ x"00050663", x"00300513", x"460000ef", x"ffff1537", -x"f4850513", +x"f5c50513", x"3fc000ef", x"01045b13", x"004009b7", @@ -406,19 +406,19 @@ x"00898513", x"41b005b3", x"230000ef", x"ffff1537", -x"da850513", +x"dbc50513", x"ec1ff06f", x"00100513", x"ec5ff06f", x"0044a783", x"e4079ee3", x"ffff1537", -x"f5850513", +x"f6c50513", x"ea5ff06f", x"00100513", x"e4dff06f", x"ffff1537", -x"f6850513", +x"f7c50513", x"e91ff06f", x"f9402583", x"f9002503", @@ -600,7 +600,7 @@ x"07800513", x"ffff14b7", x"fbdff0ef", x"01c00413", -x"fa848493", +x"fbc48493", x"ffc00993", x"008957b3", x"00f7f793", @@ -642,13 +642,13 @@ x"ff010113", x"00812423", x"00050413", x"ffff1537", -x"d6050513", +x"d7450513", x"00112623", x"f91ff0ef", x"00241793", x"ffff1537", x"008787b3", -x"fb850513", +x"fcc50513", x"00f50533", x"f79ff0ef", x"00800793", @@ -739,7 +739,7 @@ x"00040737", x"00e7f7b3", x"04078263", x"ffff1537", -x"d6850513", +x"d7c50513", x"e11ff0ef", x"00048513", x"d95ff0ef", @@ -752,7 +752,7 @@ x"d65ff0ef", x"34302573", x"d75ff0ef", x"ffff1537", -x"dc050513", +x"dd450513", x"dddff0ef", x"00440413", x"34141073", @@ -774,7 +774,7 @@ x"00fb2023", x"00050413", x"02051863", x"ffff1537", -x"d7450513", +x"d8850513", x"d85ff0ef", x"004005b7", x"00040513", @@ -785,12 +785,12 @@ x"04f50863", x"00000513", x"0380006f", x"ffff1537", -x"d9450513", +x"da850513", x"d59ff0ef", x"00400537", x"cddff0ef", x"ffff1537", -x"da050513", +x"db450513", x"d45ff0ef", x"fe802783", x"00080737", @@ -821,7 +821,7 @@ x"015484b3", x"00200513", x"fa0494e3", x"ffff1537", -x"da850513", +x"dbc50513", x"cc9ff0ef", x"02c12083", x"02812403", @@ -854,15 +854,20 @@ x"ff002403", x"00050463", x"40400437", x"ffff1537", -x"dac50513", +x"dc050513", x"c45ff0ef", x"00040513", x"bc9ff0ef", x"ffff1537", -x"dbc50513", +x"dd050513", x"c31ff0ef", x"fa002783", x"fe07cee3", +x"fc0027f3", +x"0027f793", +x"00078463", +x"0000100f", +x"0ff0000f", x"000400e7", x"52450a07", x"00005f52", @@ -897,9 +902,9 @@ x"6f6c746f", x"72656461", x"0a3e3e20", x"444c420a", -x"4d203a56", -x"31207261", -x"30322036", +x"4a203a56", +x"20206e75", +x"30322032", x"480a3332", x"203a5657", x"00000020", diff --git a/sw/bootloader/bootloader.c b/sw/bootloader/bootloader.c index e74f316f2..20cd3200b 100644 --- a/sw/bootloader/bootloader.c +++ b/sw/bootloader/bootloader.c @@ -487,6 +487,12 @@ void start_app(int boot_xip) { // wait for UART0 to finish transmitting while (neorv32_uart0_tx_busy()); + // memory sync + if (neorv32_cpu_csr_read(CSR_MXISA) & (1 << CSR_MXISA_ZIFENCEI)) { // Zifenci ISA extension available? + asm volatile ("fence.i"); + } + asm volatile ("fence"); + // start application asm volatile ("jalr ra, %0" : : "r" (app_base));