From ae03d4f14370cc3e6ba88f643aeea1c2fd08637d Mon Sep 17 00:00:00 2001 From: David Cox Date: Wed, 17 Jan 2024 20:12:20 -0800 Subject: [PATCH] release version 0.4.0.0 (#7) --- CHANGELOG.md | 3 ++- LICENSE | 2 +- lion-formal/lion-formal.cabal | 2 +- lion-metric/README.md | 17 +++++++++-------- lion-metric/lion-metric.cabal | 4 ++-- lion-soc/README.md | 10 +++++----- lion-soc/bios/bios.S | 4 ++-- lion-soc/lion-soc.cabal | 2 +- lion.cabal | 4 ++-- src/Lion/Alu.hs | 2 +- src/Lion/Core.hs | 2 +- src/Lion/Instruction.hs | 2 +- src/Lion/Pipe.hs | 2 +- src/Lion/Rvfi.hs | 2 +- 14 files changed, 30 insertions(+), 28 deletions(-) diff --git a/CHANGELOG.md b/CHANGELOG.md index 704ef00..4249155 100644 --- a/CHANGELOG.md +++ b/CHANGELOG.md @@ -1,7 +1,8 @@ # Revision history for lion -## 0.X.X.X +## 0.4.0.0 * Update clash-prelude dependency bounds #4 +* Type-level -> data-level configuration #6 ## 0.3.0.0 diff --git a/LICENSE b/LICENSE index 4e88cff..ba6829c 100644 --- a/LICENSE +++ b/LICENSE @@ -1,6 +1,6 @@ BSD 3-Clause License -Copyright (c) 2021, David Cox +Copyright (c) 2024, David Cox All rights reserved. Redistribution and use in source and binary forms, with or without diff --git a/lion-formal/lion-formal.cabal b/lion-formal/lion-formal.cabal index cfc90bf..22b5964 100644 --- a/lion-formal/lion-formal.cabal +++ b/lion-formal/lion-formal.cabal @@ -18,7 +18,7 @@ library build-depends: base >= 4.13 && < 4.17, clash-prelude >= 1.4 && < 1.7, - lion >= 0.3 && < 0.4, + lion >= 0.4 && < 0.5, ghc-typelits-natnormalise, ghc-typelits-extra, ghc-typelits-knownnat diff --git a/lion-metric/README.md b/lion-metric/README.md index 9df36b4..5088e89 100644 --- a/lion-metric/README.md +++ b/lion-metric/README.md @@ -10,21 +10,22 @@ generate metrics: `cabal run` clean: `cabal run metric -- clean` -## Metrics as of Jun 24 2021 for iCE40 +## Metrics as of Jan 17 2024 for iCE40 ``` === Metric === - Number of wires: 2305 - Number of wire bits: 632631 - Number of public wires: 2305 - Number of public wire bits: 632631 + Number of wires: 2831 + Number of wire bits: 380325 + Number of public wires: 2831 + Number of public wire bits: 380325 Number of memories: 0 Number of memory bits: 0 Number of processes: 0 - Number of cells: 2702 - SB_CARRY 370 + Number of cells: 2968 + SB_CARRY 368 + SB_DFF 72 SB_DFFER 64 SB_DFFR 266 - SB_LUT4 1998 + SB_LUT4 2194 SB_RAM40_4K 4 ``` diff --git a/lion-metric/lion-metric.cabal b/lion-metric/lion-metric.cabal index 4f885cd..a4eae86 100644 --- a/lion-metric/lion-metric.cabal +++ b/lion-metric/lion-metric.cabal @@ -16,8 +16,8 @@ library default-language: Haskell2010 build-depends: base >= 4.13 && < 4.17, - clash-prelude >= 1.4 && < 1.7, - lion >= 0.3 && < 0.4, + clash-prelude >= 1.4 && < 1.7, + lion >= 0.4 && < 0.5, ghc-typelits-natnormalise, ghc-typelits-extra, ghc-typelits-knownnat diff --git a/lion-soc/README.md b/lion-soc/README.md index afa6c2a..7df3404 100644 --- a/lion-soc/README.md +++ b/lion-soc/README.md @@ -16,7 +16,7 @@ ``` ## Usage -1. `cabal build` +1. `cabal build all` 2. Ensure the VELDT is ON and in the FLASH mode. 3. `cabal run soc -- prog` 4. Cycle power switch, set mode switch to FPGA. @@ -27,7 +27,7 @@ / /__/ / _ \/ _ \ _\ \/ _ \/ /__ /____/_/\___/_//_/ /___/\___/\___/ -Standard Semiconductor (c) 2021 +Standard Semiconductor (c) 2024 Checking FLASH...SUCCESS ``` @@ -36,11 +36,11 @@ To compile, synthesize, and route Lion SoC without programming: `cabal run soc` ### Clean `cabal run soc -- clean` -## Metrics as of Dec 30 2021 for iCE40 +## Metrics as of Jan 17 2024 for iCE40 ### Device utilisation ``` Device utilisation: - ICESTORM_LC: 2600/ 5280 49% + ICESTORM_LC: 2685/ 5280 50% ICESTORM_RAM: 8/ 30 26% SB_IO: 6/ 96 6% SB_GB: 8/ 8 100% @@ -53,7 +53,7 @@ ICESTORM_SPRAM: 4/ 4 100% ``` ### Clock frequency ``` -Max frequency for clock: 14.17 MHz (PASS @ 12Mhz) +Max frequency for clock: 14.93 MHz (PASS @ 12MHz) ``` ## Memory Map diff --git a/lion-soc/bios/bios.S b/lion-soc/bios/bios.S index 701cd90..7a94604 100644 --- a/lion-soc/bios/bios.S +++ b/lion-soc/bios/bios.S @@ -335,7 +335,7 @@ name: .string "\n\r __ _ ____ _____\n\r / / (_)__ ___ / __/__ / ___/\n\r / /__/ / _ \\/ _ \\ _\\ \\/ _ \\/ /__ \n\r/____/_/\\___/_//_/ /___/\\___/\\___/ \n\r" copyright: - .string "\n\rStandard Semiconductor (c) 2021\n\r\n\r" + .string "\n\rStandard Semiconductor (c) 2024\n\r\n\r" #check_spram_str: # .string "Checking SPRAM..." @@ -346,4 +346,4 @@ check_flash_str: success_str: .string "SUCCESS\n\r" fail_str: - .string "FAIL\n\r" \ No newline at end of file + .string "FAIL\n\r" diff --git a/lion-soc/lion-soc.cabal b/lion-soc/lion-soc.cabal index dc5a1f5..ec59af2 100644 --- a/lion-soc/lion-soc.cabal +++ b/lion-soc/lion-soc.cabal @@ -25,7 +25,7 @@ library generic-monoid >= 0.1 && < 0.2, ice40-prim >= 0.3 && < 0.4, lens, - lion >= 0.3 && < 0.4, + lion >= 0.4 && < 0.5, mtl >= 2.2 && < 2.3, ghc-typelits-natnormalise, ghc-typelits-extra, diff --git a/lion.cabal b/lion.cabal index e3f3906..6e9026b 100644 --- a/lion.cabal +++ b/lion.cabal @@ -1,6 +1,6 @@ cabal-version: 2.4 name: lion -version: 0.3.0.0 +version: 0.4.0.0 synopsis: RISC-V Core description: Lion is a formally verified, 5-stage pipeline [RISC-V](https://riscv.org) core. Lion targets the [VELDT FPGA development board](https://standardsemiconductor.com) and is written in Haskell using [Clash](https://clash-lang.org). bug-reports: https://github.com/standardsemiconductor/lion/issues @@ -8,7 +8,7 @@ license: BSD-3-Clause license-file: LICENSE author: dopamane maintainer: dopamane -copyright: (c) 2021-2023 David Cox +copyright: (c) 2021-2024 David Cox category: Hardware extra-source-files: CHANGELOG.md diff --git a/src/Lion/Alu.hs b/src/Lion/Alu.hs index 6211e75..e07cbe4 100644 --- a/src/Lion/Alu.hs +++ b/src/Lion/Alu.hs @@ -1,7 +1,7 @@ {-| Module : Lion.Alu Description : Lion arithmetic logic unit -Copyright : (c) David Cox, 2021-2022 +Copyright : (c) David Cox, 2021-2024 License : BSD-3-Clause Maintainer : standardsemiconductor@gmail.com diff --git a/src/Lion/Core.hs b/src/Lion/Core.hs index 1aec5da..c34abaa 100644 --- a/src/Lion/Core.hs +++ b/src/Lion/Core.hs @@ -1,7 +1,7 @@ {-| Module : Lion.Core Description : Lion RISC-V Core -Copyright : (c) David Cox, 2021 +Copyright : (c) David Cox, 2024 License : BSD-3-Clause Maintainer : standardsemiconductor@gmail.com diff --git a/src/Lion/Instruction.hs b/src/Lion/Instruction.hs index aae6bec..3c89d18 100644 --- a/src/Lion/Instruction.hs +++ b/src/Lion/Instruction.hs @@ -1,7 +1,7 @@ {-| Module : Lion.Instruction Description : RISC-V ISA -Copyright : (c) David Cox, 2021 +Copyright : (c) David Cox, 2024 License : BSD-3-Clause Maintainer : standardsemiconductor@gmail.com -} diff --git a/src/Lion/Pipe.hs b/src/Lion/Pipe.hs index 3e845bd..f521cf6 100644 --- a/src/Lion/Pipe.hs +++ b/src/Lion/Pipe.hs @@ -1,7 +1,7 @@ {-| Module : Lion.Pipe Description : RISC-V 5-stage pipeline -Copyright : (c) David Cox, 2021 +Copyright : (c) David Cox, 2024 License : BSD-3-Clause Maintainer : standardsemiconductor@gmail.com -} diff --git a/src/Lion/Rvfi.hs b/src/Lion/Rvfi.hs index cad8b79..36d8d63 100644 --- a/src/Lion/Rvfi.hs +++ b/src/Lion/Rvfi.hs @@ -1,7 +1,7 @@ {-| Module : Lion.Rvfi Description : Lion RISC-V Formal Verification Interface -Copyright : (c) David Cox, 2021 +Copyright : (c) David Cox, 2024 License : BSD-3-Clause Maintainer : standardsemiconductor@gmail.com