From 5c54c252dbfa35c243528587303bbd29aa06c7b5 Mon Sep 17 00:00:00 2001
From: Eli Friedman <efriedma@codeaurora.org>
Date: Fri, 26 Jan 2018 20:23:00 +0000
Subject: [PATCH] [LivePhysRegs] Preserve pristine regs in blocks with no
successors.
One common source of blocks with no successors is calls to noreturn
functions; we want to preserve pristine registers in case they throw an
exception.
The whole pristine register thing is messy (we should really prefer to
explicitly model registers), but this fills a hole in the model for now.
Fixes https://bugs.llvm.org/show_bug.cgi?id=36073.
Differential Revision: https://reviews.llvm.org/D42509
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@323559 91177308-0d34-0410-b5e6-96231b3b80d8
---
lib/CodeGen/LivePhysRegs.cpp | 4 +--
test/CodeGen/Thumb/stm-scavenging.ll | 47 ++++++++++++++++++++++++++++
2 files changed, 49 insertions(+), 2 deletions(-)
create mode 100644 test/CodeGen/Thumb/stm-scavenging.ll
diff --git a/lib/CodeGen/LivePhysRegs.cpp b/lib/CodeGen/LivePhysRegs.cpp
index f4b43a9b8ead..c07fa16e129d 100644
--- a/lib/CodeGen/LivePhysRegs.cpp
+++ b/lib/CodeGen/LivePhysRegs.cpp
@@ -225,10 +225,10 @@ void LivePhysRegs::addLiveOutsNoPristines(const MachineBasicBlock &MBB) {
void LivePhysRegs::addLiveOuts(const MachineBasicBlock &MBB) {
const MachineFunction &MF = *MBB.getParent();
- if (!MBB.succ_empty()) {
+ if (!MBB.isReturnBlock()) {
addPristines(MF);
addLiveOutsNoPristines(MBB);
- } else if (MBB.isReturnBlock()) {
+ } else {
// For the return block: Add all callee saved registers.
const MachineFrameInfo &MFI = MF.getFrameInfo();
if (MFI.isCalleeSavedInfoValid())
diff --git a/test/CodeGen/Thumb/stm-scavenging.ll b/test/CodeGen/Thumb/stm-scavenging.ll
new file mode 100644
index 000000000000..ef038f290386
--- /dev/null
+++ b/test/CodeGen/Thumb/stm-scavenging.ll
@@ -0,0 +1,47 @@
+; RUN: llc < %s | FileCheck %s
+target triple = "thumbv6---gnueabi"
+
+; Use STM to save the three registers
+; CHECK-LABEL: use_stm:
+; CHECK: .save {r7, lr}
+; CHECK: .setfp r7, sp
+; CHECK: stm r3!, {r0, r1, r2}
+; CHECK: bl throws_1
+define void @use_stm(i32 %a, i32 %b, i32 %c, i32* %d) local_unnamed_addr noreturn "no-frame-pointer-elim"="true" {
+entry:
+ %arrayidx = getelementptr inbounds i32, i32* %d, i32 2
+ store i32 %a, i32* %arrayidx, align 4
+ %arrayidx1 = getelementptr inbounds i32, i32* %d, i32 3
+ store i32 %b, i32* %arrayidx1, align 4
+ %arrayidx2 = getelementptr inbounds i32, i32* %d, i32 4
+ store i32 %c, i32* %arrayidx2, align 4
+ tail call void @throws_1(i32 %a, i32 %b, i32 %c) noreturn
+ unreachable
+}
+
+; Don't use STM: there is no available register to store
+; the address. We could transform this with some extra math, but
+; that currently isn't implemented.
+; CHECK-LABEL: no_stm:
+; CHECK: .save {r7, lr}
+; CHECK: .setfp r7, sp
+; CHECK: str r0,
+; CHECK: str r1,
+; CHECK: str r2,
+; CHECK: bl throws_2
+define void @no_stm(i32 %a, i32 %b, i32 %c, i32* %d) local_unnamed_addr noreturn "no-frame-pointer-elim"="true" {
+entry:
+ %arrayidx = getelementptr inbounds i32, i32* %d, i32 2
+ store i32 %a, i32* %arrayidx, align 4
+ %arrayidx1 = getelementptr inbounds i32, i32* %d, i32 3
+ store i32 %b, i32* %arrayidx1, align 4
+ %arrayidx2 = getelementptr inbounds i32, i32* %d, i32 4
+ store i32 %c, i32* %arrayidx2, align 4
+ tail call void @throws_2(i32 %a, i32 %b, i32 %c, i32* %d) noreturn
+ unreachable
+}
+
+
+declare void @throws_1(i32, i32, i32) noreturn
+declare void @throws_2(i32, i32, i32, i32*) noreturn
+