From 03424d8f8c4e3cf4473d973b357172600e863d2d Mon Sep 17 00:00:00 2001 From: Nick Brassel Date: Sun, 29 Aug 2021 11:18:29 +1000 Subject: [PATCH 1/9] Add support for building against ChibiOS svn/trunk. --- tmk_core/chibios.mk | 23 ++++++++++++++++++----- tmk_core/protocol/chibios/usb_main.c | 12 +++++++++++- util/chibios_conf_updater.sh | 11 +++++++++++ 3 files changed, 40 insertions(+), 6 deletions(-) diff --git a/tmk_core/chibios.mk b/tmk_core/chibios.mk index 18839710be08..8765f8b44a39 100644 --- a/tmk_core/chibios.mk +++ b/tmk_core/chibios.mk @@ -27,6 +27,12 @@ endif OPT_OS = chibios CHIBIOS = $(TOP_DIR)/lib/chibios CHIBIOS_CONTRIB = $(TOP_DIR)/lib/chibios-contrib + +CHIBIOS_PORT ?= +ifeq ("$(CHIBIOS_PORT)","") + CHIBIOS_PORT = ARMv$(ARMV)-M +endif + # Startup files. Try a few different locations, for compability with old versions and # for things hardware in the contrib repository STARTUP_MK = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/startup_$(MCU_STARTUP).mk @@ -165,18 +171,25 @@ include $(BOARD_MK) -include $(CHIBIOS)/os/hal/osal/rt-nil/osal.mk # ChibiOS >= 20.x # RTOS files (optional). include $(CHIBIOS)/os/rt/rt.mk -# Compability with old version -PORT_V = $(CHIBIOS)/os/rt/ports/ARMCMx/compilers/GCC/mk/port_v$(ARMV)m.mk +PORT_V = $(CHIBIOS)/os/common/ports/$(CHIBIOS_PORT)/compilers/GCC/mk/port.mk ifeq ("$(wildcard $(PORT_V))","") -PORT_V = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v$(ARMV)m.mk + # Compability with =20.x + PORT_V = $(CHIBIOS)/os/rt/ports/ARMCMx/compilers/GCC/mk/port_v$(ARMV)m.mk + ifeq ("$(wildcard $(PORT_V))","") + # Compability with <=19.x + PORT_V = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v$(ARMV)m.mk + endif endif include $(PORT_V) # Other files (optional). include $(CHIBIOS)/os/hal/lib/streams/streams.mk -RULESPATH = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC +RULESPATH = $(CHIBIOS)/os/common/ports/$(CHIBIOS_PORT)/compilers/GCC ifeq ("$(wildcard $(RULESPATH)/rules.mk)","") -RULESPATH = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC + RULESPATH = $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC + ifeq ("$(wildcard $(RULESPATH)/rules.mk)","") + RULESPATH = $(CHIBIOS)/os/common/startup/ARMCMx/compilers/GCC + endif endif # Define linker script file here diff --git a/tmk_core/protocol/chibios/usb_main.c b/tmk_core/protocol/chibios/usb_main.c index cc282e6a9b44..b00fbc061af3 100644 --- a/tmk_core/protocol/chibios/usb_main.c +++ b/tmk_core/protocol/chibios/usb_main.c @@ -70,7 +70,12 @@ uint8_t keyboard_protocol __attribute__((aligned(2))) = 1; uint8_t keyboard_led_state = 0; volatile uint16_t keyboard_idle_count = 0; static virtual_timer_t keyboard_idle_timer; -static void keyboard_idle_timer_cb(void *arg); + +#if CH_KERNEL_MAJOR >= 7 +static void keyboard_idle_timer_cb(struct ch_virtual_timer *, void *arg); +#elif CH_KERNEL_MAJOR <= 6 +static void keyboard_idle_timer_cb(void *arg); +#endif report_keyboard_t keyboard_report_sent = {{0}}; #ifdef MOUSE_ENABLE @@ -761,7 +766,12 @@ void kbd_sof_cb(USBDriver *usbp) { (void)usbp; } /* Idle requests timer code * callback (called from ISR, unlocked state) */ +#if CH_KERNEL_MAJOR >= 7 +static void keyboard_idle_timer_cb(struct ch_virtual_timer *timer, void *arg) { + (void)timer; +#elif CH_KERNEL_MAJOR <= 6 static void keyboard_idle_timer_cb(void *arg) { +#endif USBDriver *usbp = (USBDriver *)arg; osalSysLockFromISR(); diff --git a/util/chibios_conf_updater.sh b/util/chibios_conf_updater.sh index 5ba8aa677b68..ab6163bca724 100755 --- a/util/chibios_conf_updater.sh +++ b/util/chibios_conf_updater.sh @@ -3,6 +3,17 @@ set -eEuo pipefail umask 022 +##################### +# You will need to get an older JDK -- JDK 8 +# +# !!!!!!!! DO NOT INSTALL THIS IF YOU HAVE AN EXISTING JDK OR JRE INSTALLED !!!!!!!! +# +# For Debian 10-ish distro's: +# wget -qO - https://adoptopenjdk.jfrog.io/adoptopenjdk/api/gpg/key/public | sudo apt-key add - +# sudo add-apt-repository --yes https://adoptopenjdk.jfrog.io/adoptopenjdk/deb/ +# sudo apt-get update && sudo apt-get install adoptopenjdk-8-hotspot + + sinfo() { echo "$@" >&2 ; } shead() { sinfo "" ; sinfo "---------------------------------" ; sinfo "-- $@" ; sinfo "---------------------------------" ; } havecmd() { command command type "${1}" >/dev/null 2>&1 || return 1 ; } From 1e02f56f19824e265a2a338cea3cf77c8022468b Mon Sep 17 00:00:00 2001 From: Nick Brassel Date: Thu, 23 Sep 2021 07:21:16 +1000 Subject: [PATCH 2/9] Swap to 21.6.x --- lib/chibios | 2 +- lib/chibios-contrib | 2 +- util/update_chibios_mirror.sh | 2 +- 3 files changed, 3 insertions(+), 3 deletions(-) diff --git a/lib/chibios b/lib/chibios index 413e39c5681d..e9afd18713d3 160000 --- a/lib/chibios +++ b/lib/chibios @@ -1 +1 @@ -Subproject commit 413e39c5681d181720440f2a8b7391f581788d7b +Subproject commit e9afd18713d3d9e8a307732d3b35f27488573cb9 diff --git a/lib/chibios-contrib b/lib/chibios-contrib index d1c2126d1cd8..1127b5575e5a 160000 --- a/lib/chibios-contrib +++ b/lib/chibios-contrib @@ -1 +1 @@ -Subproject commit d1c2126d1cd867c50127da84425805e225df8555 +Subproject commit 1127b5575e5ae784b1d5654220f35e0cb8aa8ca9 diff --git a/util/update_chibios_mirror.sh b/util/update_chibios_mirror.sh index 83aee2281798..b7e96a93059a 100755 --- a/util/update_chibios_mirror.sh +++ b/util/update_chibios_mirror.sh @@ -10,7 +10,7 @@ chibios_branches="trunk stable_20.3.x stable_21.6.x" chibios_tags="ver20.3.1 ver20.3.2 ver20.3.3 ver21.6.0" # The ChibiOS-Contrib branches to mirror -contrib_branches="chibios-20.3.x" +contrib_branches="chibios-20.3.x chibios-21.6.x" ################################ # Actions From 68cf31f7e0aa08142504d2d068b48f02572ec165 Mon Sep 17 00:00:00 2001 From: Nick Brassel Date: Thu, 23 Sep 2021 07:26:50 +1000 Subject: [PATCH 3/9] Update to latest branch revision as released version is broken. --- lib/chibios | 2 +- util/chibios_conf_updater.sh | 90 ------------------------------------ 2 files changed, 1 insertion(+), 91 deletions(-) diff --git a/lib/chibios b/lib/chibios index e9afd18713d3..1238f63d1f14 160000 --- a/lib/chibios +++ b/lib/chibios @@ -1 +1 @@ -Subproject commit e9afd18713d3d9e8a307732d3b35f27488573cb9 +Subproject commit 1238f63d1f147a7d8e6846f8957ffb65ff47a9f2 diff --git a/util/chibios_conf_updater.sh b/util/chibios_conf_updater.sh index ab6163bca724..a4feb7c7ac56 100755 --- a/util/chibios_conf_updater.sh +++ b/util/chibios_conf_updater.sh @@ -22,8 +22,6 @@ this_script="$(realpath "${BASH_SOURCE[0]}")" script_dir="$(realpath "$(dirname "$this_script")")" qmk_firmware_dir="$(realpath "$script_dir/../")" -declare -A file_hashes - export PATH="$PATH:$script_dir/fmpp/bin" build_fmpp() { @@ -56,67 +54,6 @@ find_chibi_files() { done } -revert_chibi_files() { - local search_path="$1" - shead "Reverting ChibiOS config/board files..." - for file in $(find_chibi_files "$search_path" -name chconf.h -or -name halconf.h -or -name mcuconf.h -or -name board.c -or -name board.h -or -name board.mk -or -name board.chcfg) ; do - pushd "$search_path" >/dev/null 2>&1 - local relpath=$(realpath --relative-to="$search_path" "$file") - git checkout upstream/develop -- "$relpath" || git checkout origin/develop -- "$relpath" || true - popd >/dev/null 2>&1 - done -} - -populate_file_hashes() { - local search_path="$1" - shead "Determining duplicate config/board files..." - for file in $(find_chibi_files "$search_path" -name chconf.h -or -name halconf.h -or -name mcuconf.h -or -name board.c -or -name board.h) ; do - local key="file_$(clang-format "$file" | sha1sum | cut -d' ' -f1)" - local relpath=$(realpath --relative-to="$search_path" "$file") - file_hashes[$key]="${file_hashes[$key]:-} $relpath" - done - for file in $(find_chibi_files "$search_path" -name board.mk -or -name board.chcfg) ; do - local key="file_$(cat "$file" | sha1sum | cut -d' ' -f1)" - local relpath=$(realpath --relative-to="$search_path" "$file") - file_hashes[$key]="${file_hashes[$key]:-} $relpath" - done -} - -determine_equivalent_files() { - local search_file="$1" - for K in "${!file_hashes[@]}"; do - for V in ${file_hashes[$K]}; do - if [[ "$V" == "$search_file" ]] ; then - for V in ${file_hashes[$K]}; do - echo "$V" - done - return 0 - fi - done - done - return 1 -} - -deploy_staged_files() { - shead "Deploying staged files..." - for file in $(find "$qmk_firmware_dir/util/chibios-upgrade-staging" -type f) ; do - local relpath=$(realpath --relative-to="$qmk_firmware_dir/util/chibios-upgrade-staging" "$file") - sinfo "Deploying staged file: $relpath" - for other in $(determine_equivalent_files "$relpath") ; do - sinfo " => $other" - cp "$qmk_firmware_dir/util/chibios-upgrade-staging/$relpath" "$qmk_firmware_dir/$other" - done - done -} - -swap_mcuconf_f3xx_f303() { - shead "Swapping STM32F3xx_MCUCONF -> STM32F303_MCUCONF..." - for file in $(find_chibi_files "$qmk_firmware_dir" -name mcuconf.h) ; do - sed -i 's#STM32F3xx_MCUCONF#STM32F303_MCUCONF#g' "$file" - dos2unix "$file" >/dev/null 2>&1 - done -} - upgrade_conf_files_generic() { local search_filename="$1" local update_script="$2" @@ -161,35 +98,8 @@ upgrade_mcuconf_files() { popd >/dev/null 2>&1 } -update_staged_files() { - shead "Updating staged files with ChibiOS upgraded versions..." - for file in $(find "$qmk_firmware_dir/util/chibios-upgrade-staging" -type f) ; do - local relpath=$(realpath --relative-to="$qmk_firmware_dir/util/chibios-upgrade-staging" "$file") - sinfo "Updating staged file: $relpath" - cp "$qmk_firmware_dir/$relpath" "$qmk_firmware_dir/util/chibios-upgrade-staging/$relpath" - done -} - havecmd fmpp || build_fmpp -revert_chibi_files "$qmk_firmware_dir" -populate_file_hashes "$qmk_firmware_dir" - -shead "Showing duplicate ChibiOS files..." -for K in "${!file_hashes[@]}"; do - sinfo ${K#file_}: - for V in ${file_hashes[$K]}; do - sinfo " $V" - done -done - -if [ "${1:-}" == "-r" ] ; then - exit 0 -fi - -swap_mcuconf_f3xx_f303 -deploy_staged_files upgrade_mcuconf_files upgrade_chconf_files upgrade_halconf_files -update_staged_files From 067ca40d119f6ce2c6970c4e7ec4b15716c3c12f Mon Sep 17 00:00:00 2001 From: Nick Brassel Date: Thu, 23 Sep 2021 08:22:44 +1000 Subject: [PATCH 4/9] Updated configs. --- keyboards/matrix/m20add/mcuconf.h | 65 ++++++----- keyboards/matrix/noah/mcuconf.h | 65 ++++++----- .../BLACKPILL_STM32_F401/configs/mcuconf.h | 71 +++++------- .../BLACKPILL_STM32_F411/configs/mcuconf.h | 65 ++++++----- .../GENERIC_STM32_F303XC/configs/mcuconf.h | 3 +- .../GENERIC_STM32_F407XE/configs/mcuconf.h | 78 ++++++------- .../GENERIC_STM32_F446XE/configs/mcuconf.h | 108 ++++++++++-------- .../GENERIC_STM32_G431XB/configs/mcuconf.h | 35 +++++- .../GENERIC_STM32_G474XE/configs/mcuconf.h | 37 +++++- .../GENERIC_STM32_L412XB/configs/mcuconf.h | 32 ++---- .../boards/QMK_PROTON_C/configs/chconf.h | 72 +++++++++++- .../boards/QMK_PROTON_C/configs/halconf.h | 22 +++- .../boards/QMK_PROTON_C/configs/mcuconf.h | 3 +- .../chibios/boards/common/configs/chconf.h | 72 +++++++++++- .../chibios/boards/common/configs/halconf.h | 22 +++- 15 files changed, 478 insertions(+), 272 deletions(-) diff --git a/keyboards/matrix/m20add/mcuconf.h b/keyboards/matrix/m20add/mcuconf.h index 54a1f2661324..00216f6908fd 100644 --- a/keyboards/matrix/m20add/mcuconf.h +++ b/keyboards/matrix/m20add/mcuconf.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2020 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -32,11 +32,15 @@ */ #define STM32F4xx_MCUCONF +#define STM32F411_MCUCONF /* * HAL driver system settings. */ #define STM32_NO_INIT FALSE +#define STM32_PVD_ENABLE FALSE +#define STM32_PLS STM32_PLS_LEV0 +#define STM32_BKPRAM_ENABLE FALSE #define STM32_HSI_ENABLED TRUE #define STM32_LSI_ENABLED TRUE #define STM32_HSE_ENABLED TRUE @@ -60,9 +64,6 @@ #define STM32_I2SSRC STM32_I2SSRC_CKIN #define STM32_PLLI2SN_VALUE 192 #define STM32_PLLI2SR_VALUE 5 -#define STM32_PVD_ENABLE FALSE -#define STM32_PLS STM32_PLS_LEV0 -#define STM32_BKPRAM_ENABLE FALSE /* * IRQ system settings. @@ -82,6 +83,19 @@ #define STM32_IRQ_EXTI21_PRIORITY 15 #define STM32_IRQ_EXTI22_PRIORITY 15 +#define STM32_IRQ_TIM1_BRK_TIM9_PRIORITY 7 +#define STM32_IRQ_TIM1_UP_TIM10_PRIORITY 7 +#define STM32_IRQ_TIM1_TRGCO_TIM11_PRIORITY 7 +#define STM32_IRQ_TIM1_CC_PRIORITY 7 +#define STM32_IRQ_TIM2_PRIORITY 7 +#define STM32_IRQ_TIM3_PRIORITY 7 +#define STM32_IRQ_TIM4_PRIORITY 7 +#define STM32_IRQ_TIM5_PRIORITY 7 + +#define STM32_IRQ_USART1_PRIORITY 12 +#define STM32_IRQ_USART2_PRIORITY 12 +#define STM32_IRQ_USART6_PRIORITY 12 + /* * ADC driver system settings. */ @@ -101,14 +115,8 @@ #define STM32_GPT_USE_TIM4 TRUE #define STM32_GPT_USE_TIM5 FALSE #define STM32_GPT_USE_TIM9 FALSE +#define STM32_GPT_USE_TIM10 FALSE #define STM32_GPT_USE_TIM11 FALSE -#define STM32_GPT_TIM1_IRQ_PRIORITY 7 -#define STM32_GPT_TIM2_IRQ_PRIORITY 7 -#define STM32_GPT_TIM3_IRQ_PRIORITY 7 -#define STM32_GPT_TIM4_IRQ_PRIORITY 7 -#define STM32_GPT_TIM5_IRQ_PRIORITY 7 -#define STM32_GPT_TIM9_IRQ_PRIORITY 7 -#define STM32_GPT_TIM11_IRQ_PRIORITY 7 /* * I2C driver system settings. @@ -155,29 +163,28 @@ #define STM32_ICU_USE_TIM4 FALSE #define STM32_ICU_USE_TIM5 FALSE #define STM32_ICU_USE_TIM9 FALSE -#define STM32_ICU_TIM1_IRQ_PRIORITY 7 -#define STM32_ICU_TIM2_IRQ_PRIORITY 7 -#define STM32_ICU_TIM3_IRQ_PRIORITY 7 -#define STM32_ICU_TIM4_IRQ_PRIORITY 7 -#define STM32_ICU_TIM5_IRQ_PRIORITY 7 -#define STM32_ICU_TIM9_IRQ_PRIORITY 7 +#define STM32_ICU_USE_TIM10 FALSE +#define STM32_ICU_USE_TIM11 FALSE /* * PWM driver system settings. */ -#define STM32_PWM_USE_ADVANCED FALSE #define STM32_PWM_USE_TIM1 FALSE #define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM3 FALSE #define STM32_PWM_USE_TIM4 FALSE #define STM32_PWM_USE_TIM5 FALSE #define STM32_PWM_USE_TIM9 FALSE -#define STM32_PWM_TIM1_IRQ_PRIORITY 7 -#define STM32_PWM_TIM2_IRQ_PRIORITY 7 -#define STM32_PWM_TIM3_IRQ_PRIORITY 7 -#define STM32_PWM_TIM4_IRQ_PRIORITY 7 -#define STM32_PWM_TIM5_IRQ_PRIORITY 7 -#define STM32_PWM_TIM9_IRQ_PRIORITY 7 +#define STM32_PWM_USE_TIM10 FALSE +#define STM32_PWM_USE_TIM11 FALSE + +/* + * RTC driver system settings. + */ +#define STM32_RTC_PRESA_VALUE 32 +#define STM32_RTC_PRESS_VALUE 1024 +#define STM32_RTC_CR_INIT 0 +#define STM32_RTC_TAMPCR_INIT 0 /* * SERIAL driver system settings. @@ -185,9 +192,6 @@ #define STM32_SERIAL_USE_USART1 FALSE #define STM32_SERIAL_USE_USART2 FALSE #define STM32_SERIAL_USE_USART6 FALSE -#define STM32_SERIAL_USART1_PRIORITY 12 -#define STM32_SERIAL_USART2_PRIORITY 12 -#define STM32_SERIAL_USART6_PRIORITY 12 /* * SPI driver system settings. @@ -227,9 +231,6 @@ #define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) #define STM32_UART_USART6_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) #define STM32_UART_USART6_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) -#define STM32_UART_USART1_IRQ_PRIORITY 12 -#define STM32_UART_USART2_IRQ_PRIORITY 12 -#define STM32_UART_USART6_IRQ_PRIORITY 12 #define STM32_UART_USART1_DMA_PRIORITY 0 #define STM32_UART_USART2_DMA_PRIORITY 0 #define STM32_UART_USART6_DMA_PRIORITY 0 @@ -241,9 +242,7 @@ #define STM32_USB_USE_OTG1 TRUE #define STM32_USB_OTG1_IRQ_PRIORITY 14 #define STM32_USB_OTG1_RX_FIFO_SIZE 512 -#define STM32_USB_OTG_THREAD_PRIO LOWPRIO -#define STM32_USB_OTG_THREAD_STACK_SIZE 128 -#define STM32_USB_OTGFIFO_FILL_BASEPRI 0 +#define STM32_USB_HOST_WAKEUP_DURATION 2 /* * WDG driver system settings. diff --git a/keyboards/matrix/noah/mcuconf.h b/keyboards/matrix/noah/mcuconf.h index 54a1f2661324..00216f6908fd 100644 --- a/keyboards/matrix/noah/mcuconf.h +++ b/keyboards/matrix/noah/mcuconf.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2020 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -32,11 +32,15 @@ */ #define STM32F4xx_MCUCONF +#define STM32F411_MCUCONF /* * HAL driver system settings. */ #define STM32_NO_INIT FALSE +#define STM32_PVD_ENABLE FALSE +#define STM32_PLS STM32_PLS_LEV0 +#define STM32_BKPRAM_ENABLE FALSE #define STM32_HSI_ENABLED TRUE #define STM32_LSI_ENABLED TRUE #define STM32_HSE_ENABLED TRUE @@ -60,9 +64,6 @@ #define STM32_I2SSRC STM32_I2SSRC_CKIN #define STM32_PLLI2SN_VALUE 192 #define STM32_PLLI2SR_VALUE 5 -#define STM32_PVD_ENABLE FALSE -#define STM32_PLS STM32_PLS_LEV0 -#define STM32_BKPRAM_ENABLE FALSE /* * IRQ system settings. @@ -82,6 +83,19 @@ #define STM32_IRQ_EXTI21_PRIORITY 15 #define STM32_IRQ_EXTI22_PRIORITY 15 +#define STM32_IRQ_TIM1_BRK_TIM9_PRIORITY 7 +#define STM32_IRQ_TIM1_UP_TIM10_PRIORITY 7 +#define STM32_IRQ_TIM1_TRGCO_TIM11_PRIORITY 7 +#define STM32_IRQ_TIM1_CC_PRIORITY 7 +#define STM32_IRQ_TIM2_PRIORITY 7 +#define STM32_IRQ_TIM3_PRIORITY 7 +#define STM32_IRQ_TIM4_PRIORITY 7 +#define STM32_IRQ_TIM5_PRIORITY 7 + +#define STM32_IRQ_USART1_PRIORITY 12 +#define STM32_IRQ_USART2_PRIORITY 12 +#define STM32_IRQ_USART6_PRIORITY 12 + /* * ADC driver system settings. */ @@ -101,14 +115,8 @@ #define STM32_GPT_USE_TIM4 TRUE #define STM32_GPT_USE_TIM5 FALSE #define STM32_GPT_USE_TIM9 FALSE +#define STM32_GPT_USE_TIM10 FALSE #define STM32_GPT_USE_TIM11 FALSE -#define STM32_GPT_TIM1_IRQ_PRIORITY 7 -#define STM32_GPT_TIM2_IRQ_PRIORITY 7 -#define STM32_GPT_TIM3_IRQ_PRIORITY 7 -#define STM32_GPT_TIM4_IRQ_PRIORITY 7 -#define STM32_GPT_TIM5_IRQ_PRIORITY 7 -#define STM32_GPT_TIM9_IRQ_PRIORITY 7 -#define STM32_GPT_TIM11_IRQ_PRIORITY 7 /* * I2C driver system settings. @@ -155,29 +163,28 @@ #define STM32_ICU_USE_TIM4 FALSE #define STM32_ICU_USE_TIM5 FALSE #define STM32_ICU_USE_TIM9 FALSE -#define STM32_ICU_TIM1_IRQ_PRIORITY 7 -#define STM32_ICU_TIM2_IRQ_PRIORITY 7 -#define STM32_ICU_TIM3_IRQ_PRIORITY 7 -#define STM32_ICU_TIM4_IRQ_PRIORITY 7 -#define STM32_ICU_TIM5_IRQ_PRIORITY 7 -#define STM32_ICU_TIM9_IRQ_PRIORITY 7 +#define STM32_ICU_USE_TIM10 FALSE +#define STM32_ICU_USE_TIM11 FALSE /* * PWM driver system settings. */ -#define STM32_PWM_USE_ADVANCED FALSE #define STM32_PWM_USE_TIM1 FALSE #define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM3 FALSE #define STM32_PWM_USE_TIM4 FALSE #define STM32_PWM_USE_TIM5 FALSE #define STM32_PWM_USE_TIM9 FALSE -#define STM32_PWM_TIM1_IRQ_PRIORITY 7 -#define STM32_PWM_TIM2_IRQ_PRIORITY 7 -#define STM32_PWM_TIM3_IRQ_PRIORITY 7 -#define STM32_PWM_TIM4_IRQ_PRIORITY 7 -#define STM32_PWM_TIM5_IRQ_PRIORITY 7 -#define STM32_PWM_TIM9_IRQ_PRIORITY 7 +#define STM32_PWM_USE_TIM10 FALSE +#define STM32_PWM_USE_TIM11 FALSE + +/* + * RTC driver system settings. + */ +#define STM32_RTC_PRESA_VALUE 32 +#define STM32_RTC_PRESS_VALUE 1024 +#define STM32_RTC_CR_INIT 0 +#define STM32_RTC_TAMPCR_INIT 0 /* * SERIAL driver system settings. @@ -185,9 +192,6 @@ #define STM32_SERIAL_USE_USART1 FALSE #define STM32_SERIAL_USE_USART2 FALSE #define STM32_SERIAL_USE_USART6 FALSE -#define STM32_SERIAL_USART1_PRIORITY 12 -#define STM32_SERIAL_USART2_PRIORITY 12 -#define STM32_SERIAL_USART6_PRIORITY 12 /* * SPI driver system settings. @@ -227,9 +231,6 @@ #define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) #define STM32_UART_USART6_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) #define STM32_UART_USART6_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) -#define STM32_UART_USART1_IRQ_PRIORITY 12 -#define STM32_UART_USART2_IRQ_PRIORITY 12 -#define STM32_UART_USART6_IRQ_PRIORITY 12 #define STM32_UART_USART1_DMA_PRIORITY 0 #define STM32_UART_USART2_DMA_PRIORITY 0 #define STM32_UART_USART6_DMA_PRIORITY 0 @@ -241,9 +242,7 @@ #define STM32_USB_USE_OTG1 TRUE #define STM32_USB_OTG1_IRQ_PRIORITY 14 #define STM32_USB_OTG1_RX_FIFO_SIZE 512 -#define STM32_USB_OTG_THREAD_PRIO LOWPRIO -#define STM32_USB_OTG_THREAD_STACK_SIZE 128 -#define STM32_USB_OTGFIFO_FILL_BASEPRI 0 +#define STM32_USB_HOST_WAKEUP_DURATION 2 /* * WDG driver system settings. diff --git a/platforms/chibios/boards/BLACKPILL_STM32_F401/configs/mcuconf.h b/platforms/chibios/boards/BLACKPILL_STM32_F401/configs/mcuconf.h index ba6e934fe7bd..a21fd7bd1286 100644 --- a/platforms/chibios/boards/BLACKPILL_STM32_F401/configs/mcuconf.h +++ b/platforms/chibios/boards/BLACKPILL_STM32_F401/configs/mcuconf.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2020 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -32,11 +32,15 @@ */ #define STM32F4xx_MCUCONF +#define STM32F401_MCUCONF /* * HAL driver system settings. */ #define STM32_NO_INIT FALSE +#define STM32_PVD_ENABLE FALSE +#define STM32_PLS STM32_PLS_LEV0 +#define STM32_BKPRAM_ENABLE FALSE #define STM32_HSI_ENABLED TRUE #define STM32_LSI_ENABLED TRUE #define STM32_HSE_ENABLED TRUE @@ -44,13 +48,13 @@ #define STM32_CLOCK48_REQUIRED TRUE #define STM32_SW STM32_SW_PLL #define STM32_PLLSRC STM32_PLLSRC_HSE -#define STM32_PLLM_VALUE 25 -#define STM32_PLLN_VALUE 336 -#define STM32_PLLP_VALUE 4 -#define STM32_PLLQ_VALUE 7 -#define STM32_HPRE STM32_HPRE_DIV1 -#define STM32_PPRE1 STM32_PPRE1_DIV4 -#define STM32_PPRE2 STM32_PPRE2_DIV2 +#define STM32_PLLM_VALUE 25 +#define STM32_PLLN_VALUE 336 +#define STM32_PLLP_VALUE 4 +#define STM32_PLLQ_VALUE 7 +#define STM32_HPRE STM32_HPRE_DIV1 +#define STM32_PPRE1 STM32_PPRE1_DIV4 +#define STM32_PPRE2 STM32_PPRE2_DIV2 #define STM32_RTCSEL STM32_RTCSEL_LSI #define STM32_RTCPRE_VALUE 8 #define STM32_MCO1SEL STM32_MCO1SEL_HSI @@ -60,9 +64,6 @@ #define STM32_I2SSRC STM32_I2SSRC_CKIN #define STM32_PLLI2SN_VALUE 192 #define STM32_PLLI2SR_VALUE 5 -#define STM32_PVD_ENABLE FALSE -#define STM32_PLS STM32_PLS_LEV0 -#define STM32_BKPRAM_ENABLE FALSE /* * IRQ system settings. @@ -82,6 +83,19 @@ #define STM32_IRQ_EXTI21_PRIORITY 15 #define STM32_IRQ_EXTI22_PRIORITY 15 +#define STM32_IRQ_TIM1_BRK_TIM9_PRIORITY 7 +#define STM32_IRQ_TIM1_UP_TIM10_PRIORITY 7 +#define STM32_IRQ_TIM1_TRGCO_TIM11_PRIORITY 7 +#define STM32_IRQ_TIM1_CC_PRIORITY 7 +#define STM32_IRQ_TIM2_PRIORITY 7 +#define STM32_IRQ_TIM3_PRIORITY 7 +#define STM32_IRQ_TIM4_PRIORITY 7 +#define STM32_IRQ_TIM5_PRIORITY 7 + +#define STM32_IRQ_USART1_PRIORITY 12 +#define STM32_IRQ_USART2_PRIORITY 12 +#define STM32_IRQ_USART6_PRIORITY 12 + /* * ADC driver system settings. */ @@ -101,14 +115,8 @@ #define STM32_GPT_USE_TIM4 FALSE #define STM32_GPT_USE_TIM5 FALSE #define STM32_GPT_USE_TIM9 FALSE +#define STM32_GPT_USE_TIM10 FALSE #define STM32_GPT_USE_TIM11 FALSE -#define STM32_GPT_TIM1_IRQ_PRIORITY 7 -#define STM32_GPT_TIM2_IRQ_PRIORITY 7 -#define STM32_GPT_TIM3_IRQ_PRIORITY 7 -#define STM32_GPT_TIM4_IRQ_PRIORITY 7 -#define STM32_GPT_TIM5_IRQ_PRIORITY 7 -#define STM32_GPT_TIM9_IRQ_PRIORITY 7 -#define STM32_GPT_TIM11_IRQ_PRIORITY 7 /* * I2C driver system settings. @@ -155,29 +163,20 @@ #define STM32_ICU_USE_TIM4 FALSE #define STM32_ICU_USE_TIM5 FALSE #define STM32_ICU_USE_TIM9 FALSE -#define STM32_ICU_TIM1_IRQ_PRIORITY 7 -#define STM32_ICU_TIM2_IRQ_PRIORITY 7 -#define STM32_ICU_TIM3_IRQ_PRIORITY 7 -#define STM32_ICU_TIM4_IRQ_PRIORITY 7 -#define STM32_ICU_TIM5_IRQ_PRIORITY 7 -#define STM32_ICU_TIM9_IRQ_PRIORITY 7 +#define STM32_ICU_USE_TIM10 FALSE +#define STM32_ICU_USE_TIM11 FALSE /* * PWM driver system settings. */ -#define STM32_PWM_USE_ADVANCED FALSE #define STM32_PWM_USE_TIM1 FALSE #define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM3 FALSE #define STM32_PWM_USE_TIM4 FALSE #define STM32_PWM_USE_TIM5 FALSE #define STM32_PWM_USE_TIM9 FALSE -#define STM32_PWM_TIM1_IRQ_PRIORITY 7 -#define STM32_PWM_TIM2_IRQ_PRIORITY 7 -#define STM32_PWM_TIM3_IRQ_PRIORITY 7 -#define STM32_PWM_TIM4_IRQ_PRIORITY 7 -#define STM32_PWM_TIM5_IRQ_PRIORITY 7 -#define STM32_PWM_TIM9_IRQ_PRIORITY 7 +#define STM32_PWM_USE_TIM10 FALSE +#define STM32_PWM_USE_TIM11 FALSE /* * SERIAL driver system settings. @@ -185,9 +184,6 @@ #define STM32_SERIAL_USE_USART1 FALSE #define STM32_SERIAL_USE_USART2 FALSE #define STM32_SERIAL_USE_USART6 FALSE -#define STM32_SERIAL_USART1_PRIORITY 12 -#define STM32_SERIAL_USART2_PRIORITY 12 -#define STM32_SERIAL_USART6_PRIORITY 12 /* * SPI driver system settings. @@ -227,9 +223,6 @@ #define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) #define STM32_UART_USART6_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) #define STM32_UART_USART6_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) -#define STM32_UART_USART1_IRQ_PRIORITY 12 -#define STM32_UART_USART2_IRQ_PRIORITY 12 -#define STM32_UART_USART6_IRQ_PRIORITY 12 #define STM32_UART_USART1_DMA_PRIORITY 0 #define STM32_UART_USART2_DMA_PRIORITY 0 #define STM32_UART_USART6_DMA_PRIORITY 0 @@ -241,9 +234,7 @@ #define STM32_USB_USE_OTG1 TRUE #define STM32_USB_OTG1_IRQ_PRIORITY 14 #define STM32_USB_OTG1_RX_FIFO_SIZE 512 -#define STM32_USB_OTG_THREAD_PRIO NORMALPRIO+1 -#define STM32_USB_OTG_THREAD_STACK_SIZE 128 -#define STM32_USB_OTGFIFO_FILL_BASEPRI 0 +#define STM32_USB_HOST_WAKEUP_DURATION 2 /* * WDG driver system settings. diff --git a/platforms/chibios/boards/BLACKPILL_STM32_F411/configs/mcuconf.h b/platforms/chibios/boards/BLACKPILL_STM32_F411/configs/mcuconf.h index 0394ff56bb97..131c847661cf 100644 --- a/platforms/chibios/boards/BLACKPILL_STM32_F411/configs/mcuconf.h +++ b/platforms/chibios/boards/BLACKPILL_STM32_F411/configs/mcuconf.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2020 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -32,11 +32,15 @@ */ #define STM32F4xx_MCUCONF +#define STM32F411_MCUCONF /* * HAL driver system settings. */ #define STM32_NO_INIT FALSE +#define STM32_PVD_ENABLE FALSE +#define STM32_PLS STM32_PLS_LEV0 +#define STM32_BKPRAM_ENABLE FALSE #define STM32_HSI_ENABLED TRUE #define STM32_LSI_ENABLED TRUE #define STM32_HSE_ENABLED TRUE @@ -60,9 +64,6 @@ #define STM32_I2SSRC STM32_I2SSRC_CKIN #define STM32_PLLI2SN_VALUE 192 #define STM32_PLLI2SR_VALUE 5 -#define STM32_PVD_ENABLE FALSE -#define STM32_PLS STM32_PLS_LEV0 -#define STM32_BKPRAM_ENABLE FALSE /* * IRQ system settings. @@ -82,6 +83,19 @@ #define STM32_IRQ_EXTI21_PRIORITY 15 #define STM32_IRQ_EXTI22_PRIORITY 15 +#define STM32_IRQ_TIM1_BRK_TIM9_PRIORITY 7 +#define STM32_IRQ_TIM1_UP_TIM10_PRIORITY 7 +#define STM32_IRQ_TIM1_TRGCO_TIM11_PRIORITY 7 +#define STM32_IRQ_TIM1_CC_PRIORITY 7 +#define STM32_IRQ_TIM2_PRIORITY 7 +#define STM32_IRQ_TIM3_PRIORITY 7 +#define STM32_IRQ_TIM4_PRIORITY 7 +#define STM32_IRQ_TIM5_PRIORITY 7 + +#define STM32_IRQ_USART1_PRIORITY 12 +#define STM32_IRQ_USART2_PRIORITY 12 +#define STM32_IRQ_USART6_PRIORITY 12 + /* * ADC driver system settings. */ @@ -101,14 +115,8 @@ #define STM32_GPT_USE_TIM4 FALSE #define STM32_GPT_USE_TIM5 FALSE #define STM32_GPT_USE_TIM9 FALSE +#define STM32_GPT_USE_TIM10 FALSE #define STM32_GPT_USE_TIM11 FALSE -#define STM32_GPT_TIM1_IRQ_PRIORITY 7 -#define STM32_GPT_TIM2_IRQ_PRIORITY 7 -#define STM32_GPT_TIM3_IRQ_PRIORITY 7 -#define STM32_GPT_TIM4_IRQ_PRIORITY 7 -#define STM32_GPT_TIM5_IRQ_PRIORITY 7 -#define STM32_GPT_TIM9_IRQ_PRIORITY 7 -#define STM32_GPT_TIM11_IRQ_PRIORITY 7 /* * I2C driver system settings. @@ -155,29 +163,28 @@ #define STM32_ICU_USE_TIM4 FALSE #define STM32_ICU_USE_TIM5 FALSE #define STM32_ICU_USE_TIM9 FALSE -#define STM32_ICU_TIM1_IRQ_PRIORITY 7 -#define STM32_ICU_TIM2_IRQ_PRIORITY 7 -#define STM32_ICU_TIM3_IRQ_PRIORITY 7 -#define STM32_ICU_TIM4_IRQ_PRIORITY 7 -#define STM32_ICU_TIM5_IRQ_PRIORITY 7 -#define STM32_ICU_TIM9_IRQ_PRIORITY 7 +#define STM32_ICU_USE_TIM10 FALSE +#define STM32_ICU_USE_TIM11 FALSE /* * PWM driver system settings. */ -#define STM32_PWM_USE_ADVANCED FALSE #define STM32_PWM_USE_TIM1 FALSE #define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM3 FALSE #define STM32_PWM_USE_TIM4 FALSE #define STM32_PWM_USE_TIM5 FALSE #define STM32_PWM_USE_TIM9 FALSE -#define STM32_PWM_TIM1_IRQ_PRIORITY 7 -#define STM32_PWM_TIM2_IRQ_PRIORITY 7 -#define STM32_PWM_TIM3_IRQ_PRIORITY 7 -#define STM32_PWM_TIM4_IRQ_PRIORITY 7 -#define STM32_PWM_TIM5_IRQ_PRIORITY 7 -#define STM32_PWM_TIM9_IRQ_PRIORITY 7 +#define STM32_PWM_USE_TIM10 FALSE +#define STM32_PWM_USE_TIM11 FALSE + +/* + * RTC driver system settings. + */ +#define STM32_RTC_PRESA_VALUE 32 +#define STM32_RTC_PRESS_VALUE 1024 +#define STM32_RTC_CR_INIT 0 +#define STM32_RTC_TAMPCR_INIT 0 /* * SERIAL driver system settings. @@ -185,9 +192,6 @@ #define STM32_SERIAL_USE_USART1 FALSE #define STM32_SERIAL_USE_USART2 FALSE #define STM32_SERIAL_USE_USART6 FALSE -#define STM32_SERIAL_USART1_PRIORITY 12 -#define STM32_SERIAL_USART2_PRIORITY 12 -#define STM32_SERIAL_USART6_PRIORITY 12 /* * SPI driver system settings. @@ -227,9 +231,6 @@ #define STM32_UART_USART2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6) #define STM32_UART_USART6_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) #define STM32_UART_USART6_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) -#define STM32_UART_USART1_IRQ_PRIORITY 12 -#define STM32_UART_USART2_IRQ_PRIORITY 12 -#define STM32_UART_USART6_IRQ_PRIORITY 12 #define STM32_UART_USART1_DMA_PRIORITY 0 #define STM32_UART_USART2_DMA_PRIORITY 0 #define STM32_UART_USART6_DMA_PRIORITY 0 @@ -241,9 +242,7 @@ #define STM32_USB_USE_OTG1 TRUE #define STM32_USB_OTG1_IRQ_PRIORITY 14 #define STM32_USB_OTG1_RX_FIFO_SIZE 512 -#define STM32_USB_OTG_THREAD_PRIO NORMALPRIO+1 -#define STM32_USB_OTG_THREAD_STACK_SIZE 128 -#define STM32_USB_OTGFIFO_FILL_BASEPRI 0 +#define STM32_USB_HOST_WAKEUP_DURATION 2 /* * WDG driver system settings. diff --git a/platforms/chibios/boards/GENERIC_STM32_F303XC/configs/mcuconf.h b/platforms/chibios/boards/GENERIC_STM32_F303XC/configs/mcuconf.h index c6f5a8ac5201..e0af4a276bfb 100644 --- a/platforms/chibios/boards/GENERIC_STM32_F303XC/configs/mcuconf.h +++ b/platforms/chibios/boards/GENERIC_STM32_F303XC/configs/mcuconf.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2020 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -186,7 +186,6 @@ /* * PWM driver system settings. */ -#define STM32_PWM_USE_ADVANCED FALSE #define STM32_PWM_USE_TIM1 FALSE #define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM3 FALSE diff --git a/platforms/chibios/boards/GENERIC_STM32_F407XE/configs/mcuconf.h b/platforms/chibios/boards/GENERIC_STM32_F407XE/configs/mcuconf.h index 4be47fe1b048..07399ad2f739 100644 --- a/platforms/chibios/boards/GENERIC_STM32_F407XE/configs/mcuconf.h +++ b/platforms/chibios/boards/GENERIC_STM32_F407XE/configs/mcuconf.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2020 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -86,6 +86,28 @@ #define STM32_IRQ_EXTI21_PRIORITY 15 #define STM32_IRQ_EXTI22_PRIORITY 15 +#define STM32_IRQ_TIM1_BRK_TIM9_PRIORITY 7 +#define STM32_IRQ_TIM1_UP_TIM10_PRIORITY 7 +#define STM32_IRQ_TIM1_TRGCO_TIM11_PRIORITY 7 +#define STM32_IRQ_TIM1_CC_PRIORITY 7 +#define STM32_IRQ_TIM2_PRIORITY 7 +#define STM32_IRQ_TIM3_PRIORITY 7 +#define STM32_IRQ_TIM4_PRIORITY 7 +#define STM32_IRQ_TIM5_PRIORITY 7 +#define STM32_IRQ_TIM6_PRIORITY 7 +#define STM32_IRQ_TIM7_PRIORITY 7 +#define STM32_IRQ_TIM8_BRK_TIM12_PRIORITY 7 +#define STM32_IRQ_TIM8_UP_TIM13_PRIORITY 7 +#define STM32_IRQ_TIM8_TRGCO_TIM14_PRIORITY 7 +#define STM32_IRQ_TIM8_CC_PRIORITY 7 + +#define STM32_IRQ_USART1_PRIORITY 12 +#define STM32_IRQ_USART2_PRIORITY 12 +#define STM32_IRQ_USART3_PRIORITY 12 +#define STM32_IRQ_UART4_PRIORITY 12 +#define STM32_IRQ_UART5_PRIORITY 12 +#define STM32_IRQ_USART6_PRIORITY 12 + /* * ADC driver system settings. */ @@ -137,21 +159,11 @@ #define STM32_GPT_USE_TIM7 FALSE #define STM32_GPT_USE_TIM8 FALSE #define STM32_GPT_USE_TIM9 FALSE +#define STM32_GPT_USE_TIM10 FALSE #define STM32_GPT_USE_TIM11 FALSE #define STM32_GPT_USE_TIM12 FALSE +#define STM32_GPT_USE_TIM13 FALSE #define STM32_GPT_USE_TIM14 FALSE -#define STM32_GPT_TIM1_IRQ_PRIORITY 7 -#define STM32_GPT_TIM2_IRQ_PRIORITY 7 -#define STM32_GPT_TIM3_IRQ_PRIORITY 7 -#define STM32_GPT_TIM4_IRQ_PRIORITY 7 -#define STM32_GPT_TIM5_IRQ_PRIORITY 7 -#define STM32_GPT_TIM6_IRQ_PRIORITY 7 -#define STM32_GPT_TIM7_IRQ_PRIORITY 7 -#define STM32_GPT_TIM8_IRQ_PRIORITY 7 -#define STM32_GPT_TIM9_IRQ_PRIORITY 7 -#define STM32_GPT_TIM11_IRQ_PRIORITY 7 -#define STM32_GPT_TIM12_IRQ_PRIORITY 7 -#define STM32_GPT_TIM14_IRQ_PRIORITY 7 /* * I2C driver system settings. @@ -199,13 +211,11 @@ #define STM32_ICU_USE_TIM5 FALSE #define STM32_ICU_USE_TIM8 FALSE #define STM32_ICU_USE_TIM9 FALSE -#define STM32_ICU_TIM1_IRQ_PRIORITY 7 -#define STM32_ICU_TIM2_IRQ_PRIORITY 7 -#define STM32_ICU_TIM3_IRQ_PRIORITY 7 -#define STM32_ICU_TIM4_IRQ_PRIORITY 7 -#define STM32_ICU_TIM5_IRQ_PRIORITY 7 -#define STM32_ICU_TIM8_IRQ_PRIORITY 7 -#define STM32_ICU_TIM9_IRQ_PRIORITY 7 +#define STM32_ICU_USE_TIM10 FALSE +#define STM32_ICU_USE_TIM11 FALSE +#define STM32_ICU_USE_TIM12 FALSE +#define STM32_ICU_USE_TIM13 FALSE +#define STM32_ICU_USE_TIM14 FALSE /* * MAC driver system settings. @@ -221,7 +231,6 @@ /* * PWM driver system settings. */ -#define STM32_PWM_USE_ADVANCED FALSE #define STM32_PWM_USE_TIM1 FALSE #define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM3 FALSE @@ -229,13 +238,11 @@ #define STM32_PWM_USE_TIM5 FALSE #define STM32_PWM_USE_TIM8 FALSE #define STM32_PWM_USE_TIM9 FALSE -#define STM32_PWM_TIM1_IRQ_PRIORITY 7 -#define STM32_PWM_TIM2_IRQ_PRIORITY 7 -#define STM32_PWM_TIM3_IRQ_PRIORITY 7 -#define STM32_PWM_TIM4_IRQ_PRIORITY 7 -#define STM32_PWM_TIM5_IRQ_PRIORITY 7 -#define STM32_PWM_TIM8_IRQ_PRIORITY 7 -#define STM32_PWM_TIM9_IRQ_PRIORITY 7 +#define STM32_PWM_USE_TIM10 FALSE +#define STM32_PWM_USE_TIM11 FALSE +#define STM32_PWM_USE_TIM12 FALSE +#define STM32_PWM_USE_TIM13 FALSE +#define STM32_PWM_USE_TIM14 FALSE /* * RTC driver system settings. @@ -265,12 +272,6 @@ #define STM32_SERIAL_USE_UART4 FALSE #define STM32_SERIAL_USE_UART5 FALSE #define STM32_SERIAL_USE_USART6 FALSE -#define STM32_SERIAL_USART1_PRIORITY 12 -#define STM32_SERIAL_USART2_PRIORITY 12 -#define STM32_SERIAL_USART3_PRIORITY 12 -#define STM32_SERIAL_UART4_PRIORITY 12 -#define STM32_SERIAL_UART5_PRIORITY 12 -#define STM32_SERIAL_USART6_PRIORITY 12 /* * SPI driver system settings. @@ -319,12 +320,6 @@ #define STM32_UART_UART5_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) #define STM32_UART_USART6_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) #define STM32_UART_USART6_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) -#define STM32_UART_USART1_IRQ_PRIORITY 12 -#define STM32_UART_USART2_IRQ_PRIORITY 12 -#define STM32_UART_USART3_IRQ_PRIORITY 12 -#define STM32_UART_UART4_IRQ_PRIORITY 12 -#define STM32_UART_UART5_IRQ_PRIORITY 12 -#define STM32_UART_USART6_IRQ_PRIORITY 12 #define STM32_UART_USART1_DMA_PRIORITY 0 #define STM32_UART_USART2_DMA_PRIORITY 0 #define STM32_UART_USART3_DMA_PRIORITY 0 @@ -344,9 +339,6 @@ #define STM32_USB_OTG2_RX_FIFO_SIZE 1024 #define STM32_USB_HOST_WAKEUP_DURATION 2 -#define STM32_USB_OTG_THREAD_PRIO NORMALPRIO+1 -#define STM32_USB_OTG_THREAD_STACK_SIZE 128 - /* * WDG driver system settings. */ diff --git a/platforms/chibios/boards/GENERIC_STM32_F446XE/configs/mcuconf.h b/platforms/chibios/boards/GENERIC_STM32_F446XE/configs/mcuconf.h index d2de75590ed7..566c146c259f 100644 --- a/platforms/chibios/boards/GENERIC_STM32_F446XE/configs/mcuconf.h +++ b/platforms/chibios/boards/GENERIC_STM32_F446XE/configs/mcuconf.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2020 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -32,11 +32,15 @@ */ #define STM32F4xx_MCUCONF +#define STM32F446_MCUCONF /* * HAL driver system settings. */ #define STM32_NO_INIT FALSE +#define STM32_PVD_ENABLE FALSE +#define STM32_PLS STM32_PLS_LEV0 +#define STM32_BKPRAM_ENABLE FALSE #define STM32_HSI_ENABLED FALSE #define STM32_LSI_ENABLED TRUE #define STM32_HSE_ENABLED TRUE @@ -70,9 +74,6 @@ #define STM32_SAI1SEL STM32_SAI2SEL_PLLR #define STM32_SAI2SEL STM32_SAI2SEL_PLLR #define STM32_CK48MSEL STM32_CK48MSEL_PLLALT -#define STM32_PVD_ENABLE FALSE -#define STM32_PLS STM32_PLS_LEV0 -#define STM32_BKPRAM_ENABLE FALSE /* * IRQ system settings. @@ -92,6 +93,30 @@ #define STM32_IRQ_EXTI21_PRIORITY 15 #define STM32_IRQ_EXTI22_PRIORITY 15 +#define STM32_IRQ_TIM1_BRK_TIM9_PRIORITY 7 +#define STM32_IRQ_TIM1_UP_TIM10_PRIORITY 7 +#define STM32_IRQ_TIM1_TRGCO_TIM11_PRIORITY 7 +#define STM32_IRQ_TIM1_CC_PRIORITY 7 +#define STM32_IRQ_TIM2_PRIORITY 7 +#define STM32_IRQ_TIM3_PRIORITY 7 +#define STM32_IRQ_TIM4_PRIORITY 7 +#define STM32_IRQ_TIM5_PRIORITY 7 +#define STM32_IRQ_TIM6_PRIORITY 7 +#define STM32_IRQ_TIM7_PRIORITY 7 +#define STM32_IRQ_TIM8_BRK_TIM12_PRIORITY 7 +#define STM32_IRQ_TIM8_UP_TIM13_PRIORITY 7 +#define STM32_IRQ_TIM8_TRGCO_TIM14_PRIORITY 7 +#define STM32_IRQ_TIM8_CC_PRIORITY 7 + +#define STM32_IRQ_USART1_PRIORITY 12 +#define STM32_IRQ_USART2_PRIORITY 12 +#define STM32_IRQ_USART3_PRIORITY 12 +#define STM32_IRQ_UART4_PRIORITY 12 +#define STM32_IRQ_UART5_PRIORITY 12 +#define STM32_IRQ_USART6_PRIORITY 12 +#define STM32_IRQ_UART7_PRIORITY 12 +#define STM32_IRQ_UART8_PRIORITY 12 + /* * ADC driver system settings. */ @@ -143,21 +168,11 @@ #define STM32_GPT_USE_TIM7 FALSE #define STM32_GPT_USE_TIM8 FALSE #define STM32_GPT_USE_TIM9 FALSE +#define STM32_GPT_USE_TIM10 FALSE #define STM32_GPT_USE_TIM11 FALSE #define STM32_GPT_USE_TIM12 FALSE +#define STM32_GPT_USE_TIM13 FALSE #define STM32_GPT_USE_TIM14 FALSE -#define STM32_GPT_TIM1_IRQ_PRIORITY 7 -#define STM32_GPT_TIM2_IRQ_PRIORITY 7 -#define STM32_GPT_TIM3_IRQ_PRIORITY 7 -#define STM32_GPT_TIM4_IRQ_PRIORITY 7 -#define STM32_GPT_TIM5_IRQ_PRIORITY 7 -#define STM32_GPT_TIM6_IRQ_PRIORITY 7 -#define STM32_GPT_TIM7_IRQ_PRIORITY 7 -#define STM32_GPT_TIM8_IRQ_PRIORITY 7 -#define STM32_GPT_TIM9_IRQ_PRIORITY 7 -#define STM32_GPT_TIM11_IRQ_PRIORITY 7 -#define STM32_GPT_TIM12_IRQ_PRIORITY 7 -#define STM32_GPT_TIM14_IRQ_PRIORITY 7 /* * I2C driver system settings. @@ -205,13 +220,11 @@ #define STM32_ICU_USE_TIM5 FALSE #define STM32_ICU_USE_TIM8 FALSE #define STM32_ICU_USE_TIM9 FALSE -#define STM32_ICU_TIM1_IRQ_PRIORITY 7 -#define STM32_ICU_TIM2_IRQ_PRIORITY 7 -#define STM32_ICU_TIM3_IRQ_PRIORITY 7 -#define STM32_ICU_TIM4_IRQ_PRIORITY 7 -#define STM32_ICU_TIM5_IRQ_PRIORITY 7 -#define STM32_ICU_TIM8_IRQ_PRIORITY 7 -#define STM32_ICU_TIM9_IRQ_PRIORITY 7 +#define STM32_ICU_USE_TIM10 FALSE +#define STM32_ICU_USE_TIM11 FALSE +#define STM32_ICU_USE_TIM12 FALSE +#define STM32_ICU_USE_TIM13 FALSE +#define STM32_ICU_USE_TIM14 FALSE /* * MAC driver system settings. @@ -227,7 +240,6 @@ /* * PWM driver system settings. */ -#define STM32_PWM_USE_ADVANCED FALSE #define STM32_PWM_USE_TIM1 FALSE #define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM3 FALSE @@ -235,13 +247,19 @@ #define STM32_PWM_USE_TIM5 FALSE #define STM32_PWM_USE_TIM8 FALSE #define STM32_PWM_USE_TIM9 FALSE -#define STM32_PWM_TIM1_IRQ_PRIORITY 7 -#define STM32_PWM_TIM2_IRQ_PRIORITY 7 -#define STM32_PWM_TIM3_IRQ_PRIORITY 7 -#define STM32_PWM_TIM4_IRQ_PRIORITY 7 -#define STM32_PWM_TIM5_IRQ_PRIORITY 7 -#define STM32_PWM_TIM8_IRQ_PRIORITY 7 -#define STM32_PWM_TIM9_IRQ_PRIORITY 7 +#define STM32_PWM_USE_TIM10 FALSE +#define STM32_PWM_USE_TIM11 FALSE +#define STM32_PWM_USE_TIM12 FALSE +#define STM32_PWM_USE_TIM13 FALSE +#define STM32_PWM_USE_TIM14 FALSE + +/* + * RTC driver system settings. + */ +#define STM32_RTC_PRESA_VALUE 32 +#define STM32_RTC_PRESS_VALUE 1024 +#define STM32_RTC_CR_INIT 0 +#define STM32_RTC_TAMPCR_INIT 0 /* * SDC driver system settings. @@ -265,14 +283,6 @@ #define STM32_SERIAL_USE_USART6 FALSE #define STM32_SERIAL_USE_UART7 FALSE #define STM32_SERIAL_USE_UART8 FALSE -#define STM32_SERIAL_USART1_PRIORITY 12 -#define STM32_SERIAL_USART2_PRIORITY 12 -#define STM32_SERIAL_USART3_PRIORITY 12 -#define STM32_SERIAL_UART4_PRIORITY 12 -#define STM32_SERIAL_UART5_PRIORITY 12 -#define STM32_SERIAL_USART6_PRIORITY 12 -#define STM32_SERIAL_UART7_PRIORITY 12 -#define STM32_SERIAL_UART8_PRIORITY 12 /* * SPI driver system settings. @@ -281,6 +291,8 @@ #define STM32_SPI_USE_SPI2 FALSE #define STM32_SPI_USE_SPI3 FALSE #define STM32_SPI_USE_SPI4 FALSE +#define STM32_SPI_USE_SPI5 FALSE +#define STM32_SPI_USE_SPI6 FALSE #define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 0) #define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 3) #define STM32_SPI_SPI2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 3) @@ -289,14 +301,22 @@ #define STM32_SPI_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) #define STM32_SPI_SPI4_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 0) #define STM32_SPI_SPI4_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 1) +#define STM32_SPI_SPI5_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 3) +#define STM32_SPI_SPI5_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 4) +#define STM32_SPI_SPI6_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 6) +#define STM32_SPI_SPI6_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 5) #define STM32_SPI_SPI1_DMA_PRIORITY 1 #define STM32_SPI_SPI2_DMA_PRIORITY 1 #define STM32_SPI_SPI3_DMA_PRIORITY 1 #define STM32_SPI_SPI4_DMA_PRIORITY 1 +#define STM32_SPI_SPI5_DMA_PRIORITY 1 +#define STM32_SPI_SPI6_DMA_PRIORITY 1 #define STM32_SPI_SPI1_IRQ_PRIORITY 10 #define STM32_SPI_SPI2_IRQ_PRIORITY 10 #define STM32_SPI_SPI3_IRQ_PRIORITY 10 #define STM32_SPI_SPI4_IRQ_PRIORITY 10 +#define STM32_SPI_SPI5_IRQ_PRIORITY 10 +#define STM32_SPI_SPI6_IRQ_PRIORITY 10 #define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure") /* @@ -326,12 +346,6 @@ #define STM32_UART_UART5_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) #define STM32_UART_USART6_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) #define STM32_UART_USART6_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) -#define STM32_UART_USART1_IRQ_PRIORITY 12 -#define STM32_UART_USART2_IRQ_PRIORITY 12 -#define STM32_UART_USART3_IRQ_PRIORITY 12 -#define STM32_UART_UART4_IRQ_PRIORITY 12 -#define STM32_UART_UART5_IRQ_PRIORITY 12 -#define STM32_UART_USART6_IRQ_PRIORITY 12 #define STM32_UART_USART1_DMA_PRIORITY 0 #define STM32_UART_USART2_DMA_PRIORITY 0 #define STM32_UART_USART3_DMA_PRIORITY 0 @@ -349,9 +363,7 @@ #define STM32_USB_OTG2_IRQ_PRIORITY 14 #define STM32_USB_OTG1_RX_FIFO_SIZE 512 #define STM32_USB_OTG2_RX_FIFO_SIZE 1024 -#define STM32_USB_OTG_THREAD_PRIO LOWPRIO -#define STM32_USB_OTG_THREAD_STACK_SIZE 128 -#define STM32_USB_OTGFIFO_FILL_BASEPRI 0 +#define STM32_USB_HOST_WAKEUP_DURATION 2 /* * WDG driver system settings. diff --git a/platforms/chibios/boards/GENERIC_STM32_G431XB/configs/mcuconf.h b/platforms/chibios/boards/GENERIC_STM32_G431XB/configs/mcuconf.h index 182d4885d7d7..fd00280115c5 100644 --- a/platforms/chibios/boards/GENERIC_STM32_G431XB/configs/mcuconf.h +++ b/platforms/chibios/boards/GENERIC_STM32_G431XB/configs/mcuconf.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2020 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -39,10 +39,26 @@ * HAL driver system settings. */ #define STM32_NO_INIT FALSE +#define STM32_CLOCK_DYNAMIC FALSE #define STM32_VOS STM32_VOS_RANGE1 +#define STM32_PWR_BOOST TRUE #define STM32_PWR_CR2 (PWR_CR2_PLS_LEV0) #define STM32_PWR_CR3 (PWR_CR3_EIWF) #define STM32_PWR_CR4 (0U) +#define STM32_PWR_PUCRA (0U) +#define STM32_PWR_PDCRA (0U) +#define STM32_PWR_PUCRB (0U) +#define STM32_PWR_PDCRB (0U) +#define STM32_PWR_PUCRC (0U) +#define STM32_PWR_PDCRC (0U) +#define STM32_PWR_PUCRD (0U) +#define STM32_PWR_PDCRD (0U) +#define STM32_PWR_PUCRE (0U) +#define STM32_PWR_PDCRE (0U) +#define STM32_PWR_PUCRF (0U) +#define STM32_PWR_PDCRF (0U) +#define STM32_PWR_PUCRG (0U) +#define STM32_PWR_PDCRG (0U) #define STM32_HSI16_ENABLED TRUE #define STM32_HSI48_ENABLED TRUE #define STM32_HSE_ENABLED FALSE @@ -212,7 +228,6 @@ /* * PWM driver system settings. */ -#define STM32_PWM_USE_ADVANCED FALSE #define STM32_PWM_USE_TIM1 FALSE #define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM3 FALSE @@ -225,6 +240,13 @@ /* * RTC driver system settings. */ +#define STM32_RTC_PRESA_VALUE 32 +#define STM32_RTC_PRESS_VALUE 1024 +#define STM32_RTC_CR_INIT 0 +#define STM32_TAMP_CR1_INIT 0 +#define STM32_TAMP_CR2_INIT 0 +#define STM32_TAMP_FLTCR_INIT 0 +#define STM32_TAMP_IER_INIT 0 /* * SDC driver system settings. @@ -239,6 +261,15 @@ #define STM32_SERIAL_USE_UART4 FALSE #define STM32_SERIAL_USE_LPUART1 FALSE +/* + * SIO driver system settings. + */ +#define STM32_SIO_USE_USART1 FALSE +#define STM32_SIO_USE_USART2 FALSE +#define STM32_SIO_USE_USART3 FALSE +#define STM32_SIO_USE_UART4 FALSE +#define STM32_SIO_USE_LPUART1 FALSE + /* * SPI driver system settings. */ diff --git a/platforms/chibios/boards/GENERIC_STM32_G474XE/configs/mcuconf.h b/platforms/chibios/boards/GENERIC_STM32_G474XE/configs/mcuconf.h index 117e920e3b32..d6385da6249d 100644 --- a/platforms/chibios/boards/GENERIC_STM32_G474XE/configs/mcuconf.h +++ b/platforms/chibios/boards/GENERIC_STM32_G474XE/configs/mcuconf.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2020 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -41,10 +41,26 @@ * HAL driver system settings. */ #define STM32_NO_INIT FALSE +#define STM32_CLOCK_DYNAMIC FALSE #define STM32_VOS STM32_VOS_RANGE1 +#define STM32_PWR_BOOST TRUE #define STM32_PWR_CR2 (PWR_CR2_PLS_LEV0) #define STM32_PWR_CR3 (PWR_CR3_EIWF) #define STM32_PWR_CR4 (0U) +#define STM32_PWR_PUCRA (0U) +#define STM32_PWR_PDCRA (0U) +#define STM32_PWR_PUCRB (0U) +#define STM32_PWR_PDCRB (0U) +#define STM32_PWR_PUCRC (0U) +#define STM32_PWR_PDCRC (0U) +#define STM32_PWR_PUCRD (0U) +#define STM32_PWR_PDCRD (0U) +#define STM32_PWR_PUCRE (0U) +#define STM32_PWR_PDCRE (0U) +#define STM32_PWR_PUCRF (0U) +#define STM32_PWR_PDCRF (0U) +#define STM32_PWR_PUCRG (0U) +#define STM32_PWR_PDCRG (0U) #define STM32_HSI16_ENABLED TRUE #define STM32_HSI48_ENABLED TRUE #define STM32_HSE_ENABLED FALSE @@ -259,7 +275,6 @@ /* * PWM driver system settings. */ -#define STM32_PWM_USE_ADVANCED FALSE #define STM32_PWM_USE_TIM1 FALSE #define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM3 FALSE @@ -274,6 +289,13 @@ /* * RTC driver system settings. */ +#define STM32_RTC_PRESA_VALUE 32 +#define STM32_RTC_PRESS_VALUE 1024 +#define STM32_RTC_CR_INIT 0 +#define STM32_TAMP_CR1_INIT 0 +#define STM32_TAMP_CR2_INIT 0 +#define STM32_TAMP_FLTCR_INIT 0 +#define STM32_TAMP_IER_INIT 0 /* * SDC driver system settings. @@ -289,6 +311,16 @@ #define STM32_SERIAL_USE_UART5 FALSE #define STM32_SERIAL_USE_LPUART1 FALSE +/* + * SIO driver system settings. + */ +#define STM32_SIO_USE_USART1 FALSE +#define STM32_SIO_USE_USART2 FALSE +#define STM32_SIO_USE_USART3 FALSE +#define STM32_SIO_USE_UART4 FALSE +#define STM32_SIO_USE_UART5 FALSE +#define STM32_SIO_USE_LPUART1 FALSE + /* * SPI driver system settings. */ @@ -368,5 +400,6 @@ */ #define STM32_WSPI_USE_QUADSPI1 FALSE #define STM32_WSPI_QUADSPI1_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) +#define STM32_WSPI_QUADSPI1_PRESCALER_VALUE 1 #endif /* MCUCONF_H */ diff --git a/platforms/chibios/boards/GENERIC_STM32_L412XB/configs/mcuconf.h b/platforms/chibios/boards/GENERIC_STM32_L412XB/configs/mcuconf.h index 8ad5a8da2163..745a3d13debb 100644 --- a/platforms/chibios/boards/GENERIC_STM32_L412XB/configs/mcuconf.h +++ b/platforms/chibios/boards/GENERIC_STM32_L412XB/configs/mcuconf.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2020 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -32,12 +32,8 @@ #define MCUCONF_H #define STM32L4xx_MCUCONF -#define STM32L412_MCUCONF -#define STM32L422_MCUCONF #define STM32L432_MCUCONF #define STM32L433_MCUCONF -#define STM32L442_MCUCONF -#define STM32L443_MCUCONF /* * HAL driver system settings. @@ -52,16 +48,13 @@ #define STM32_HSE_ENABLED FALSE #define STM32_LSE_ENABLED FALSE #define STM32_MSIPLL_ENABLED FALSE -#define STM32_ADC_CLOCK_ENABLED TRUE -#define STM32_USB_CLOCK_ENABLED TRUE -#define STM32_SAI1_CLOCK_ENABLED TRUE -#define STM32_SAI2_CLOCK_ENABLED TRUE #define STM32_MSIRANGE STM32_MSIRANGE_4M #define STM32_MSISRANGE STM32_MSISRANGE_4M #define STM32_SW STM32_SW_PLL #define STM32_PLLSRC STM32_PLLSRC_HSI16 #define STM32_PLLM_VALUE 4 #define STM32_PLLN_VALUE 80 +#define STM32_PLLPDIV_VALUE 0 #define STM32_PLLP_VALUE 7 #define STM32_PLLQ_VALUE 4 #define STM32_PLLR_VALUE 4 @@ -73,29 +66,22 @@ #define STM32_MCOPRE STM32_MCOPRE_DIV1 #define STM32_LSCOSEL STM32_LSCOSEL_NOCLOCK #define STM32_PLLSAI1N_VALUE 72 +#define STM32_PLLSAI1PDIV_VALUE 6 #define STM32_PLLSAI1P_VALUE 7 #define STM32_PLLSAI1Q_VALUE 6 #define STM32_PLLSAI1R_VALUE 6 -#define STM32_PLLSAI2N_VALUE 72 -#define STM32_PLLSAI2P_VALUE 7 -#define STM32_PLLSAI2R_VALUE 6 /* * Peripherals clock sources. */ #define STM32_USART1SEL STM32_USART1SEL_SYSCLK #define STM32_USART2SEL STM32_USART2SEL_SYSCLK -#define STM32_USART3SEL STM32_USART3SEL_SYSCLK -#define STM32_UART4SEL STM32_UART4SEL_SYSCLK -#define STM32_UART5SEL STM32_UART5SEL_SYSCLK #define STM32_LPUART1SEL STM32_LPUART1SEL_SYSCLK #define STM32_I2C1SEL STM32_I2C1SEL_SYSCLK -#define STM32_I2C2SEL STM32_I2C2SEL_SYSCLK #define STM32_I2C3SEL STM32_I2C3SEL_SYSCLK #define STM32_LPTIM1SEL STM32_LPTIM1SEL_PCLK1 #define STM32_LPTIM2SEL STM32_LPTIM2SEL_PCLK1 #define STM32_SAI1SEL STM32_SAI1SEL_OFF -#define STM32_SAI2SEL STM32_SAI2SEL_OFF #define STM32_CLK48SEL STM32_CLK48SEL_HSI48 #define STM32_ADCSEL STM32_ADCSEL_SYSCLK #define STM32_SWPMI1SEL STM32_SWPMI1SEL_PCLK1 @@ -127,7 +113,6 @@ #define STM32_IRQ_USART1_PRIORITY 12 #define STM32_IRQ_USART2_PRIORITY 12 -#define STM32_IRQ_USART3_PRIORITY 12 #define STM32_IRQ_LPUART1_PRIORITY 12 /* @@ -198,7 +183,6 @@ /* * PWM driver system settings. */ -#define STM32_PWM_USE_ADVANCED FALSE #define STM32_PWM_USE_TIM1 FALSE #define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM15 FALSE @@ -218,9 +202,13 @@ #define STM32_SERIAL_USE_USART1 FALSE #define STM32_SERIAL_USE_USART2 FALSE #define STM32_SERIAL_USE_LPUART1 FALSE -#define STM32_SERIAL_USART1_PRIORITY 12 -#define STM32_SERIAL_USART2_PRIORITY 12 -#define STM32_SERIAL_LPUART1_PRIORITY 12 + +/* + * SIO driver system settings. + */ +#define STM32_SIO_USE_USART1 FALSE +#define STM32_SIO_USE_USART2 FALSE +#define STM32_SIO_USE_LPUART1 FALSE /* * SPI driver system settings. diff --git a/platforms/chibios/boards/QMK_PROTON_C/configs/chconf.h b/platforms/chibios/boards/QMK_PROTON_C/configs/chconf.h index a1cbf68086c2..a0b1dcaba5c7 100644 --- a/platforms/chibios/boards/QMK_PROTON_C/configs/chconf.h +++ b/platforms/chibios/boards/QMK_PROTON_C/configs/chconf.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2020 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -29,7 +29,27 @@ #define CHCONF_H #define _CHIBIOS_RT_CONF_ -#define _CHIBIOS_RT_CONF_VER_6_1_ +#define _CHIBIOS_RT_CONF_VER_7_0_ + +/*===========================================================================*/ +/** + * @name System settings + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Handling of instances. + * @note If enabled then threads assigned to various instances can + * interact each other using the same synchronization objects. + * If disabled then each OS instance is a separate world, no + * direct interactions are handled by the OS. + */ +#if !defined(CH_CFG_SMP_MODE) +#define CH_CFG_SMP_MODE FALSE +#endif + +/** @} */ /*===========================================================================*/ /** @@ -40,7 +60,7 @@ /** * @brief System time counter resolution. - * @note Allowed values are 16 or 32 bits. + * @note Allowed values are 16, 32 or 64 bits. */ #if !defined(CH_CFG_ST_RESOLUTION) #define CH_CFG_ST_RESOLUTION 32 @@ -160,6 +180,17 @@ #define CH_CFG_USE_TM TRUE #endif +/** + * @brief Time Stamps APIs. + * @details If enabled then the time time stamps APIs are included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_TIMESTAMP) +#define CH_CFG_USE_TIMESTAMP TRUE +#endif + /** * @brief Threads registry APIs. * @details If enabled then the registry APIs are included in the kernel. @@ -631,7 +662,7 @@ * @details User fields added to the end of the @p ch_system_t structure. */ #define CH_CFG_SYSTEM_EXTRA_FIELDS \ - /* Add threads custom fields here.*/ + /* Add system custom fields here.*/ /** * @brief System initialization hook. @@ -639,7 +670,23 @@ * just before interrupts are enabled globally. */ #define CH_CFG_SYSTEM_INIT_HOOK() { \ - /* Add threads initialization code here.*/ \ + /* Add system initialization code here.*/ \ +} + +/** + * @brief OS instance structure extension. + * @details User fields added to the end of the @p os_instance_t structure. + */ +#define CH_CFG_OS_INSTANCE_EXTRA_FIELDS \ + /* Add OS instance custom fields here.*/ + +/** + * @brief OS instance initialization hook. + * + * @param[in] oip pointer to the @p os_instance_t structure + */ +#define CH_CFG_OS_INSTANCE_INIT_HOOK(oip) { \ + /* Add OS instance initialization code here.*/ \ } /** @@ -655,6 +702,8 @@ * * @note It is invoked from within @p _thread_init() and implicitly from all * the threads creation APIs. + * + * @param[in] tp pointer to the @p thread_t structure */ #define CH_CFG_THREAD_INIT_HOOK(tp) { \ /* Add threads initialization code here.*/ \ @@ -663,6 +712,8 @@ /** * @brief Threads finalization hook. * @details User finalization code added to the @p chThdExit() API. + * + * @param[in] tp pointer to the @p thread_t structure */ #define CH_CFG_THREAD_EXIT_HOOK(tp) { \ /* Add threads finalization code here.*/ \ @@ -671,6 +722,9 @@ /** * @brief Context switch hook. * @details This hook is invoked just before switching between threads. + * + * @param[in] ntp thread being switched in + * @param[in] otp thread being switched out */ #define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) { \ /* Context switch code here.*/ \ @@ -745,6 +799,14 @@ /* Trace code here.*/ \ } +/** + * @brief Runtime Faults Collection Unit hook. + * @details This hook is invoked each time new faults are collected and stored. + */ +#define CH_CFG_RUNTIME_FAULTS_HOOK(mask) { \ + /* Faults handling code here.*/ \ +} + /** @} */ /*===========================================================================*/ diff --git a/platforms/chibios/boards/QMK_PROTON_C/configs/halconf.h b/platforms/chibios/boards/QMK_PROTON_C/configs/halconf.h index d7a639a6d07f..d876ee2a4209 100644 --- a/platforms/chibios/boards/QMK_PROTON_C/configs/halconf.h +++ b/platforms/chibios/boards/QMK_PROTON_C/configs/halconf.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2020 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -415,6 +415,26 @@ #define SERIAL_BUFFERS_SIZE 128 #endif +/*===========================================================================*/ +/* SIO driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SIO_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SIO_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Support for thread synchronization API. + */ +#if !defined(SIO_USE_SYNCHRONIZATION) || defined(__DOXYGEN__) +#define SIO_USE_SYNCHRONIZATION TRUE +#endif + /*===========================================================================*/ /* SERIAL_USB driver related setting. */ /*===========================================================================*/ diff --git a/platforms/chibios/boards/QMK_PROTON_C/configs/mcuconf.h b/platforms/chibios/boards/QMK_PROTON_C/configs/mcuconf.h index 4d7b586c085e..cab4c29cf659 100644 --- a/platforms/chibios/boards/QMK_PROTON_C/configs/mcuconf.h +++ b/platforms/chibios/boards/QMK_PROTON_C/configs/mcuconf.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2020 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -186,7 +186,6 @@ /* * PWM driver system settings. */ -#define STM32_PWM_USE_ADVANCED FALSE #define STM32_PWM_USE_TIM1 FALSE #define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM3 TRUE diff --git a/platforms/chibios/boards/common/configs/chconf.h b/platforms/chibios/boards/common/configs/chconf.h index 44327a82d719..005690007692 100644 --- a/platforms/chibios/boards/common/configs/chconf.h +++ b/platforms/chibios/boards/common/configs/chconf.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2020 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -29,7 +29,27 @@ #define CHCONF_H #define _CHIBIOS_RT_CONF_ -#define _CHIBIOS_RT_CONF_VER_6_1_ +#define _CHIBIOS_RT_CONF_VER_7_0_ + +/*===========================================================================*/ +/** + * @name System settings + * @{ + */ +/*===========================================================================*/ + +/** + * @brief Handling of instances. + * @note If enabled then threads assigned to various instances can + * interact each other using the same synchronization objects. + * If disabled then each OS instance is a separate world, no + * direct interactions are handled by the OS. + */ +#if !defined(CH_CFG_SMP_MODE) +#define CH_CFG_SMP_MODE FALSE +#endif + +/** @} */ /*===========================================================================*/ /** @@ -40,7 +60,7 @@ /** * @brief System time counter resolution. - * @note Allowed values are 16 or 32 bits. + * @note Allowed values are 16, 32 or 64 bits. */ #if !defined(CH_CFG_ST_RESOLUTION) #define CH_CFG_ST_RESOLUTION 32 @@ -160,6 +180,17 @@ #define CH_CFG_USE_TM FALSE #endif +/** + * @brief Time Stamps APIs. + * @details If enabled then the time time stamps APIs are included in + * the kernel. + * + * @note The default is @p TRUE. + */ +#if !defined(CH_CFG_USE_TIMESTAMP) +#define CH_CFG_USE_TIMESTAMP TRUE +#endif + /** * @brief Threads registry APIs. * @details If enabled then the registry APIs are included in the kernel. @@ -631,7 +662,7 @@ * @details User fields added to the end of the @p ch_system_t structure. */ #define CH_CFG_SYSTEM_EXTRA_FIELDS \ - /* Add threads custom fields here.*/ + /* Add system custom fields here.*/ /** * @brief System initialization hook. @@ -639,7 +670,23 @@ * just before interrupts are enabled globally. */ #define CH_CFG_SYSTEM_INIT_HOOK() { \ - /* Add threads initialization code here.*/ \ + /* Add system initialization code here.*/ \ +} + +/** + * @brief OS instance structure extension. + * @details User fields added to the end of the @p os_instance_t structure. + */ +#define CH_CFG_OS_INSTANCE_EXTRA_FIELDS \ + /* Add OS instance custom fields here.*/ + +/** + * @brief OS instance initialization hook. + * + * @param[in] oip pointer to the @p os_instance_t structure + */ +#define CH_CFG_OS_INSTANCE_INIT_HOOK(oip) { \ + /* Add OS instance initialization code here.*/ \ } /** @@ -655,6 +702,8 @@ * * @note It is invoked from within @p _thread_init() and implicitly from all * the threads creation APIs. + * + * @param[in] tp pointer to the @p thread_t structure */ #define CH_CFG_THREAD_INIT_HOOK(tp) { \ /* Add threads initialization code here.*/ \ @@ -663,6 +712,8 @@ /** * @brief Threads finalization hook. * @details User finalization code added to the @p chThdExit() API. + * + * @param[in] tp pointer to the @p thread_t structure */ #define CH_CFG_THREAD_EXIT_HOOK(tp) { \ /* Add threads finalization code here.*/ \ @@ -671,6 +722,9 @@ /** * @brief Context switch hook. * @details This hook is invoked just before switching between threads. + * + * @param[in] ntp thread being switched in + * @param[in] otp thread being switched out */ #define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) { \ /* Context switch code here.*/ \ @@ -745,6 +799,14 @@ /* Trace code here.*/ \ } +/** + * @brief Runtime Faults Collection Unit hook. + * @details This hook is invoked each time new faults are collected and stored. + */ +#define CH_CFG_RUNTIME_FAULTS_HOOK(mask) { \ + /* Faults handling code here.*/ \ +} + /** @} */ /*===========================================================================*/ diff --git a/platforms/chibios/boards/common/configs/halconf.h b/platforms/chibios/boards/common/configs/halconf.h index c80f67ee27c1..3d77749fd5ef 100644 --- a/platforms/chibios/boards/common/configs/halconf.h +++ b/platforms/chibios/boards/common/configs/halconf.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2020 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -415,6 +415,26 @@ #define SERIAL_BUFFERS_SIZE 128 #endif +/*===========================================================================*/ +/* SIO driver related settings. */ +/*===========================================================================*/ + +/** + * @brief Default bit rate. + * @details Configuration parameter, this is the baud rate selected for the + * default configuration. + */ +#if !defined(SIO_DEFAULT_BITRATE) || defined(__DOXYGEN__) +#define SIO_DEFAULT_BITRATE 38400 +#endif + +/** + * @brief Support for thread synchronization API. + */ +#if !defined(SIO_USE_SYNCHRONIZATION) || defined(__DOXYGEN__) +#define SIO_USE_SYNCHRONIZATION TRUE +#endif + /*===========================================================================*/ /* SERIAL_USB driver related setting. */ /*===========================================================================*/ From 16116d62e485887ba14ee8767659f8275daa8bf5 Mon Sep 17 00:00:00 2001 From: Nick Brassel Date: Tue, 19 Oct 2021 08:50:51 +1100 Subject: [PATCH 5/9] Conf updates. --- .../GENERIC_STM32_F405XG/configs/mcuconf.h | 78 +++++++++---------- 1 file changed, 35 insertions(+), 43 deletions(-) diff --git a/platforms/chibios/boards/GENERIC_STM32_F405XG/configs/mcuconf.h b/platforms/chibios/boards/GENERIC_STM32_F405XG/configs/mcuconf.h index d2ec632d9f20..394e7502560d 100644 --- a/platforms/chibios/boards/GENERIC_STM32_F405XG/configs/mcuconf.h +++ b/platforms/chibios/boards/GENERIC_STM32_F405XG/configs/mcuconf.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2020 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -86,6 +86,28 @@ #define STM32_IRQ_EXTI21_PRIORITY 15 #define STM32_IRQ_EXTI22_PRIORITY 15 +#define STM32_IRQ_TIM1_BRK_TIM9_PRIORITY 7 +#define STM32_IRQ_TIM1_UP_TIM10_PRIORITY 7 +#define STM32_IRQ_TIM1_TRGCO_TIM11_PRIORITY 7 +#define STM32_IRQ_TIM1_CC_PRIORITY 7 +#define STM32_IRQ_TIM2_PRIORITY 7 +#define STM32_IRQ_TIM3_PRIORITY 7 +#define STM32_IRQ_TIM4_PRIORITY 7 +#define STM32_IRQ_TIM5_PRIORITY 7 +#define STM32_IRQ_TIM6_PRIORITY 7 +#define STM32_IRQ_TIM7_PRIORITY 7 +#define STM32_IRQ_TIM8_BRK_TIM12_PRIORITY 7 +#define STM32_IRQ_TIM8_UP_TIM13_PRIORITY 7 +#define STM32_IRQ_TIM8_TRGCO_TIM14_PRIORITY 7 +#define STM32_IRQ_TIM8_CC_PRIORITY 7 + +#define STM32_IRQ_USART1_PRIORITY 12 +#define STM32_IRQ_USART2_PRIORITY 12 +#define STM32_IRQ_USART3_PRIORITY 12 +#define STM32_IRQ_UART4_PRIORITY 12 +#define STM32_IRQ_UART5_PRIORITY 12 +#define STM32_IRQ_USART6_PRIORITY 12 + /* * ADC driver system settings. */ @@ -137,21 +159,11 @@ #define STM32_GPT_USE_TIM7 FALSE #define STM32_GPT_USE_TIM8 FALSE #define STM32_GPT_USE_TIM9 FALSE +#define STM32_GPT_USE_TIM10 FALSE #define STM32_GPT_USE_TIM11 FALSE #define STM32_GPT_USE_TIM12 FALSE +#define STM32_GPT_USE_TIM13 FALSE #define STM32_GPT_USE_TIM14 FALSE -#define STM32_GPT_TIM1_IRQ_PRIORITY 7 -#define STM32_GPT_TIM2_IRQ_PRIORITY 7 -#define STM32_GPT_TIM3_IRQ_PRIORITY 7 -#define STM32_GPT_TIM4_IRQ_PRIORITY 7 -#define STM32_GPT_TIM5_IRQ_PRIORITY 7 -#define STM32_GPT_TIM6_IRQ_PRIORITY 7 -#define STM32_GPT_TIM7_IRQ_PRIORITY 7 -#define STM32_GPT_TIM8_IRQ_PRIORITY 7 -#define STM32_GPT_TIM9_IRQ_PRIORITY 7 -#define STM32_GPT_TIM11_IRQ_PRIORITY 7 -#define STM32_GPT_TIM12_IRQ_PRIORITY 7 -#define STM32_GPT_TIM14_IRQ_PRIORITY 7 /* * I2C driver system settings. @@ -199,13 +211,11 @@ #define STM32_ICU_USE_TIM5 FALSE #define STM32_ICU_USE_TIM8 FALSE #define STM32_ICU_USE_TIM9 FALSE -#define STM32_ICU_TIM1_IRQ_PRIORITY 7 -#define STM32_ICU_TIM2_IRQ_PRIORITY 7 -#define STM32_ICU_TIM3_IRQ_PRIORITY 7 -#define STM32_ICU_TIM4_IRQ_PRIORITY 7 -#define STM32_ICU_TIM5_IRQ_PRIORITY 7 -#define STM32_ICU_TIM8_IRQ_PRIORITY 7 -#define STM32_ICU_TIM9_IRQ_PRIORITY 7 +#define STM32_ICU_USE_TIM10 FALSE +#define STM32_ICU_USE_TIM11 FALSE +#define STM32_ICU_USE_TIM12 FALSE +#define STM32_ICU_USE_TIM13 FALSE +#define STM32_ICU_USE_TIM14 FALSE /* * MAC driver system settings. @@ -221,7 +231,6 @@ /* * PWM driver system settings. */ -#define STM32_PWM_USE_ADVANCED FALSE #define STM32_PWM_USE_TIM1 FALSE #define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM3 FALSE @@ -229,13 +238,11 @@ #define STM32_PWM_USE_TIM5 FALSE #define STM32_PWM_USE_TIM8 FALSE #define STM32_PWM_USE_TIM9 FALSE -#define STM32_PWM_TIM1_IRQ_PRIORITY 7 -#define STM32_PWM_TIM2_IRQ_PRIORITY 7 -#define STM32_PWM_TIM3_IRQ_PRIORITY 7 -#define STM32_PWM_TIM4_IRQ_PRIORITY 7 -#define STM32_PWM_TIM5_IRQ_PRIORITY 7 -#define STM32_PWM_TIM8_IRQ_PRIORITY 7 -#define STM32_PWM_TIM9_IRQ_PRIORITY 7 +#define STM32_PWM_USE_TIM10 FALSE +#define STM32_PWM_USE_TIM11 FALSE +#define STM32_PWM_USE_TIM12 FALSE +#define STM32_PWM_USE_TIM13 FALSE +#define STM32_PWM_USE_TIM14 FALSE /* * RTC driver system settings. @@ -265,12 +272,6 @@ #define STM32_SERIAL_USE_UART4 FALSE #define STM32_SERIAL_USE_UART5 FALSE #define STM32_SERIAL_USE_USART6 FALSE -#define STM32_SERIAL_USART1_PRIORITY 12 -#define STM32_SERIAL_USART2_PRIORITY 12 -#define STM32_SERIAL_USART3_PRIORITY 12 -#define STM32_SERIAL_UART4_PRIORITY 12 -#define STM32_SERIAL_UART5_PRIORITY 12 -#define STM32_SERIAL_USART6_PRIORITY 12 /* * SPI driver system settings. @@ -319,12 +320,6 @@ #define STM32_UART_UART5_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) #define STM32_UART_USART6_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) #define STM32_UART_USART6_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) -#define STM32_UART_USART1_IRQ_PRIORITY 12 -#define STM32_UART_USART2_IRQ_PRIORITY 12 -#define STM32_UART_USART3_IRQ_PRIORITY 12 -#define STM32_UART_UART4_IRQ_PRIORITY 12 -#define STM32_UART_UART5_IRQ_PRIORITY 12 -#define STM32_UART_USART6_IRQ_PRIORITY 12 #define STM32_UART_USART1_DMA_PRIORITY 0 #define STM32_UART_USART2_DMA_PRIORITY 0 #define STM32_UART_USART3_DMA_PRIORITY 0 @@ -344,9 +339,6 @@ #define STM32_USB_OTG2_RX_FIFO_SIZE 1024 #define STM32_USB_HOST_WAKEUP_DURATION 2 -#define STM32_USB_OTG_THREAD_PRIO NORMALPRIO+1 -#define STM32_USB_OTG_THREAD_STACK_SIZE 128 - /* * WDG driver system settings. */ From 9e11e5cf91971f2dd7e6584721fce72e5db51930 Mon Sep 17 00:00:00 2001 From: Nick Brassel Date: Tue, 19 Oct 2021 08:54:24 +1100 Subject: [PATCH 6/9] Updated ChibiOS --- lib/chibios | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/lib/chibios b/lib/chibios index 1238f63d1f14..2b36a9433b1d 160000 --- a/lib/chibios +++ b/lib/chibios @@ -1 +1 @@ -Subproject commit 1238f63d1f147a7d8e6846f8957ffb65ff47a9f2 +Subproject commit 2b36a9433b1d28a766b07e5553ba39243e68a831 From 0ae44aec11f2569a5700002b8419c0a68f0d6129 Mon Sep 17 00:00:00 2001 From: Nick Brassel Date: Tue, 19 Oct 2021 17:03:24 +1100 Subject: [PATCH 7/9] Convert STM32L422 to actual L422 ChibiOS platform. --- .../GENERIC_STM32_L412XB/configs/board.h | 5 +-- .../GENERIC_STM32_L412XB/configs/mcuconf.h | 33 ++++--------------- quantum/mcu_selection.mk | 4 +-- 3 files changed, 9 insertions(+), 33 deletions(-) diff --git a/platforms/chibios/boards/GENERIC_STM32_L412XB/configs/board.h b/platforms/chibios/boards/GENERIC_STM32_L412XB/configs/board.h index 2e37d95fe39a..de5f85acdd99 100644 --- a/platforms/chibios/boards/GENERIC_STM32_L412XB/configs/board.h +++ b/platforms/chibios/boards/GENERIC_STM32_L412XB/configs/board.h @@ -18,7 +18,4 @@ #include_next "board.h" #undef STM32L432xx - -// Pretend that we're an L443xx as the ChibiOS definitions for L4x2/L4x3 mistakenly don't enable GPIOH, I2C2, or SPI2. -// Until ChibiOS upstream is fixed, this should be kept at L443, as nothing in QMK currently utilises the crypto peripheral on the L443. -#define STM32L443xx +#define STM32L422xx diff --git a/platforms/chibios/boards/GENERIC_STM32_L412XB/configs/mcuconf.h b/platforms/chibios/boards/GENERIC_STM32_L412XB/configs/mcuconf.h index 745a3d13debb..e1fd08872b37 100644 --- a/platforms/chibios/boards/GENERIC_STM32_L412XB/configs/mcuconf.h +++ b/platforms/chibios/boards/GENERIC_STM32_L412XB/configs/mcuconf.h @@ -32,8 +32,7 @@ #define MCUCONF_H #define STM32L4xx_MCUCONF -#define STM32L432_MCUCONF -#define STM32L433_MCUCONF +#define STM32L422_MCUCONF /* * HAL driver system settings. @@ -55,7 +54,7 @@ #define STM32_PLLM_VALUE 4 #define STM32_PLLN_VALUE 80 #define STM32_PLLPDIV_VALUE 0 -#define STM32_PLLP_VALUE 7 +#define STM32_PLLP_VALUE 0 #define STM32_PLLQ_VALUE 4 #define STM32_PLLR_VALUE 4 #define STM32_HPRE STM32_HPRE_DIV1 @@ -81,7 +80,6 @@ #define STM32_I2C3SEL STM32_I2C3SEL_SYSCLK #define STM32_LPTIM1SEL STM32_LPTIM1SEL_PCLK1 #define STM32_LPTIM2SEL STM32_LPTIM2SEL_PCLK1 -#define STM32_SAI1SEL STM32_SAI1SEL_OFF #define STM32_CLK48SEL STM32_CLK48SEL_HSI48 #define STM32_ADCSEL STM32_ADCSEL_SYSCLK #define STM32_SWPMI1SEL STM32_SWPMI1SEL_PCLK1 @@ -122,29 +120,15 @@ #define STM32_ADC_USE_ADC1 FALSE #define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(1, 1) #define STM32_ADC_ADC1_DMA_PRIORITY 2 +#define STM32_ADC_USE_ADC2 FALSE +#define STM32_ADC_ADC2_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) +#define STM32_ADC_ADC2_DMA_PRIORITY 2 #define STM32_ADC_ADC12_IRQ_PRIORITY 5 #define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5 +#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY 5 #define STM32_ADC_ADC123_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV1 #define STM32_ADC_ADC123_PRESC ADC_CCR_PRESC_DIV2 -/* - * CAN driver system settings. - */ -#define STM32_CAN_USE_CAN1 FALSE -#define STM32_CAN_CAN1_IRQ_PRIORITY 11 - -/* - * DAC driver system settings. - */ -#define STM32_DAC_DUAL_MODE FALSE -#define STM32_DAC_USE_DAC1_CH1 FALSE -#define STM32_DAC_USE_DAC1_CH2 FALSE -#define STM32_DAC_DAC1_CH1_IRQ_PRIORITY 10 -#define STM32_DAC_DAC1_CH2_IRQ_PRIORITY 10 -#define STM32_DAC_DAC1_CH1_DMA_PRIORITY 2 -#define STM32_DAC_DAC1_CH2_DMA_PRIORITY 2 -#define STM32_DAC_DAC1_CH1_DMA_STREAM STM32_DMA_STREAM_ID(2, 4) -#define STM32_DAC_DAC1_CH2_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) /* * GPT driver system settings. @@ -214,15 +198,10 @@ * SPI driver system settings. */ #define STM32_SPI_USE_SPI1 FALSE -#define STM32_SPI_USE_SPI3 FALSE #define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 3) #define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 4) -#define STM32_SPI_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 1) -#define STM32_SPI_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) #define STM32_SPI_SPI1_DMA_PRIORITY 1 -#define STM32_SPI_SPI3_DMA_PRIORITY 1 #define STM32_SPI_SPI1_IRQ_PRIORITY 10 -#define STM32_SPI_SPI3_IRQ_PRIORITY 10 #define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure") /* diff --git a/quantum/mcu_selection.mk b/quantum/mcu_selection.mk index 7c4a617af075..41be1aa809ef 100644 --- a/quantum/mcu_selection.mk +++ b/quantum/mcu_selection.mk @@ -533,7 +533,7 @@ ifneq (,$(filter $(MCU),STM32L412 STM32L422)) # /boards/, or drivers/boards/ BOARD ?= GENERIC_STM32_L412XB - PLATFORM_NAME ?= platform_l432 + PLATFORM_NAME ?= platform_l412_l422 USE_FPU ?= yes @@ -544,7 +544,7 @@ endif ifneq ($(findstring GD32VF103, $(MCU)),) # RISC-V MCU = risc-v - + # RISC-V extensions and abi configuration MCU_ARCH = rv32imac MCU_ABI = ilp32 From a6a41e67a105a043ae063618e18911a738e9f960 Mon Sep 17 00:00:00 2001 From: Nick Brassel Date: Wed, 3 Nov 2021 06:39:11 +1100 Subject: [PATCH 8/9] Downgrade to 20.3.4 as ChibiOS 21.6.x is being aborted. --- docs/chibios_upgrade_instructions.md | 23 +++--- lib/chibios | 2 +- lib/chibios-contrib | 2 +- .../GENERIC_STM32_F303XC/configs/mcuconf.h | 3 +- .../GENERIC_STM32_F405XG/configs/mcuconf.h | 75 ++++++++++--------- .../GENERIC_STM32_F407XE/configs/mcuconf.h | 75 ++++++++++--------- .../GENERIC_STM32_G431XB/configs/mcuconf.h | 20 +---- .../GENERIC_STM32_G474XE/configs/mcuconf.h | 22 +----- .../boards/QMK_PROTON_C/configs/chconf.h | 70 +---------------- .../boards/QMK_PROTON_C/configs/halconf.h | 22 +----- .../boards/QMK_PROTON_C/configs/mcuconf.h | 3 +- .../chibios/boards/common/configs/chconf.h | 70 +---------------- .../chibios/boards/common/configs/halconf.h | 22 +----- util/update_chibios_mirror.sh | 2 +- 14 files changed, 114 insertions(+), 297 deletions(-) diff --git a/docs/chibios_upgrade_instructions.md b/docs/chibios_upgrade_instructions.md index 40c2faafcfed..b0a71142a39b 100644 --- a/docs/chibios_upgrade_instructions.md +++ b/docs/chibios_upgrade_instructions.md @@ -14,10 +14,10 @@ ChibiOS and ChibiOS-Contrib need to be updated in tandem -- the latter has a bra * First time around this will take several hours * Subsequent updates will be incremental only * Tagging example (work out which version first!): - * `git tag -a ver20.3.3 -m ver20.3.3 svn/tags/ver20.3.3` - * `git push qmk ver20.3.3` - * `git tag -a breaking_YYYY_qN -m breaking_YYYY_qN svn/tags/ver20.3.3` - * `git push qmk breaking_YYYY_qN` + * `git tag -a ver20.3.4 -m ver20.3.4 svn/tags/ver20.3.4` + * `git push qmk ver20.3.4` + * `git tag -a develop_YYYY_qN -m develop_YYYY_qN svn/tags/ver20.3.4` + * `git push qmk develop_YYYY_qN` ## Getting ChibiOS-Contrib @@ -30,8 +30,8 @@ ChibiOS and ChibiOS-Contrib need to be updated in tandem -- the latter has a bra * `git checkout chibios-20.3.x` * `git pull --ff-only` * `git push origin chibios-20.3.x` - * `git tag -a breaking_YYYY_qN -m breaking_YYYY_qN chibios-20.3.x` - * `git push origin breaking_YYYY_qN` + * `git tag -a develop_YYYY_qN -m develop_YYYY_qN chibios-20.3.x` + * `git push origin develop_YYYY_qN` ## Updating submodules @@ -42,15 +42,18 @@ ChibiOS and ChibiOS-Contrib need to be updated in tandem -- the latter has a bra * `git checkout -b chibios-version-bump` * `cd lib/chibios` * `git fetch --all --tags --prune` - * `git checkout breaking_YYYY_qN` + * `git checkout develop_YYYY_qN` * `cd ../chibios-contrib` * `git fetch --all --tags --prune` - * `git checkout breaking_YYYY_qN` + * `git checkout develop_YYYY_qN` +* Update ChibiOS configs within QMK + * `cd $QMK_FIRMWARE` + * `./util/chibios_conf_updater.sh` * Build everything * `cd $QMK_FIRMWARE` * `qmk multibuild -j4` * Make sure there are no errors * Push to the repo - * `git commit -am 'Update ChibiOS to XXXXXXXXX'` + * `git commit -am 'Update ChibiOS to 99.9.9'` * `git push --set-upstream origin chibios-version-bump` -* Make a PR to qmk_firmware with the new branch \ No newline at end of file +* Make a PR to qmk_firmware with the new branch diff --git a/lib/chibios b/lib/chibios index 2b36a9433b1d..d7b9d1c87f72 160000 --- a/lib/chibios +++ b/lib/chibios @@ -1 +1 @@ -Subproject commit 2b36a9433b1d28a766b07e5553ba39243e68a831 +Subproject commit d7b9d1c87f724bd7c8cd1486d6d0dc3ba52e0d52 diff --git a/lib/chibios-contrib b/lib/chibios-contrib index 1127b5575e5a..d1c2126d1cd8 160000 --- a/lib/chibios-contrib +++ b/lib/chibios-contrib @@ -1 +1 @@ -Subproject commit 1127b5575e5ae784b1d5654220f35e0cb8aa8ca9 +Subproject commit d1c2126d1cd867c50127da84425805e225df8555 diff --git a/platforms/chibios/boards/GENERIC_STM32_F303XC/configs/mcuconf.h b/platforms/chibios/boards/GENERIC_STM32_F303XC/configs/mcuconf.h index e0af4a276bfb..c6f5a8ac5201 100644 --- a/platforms/chibios/boards/GENERIC_STM32_F303XC/configs/mcuconf.h +++ b/platforms/chibios/boards/GENERIC_STM32_F303XC/configs/mcuconf.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2020 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -186,6 +186,7 @@ /* * PWM driver system settings. */ +#define STM32_PWM_USE_ADVANCED FALSE #define STM32_PWM_USE_TIM1 FALSE #define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM3 FALSE diff --git a/platforms/chibios/boards/GENERIC_STM32_F405XG/configs/mcuconf.h b/platforms/chibios/boards/GENERIC_STM32_F405XG/configs/mcuconf.h index 394e7502560d..908a580a91be 100644 --- a/platforms/chibios/boards/GENERIC_STM32_F405XG/configs/mcuconf.h +++ b/platforms/chibios/boards/GENERIC_STM32_F405XG/configs/mcuconf.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2020 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -86,28 +86,6 @@ #define STM32_IRQ_EXTI21_PRIORITY 15 #define STM32_IRQ_EXTI22_PRIORITY 15 -#define STM32_IRQ_TIM1_BRK_TIM9_PRIORITY 7 -#define STM32_IRQ_TIM1_UP_TIM10_PRIORITY 7 -#define STM32_IRQ_TIM1_TRGCO_TIM11_PRIORITY 7 -#define STM32_IRQ_TIM1_CC_PRIORITY 7 -#define STM32_IRQ_TIM2_PRIORITY 7 -#define STM32_IRQ_TIM3_PRIORITY 7 -#define STM32_IRQ_TIM4_PRIORITY 7 -#define STM32_IRQ_TIM5_PRIORITY 7 -#define STM32_IRQ_TIM6_PRIORITY 7 -#define STM32_IRQ_TIM7_PRIORITY 7 -#define STM32_IRQ_TIM8_BRK_TIM12_PRIORITY 7 -#define STM32_IRQ_TIM8_UP_TIM13_PRIORITY 7 -#define STM32_IRQ_TIM8_TRGCO_TIM14_PRIORITY 7 -#define STM32_IRQ_TIM8_CC_PRIORITY 7 - -#define STM32_IRQ_USART1_PRIORITY 12 -#define STM32_IRQ_USART2_PRIORITY 12 -#define STM32_IRQ_USART3_PRIORITY 12 -#define STM32_IRQ_UART4_PRIORITY 12 -#define STM32_IRQ_UART5_PRIORITY 12 -#define STM32_IRQ_USART6_PRIORITY 12 - /* * ADC driver system settings. */ @@ -159,11 +137,21 @@ #define STM32_GPT_USE_TIM7 FALSE #define STM32_GPT_USE_TIM8 FALSE #define STM32_GPT_USE_TIM9 FALSE -#define STM32_GPT_USE_TIM10 FALSE #define STM32_GPT_USE_TIM11 FALSE #define STM32_GPT_USE_TIM12 FALSE -#define STM32_GPT_USE_TIM13 FALSE #define STM32_GPT_USE_TIM14 FALSE +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM6_IRQ_PRIORITY 7 +#define STM32_GPT_TIM7_IRQ_PRIORITY 7 +#define STM32_GPT_TIM8_IRQ_PRIORITY 7 +#define STM32_GPT_TIM9_IRQ_PRIORITY 7 +#define STM32_GPT_TIM11_IRQ_PRIORITY 7 +#define STM32_GPT_TIM12_IRQ_PRIORITY 7 +#define STM32_GPT_TIM14_IRQ_PRIORITY 7 /* * I2C driver system settings. @@ -211,11 +199,13 @@ #define STM32_ICU_USE_TIM5 FALSE #define STM32_ICU_USE_TIM8 FALSE #define STM32_ICU_USE_TIM9 FALSE -#define STM32_ICU_USE_TIM10 FALSE -#define STM32_ICU_USE_TIM11 FALSE -#define STM32_ICU_USE_TIM12 FALSE -#define STM32_ICU_USE_TIM13 FALSE -#define STM32_ICU_USE_TIM14 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM5_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 +#define STM32_ICU_TIM9_IRQ_PRIORITY 7 /* * MAC driver system settings. @@ -231,6 +221,7 @@ /* * PWM driver system settings. */ +#define STM32_PWM_USE_ADVANCED FALSE #define STM32_PWM_USE_TIM1 FALSE #define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM3 FALSE @@ -238,11 +229,13 @@ #define STM32_PWM_USE_TIM5 FALSE #define STM32_PWM_USE_TIM8 FALSE #define STM32_PWM_USE_TIM9 FALSE -#define STM32_PWM_USE_TIM10 FALSE -#define STM32_PWM_USE_TIM11 FALSE -#define STM32_PWM_USE_TIM12 FALSE -#define STM32_PWM_USE_TIM13 FALSE -#define STM32_PWM_USE_TIM14 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM5_IRQ_PRIORITY 7 +#define STM32_PWM_TIM8_IRQ_PRIORITY 7 +#define STM32_PWM_TIM9_IRQ_PRIORITY 7 /* * RTC driver system settings. @@ -272,6 +265,12 @@ #define STM32_SERIAL_USE_UART4 FALSE #define STM32_SERIAL_USE_UART5 FALSE #define STM32_SERIAL_USE_USART6 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 +#define STM32_SERIAL_USART6_PRIORITY 12 /* * SPI driver system settings. @@ -320,6 +319,12 @@ #define STM32_UART_UART5_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) #define STM32_UART_USART6_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) #define STM32_UART_USART6_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_UART4_IRQ_PRIORITY 12 +#define STM32_UART_UART5_IRQ_PRIORITY 12 +#define STM32_UART_USART6_IRQ_PRIORITY 12 #define STM32_UART_USART1_DMA_PRIORITY 0 #define STM32_UART_USART2_DMA_PRIORITY 0 #define STM32_UART_USART3_DMA_PRIORITY 0 diff --git a/platforms/chibios/boards/GENERIC_STM32_F407XE/configs/mcuconf.h b/platforms/chibios/boards/GENERIC_STM32_F407XE/configs/mcuconf.h index 07399ad2f739..928ee56c71cf 100644 --- a/platforms/chibios/boards/GENERIC_STM32_F407XE/configs/mcuconf.h +++ b/platforms/chibios/boards/GENERIC_STM32_F407XE/configs/mcuconf.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2020 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -86,28 +86,6 @@ #define STM32_IRQ_EXTI21_PRIORITY 15 #define STM32_IRQ_EXTI22_PRIORITY 15 -#define STM32_IRQ_TIM1_BRK_TIM9_PRIORITY 7 -#define STM32_IRQ_TIM1_UP_TIM10_PRIORITY 7 -#define STM32_IRQ_TIM1_TRGCO_TIM11_PRIORITY 7 -#define STM32_IRQ_TIM1_CC_PRIORITY 7 -#define STM32_IRQ_TIM2_PRIORITY 7 -#define STM32_IRQ_TIM3_PRIORITY 7 -#define STM32_IRQ_TIM4_PRIORITY 7 -#define STM32_IRQ_TIM5_PRIORITY 7 -#define STM32_IRQ_TIM6_PRIORITY 7 -#define STM32_IRQ_TIM7_PRIORITY 7 -#define STM32_IRQ_TIM8_BRK_TIM12_PRIORITY 7 -#define STM32_IRQ_TIM8_UP_TIM13_PRIORITY 7 -#define STM32_IRQ_TIM8_TRGCO_TIM14_PRIORITY 7 -#define STM32_IRQ_TIM8_CC_PRIORITY 7 - -#define STM32_IRQ_USART1_PRIORITY 12 -#define STM32_IRQ_USART2_PRIORITY 12 -#define STM32_IRQ_USART3_PRIORITY 12 -#define STM32_IRQ_UART4_PRIORITY 12 -#define STM32_IRQ_UART5_PRIORITY 12 -#define STM32_IRQ_USART6_PRIORITY 12 - /* * ADC driver system settings. */ @@ -159,11 +137,21 @@ #define STM32_GPT_USE_TIM7 FALSE #define STM32_GPT_USE_TIM8 FALSE #define STM32_GPT_USE_TIM9 FALSE -#define STM32_GPT_USE_TIM10 FALSE #define STM32_GPT_USE_TIM11 FALSE #define STM32_GPT_USE_TIM12 FALSE -#define STM32_GPT_USE_TIM13 FALSE #define STM32_GPT_USE_TIM14 FALSE +#define STM32_GPT_TIM1_IRQ_PRIORITY 7 +#define STM32_GPT_TIM2_IRQ_PRIORITY 7 +#define STM32_GPT_TIM3_IRQ_PRIORITY 7 +#define STM32_GPT_TIM4_IRQ_PRIORITY 7 +#define STM32_GPT_TIM5_IRQ_PRIORITY 7 +#define STM32_GPT_TIM6_IRQ_PRIORITY 7 +#define STM32_GPT_TIM7_IRQ_PRIORITY 7 +#define STM32_GPT_TIM8_IRQ_PRIORITY 7 +#define STM32_GPT_TIM9_IRQ_PRIORITY 7 +#define STM32_GPT_TIM11_IRQ_PRIORITY 7 +#define STM32_GPT_TIM12_IRQ_PRIORITY 7 +#define STM32_GPT_TIM14_IRQ_PRIORITY 7 /* * I2C driver system settings. @@ -211,11 +199,13 @@ #define STM32_ICU_USE_TIM5 FALSE #define STM32_ICU_USE_TIM8 FALSE #define STM32_ICU_USE_TIM9 FALSE -#define STM32_ICU_USE_TIM10 FALSE -#define STM32_ICU_USE_TIM11 FALSE -#define STM32_ICU_USE_TIM12 FALSE -#define STM32_ICU_USE_TIM13 FALSE -#define STM32_ICU_USE_TIM14 FALSE +#define STM32_ICU_TIM1_IRQ_PRIORITY 7 +#define STM32_ICU_TIM2_IRQ_PRIORITY 7 +#define STM32_ICU_TIM3_IRQ_PRIORITY 7 +#define STM32_ICU_TIM4_IRQ_PRIORITY 7 +#define STM32_ICU_TIM5_IRQ_PRIORITY 7 +#define STM32_ICU_TIM8_IRQ_PRIORITY 7 +#define STM32_ICU_TIM9_IRQ_PRIORITY 7 /* * MAC driver system settings. @@ -231,6 +221,7 @@ /* * PWM driver system settings. */ +#define STM32_PWM_USE_ADVANCED FALSE #define STM32_PWM_USE_TIM1 FALSE #define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM3 FALSE @@ -238,11 +229,13 @@ #define STM32_PWM_USE_TIM5 FALSE #define STM32_PWM_USE_TIM8 FALSE #define STM32_PWM_USE_TIM9 FALSE -#define STM32_PWM_USE_TIM10 FALSE -#define STM32_PWM_USE_TIM11 FALSE -#define STM32_PWM_USE_TIM12 FALSE -#define STM32_PWM_USE_TIM13 FALSE -#define STM32_PWM_USE_TIM14 FALSE +#define STM32_PWM_TIM1_IRQ_PRIORITY 7 +#define STM32_PWM_TIM2_IRQ_PRIORITY 7 +#define STM32_PWM_TIM3_IRQ_PRIORITY 7 +#define STM32_PWM_TIM4_IRQ_PRIORITY 7 +#define STM32_PWM_TIM5_IRQ_PRIORITY 7 +#define STM32_PWM_TIM8_IRQ_PRIORITY 7 +#define STM32_PWM_TIM9_IRQ_PRIORITY 7 /* * RTC driver system settings. @@ -272,6 +265,12 @@ #define STM32_SERIAL_USE_UART4 FALSE #define STM32_SERIAL_USE_UART5 FALSE #define STM32_SERIAL_USE_USART6 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_USART3_PRIORITY 12 +#define STM32_SERIAL_UART4_PRIORITY 12 +#define STM32_SERIAL_UART5_PRIORITY 12 +#define STM32_SERIAL_USART6_PRIORITY 12 /* * SPI driver system settings. @@ -320,6 +319,12 @@ #define STM32_UART_UART5_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7) #define STM32_UART_USART6_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) #define STM32_UART_USART6_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) +#define STM32_UART_USART1_IRQ_PRIORITY 12 +#define STM32_UART_USART2_IRQ_PRIORITY 12 +#define STM32_UART_USART3_IRQ_PRIORITY 12 +#define STM32_UART_UART4_IRQ_PRIORITY 12 +#define STM32_UART_UART5_IRQ_PRIORITY 12 +#define STM32_UART_USART6_IRQ_PRIORITY 12 #define STM32_UART_USART1_DMA_PRIORITY 0 #define STM32_UART_USART2_DMA_PRIORITY 0 #define STM32_UART_USART3_DMA_PRIORITY 0 diff --git a/platforms/chibios/boards/GENERIC_STM32_G431XB/configs/mcuconf.h b/platforms/chibios/boards/GENERIC_STM32_G431XB/configs/mcuconf.h index fd00280115c5..d115028300bc 100644 --- a/platforms/chibios/boards/GENERIC_STM32_G431XB/configs/mcuconf.h +++ b/platforms/chibios/boards/GENERIC_STM32_G431XB/configs/mcuconf.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2020 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -39,7 +39,6 @@ * HAL driver system settings. */ #define STM32_NO_INIT FALSE -#define STM32_CLOCK_DYNAMIC FALSE #define STM32_VOS STM32_VOS_RANGE1 #define STM32_PWR_BOOST TRUE #define STM32_PWR_CR2 (PWR_CR2_PLS_LEV0) @@ -228,6 +227,7 @@ /* * PWM driver system settings. */ +#define STM32_PWM_USE_ADVANCED FALSE #define STM32_PWM_USE_TIM1 FALSE #define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM3 FALSE @@ -240,13 +240,6 @@ /* * RTC driver system settings. */ -#define STM32_RTC_PRESA_VALUE 32 -#define STM32_RTC_PRESS_VALUE 1024 -#define STM32_RTC_CR_INIT 0 -#define STM32_TAMP_CR1_INIT 0 -#define STM32_TAMP_CR2_INIT 0 -#define STM32_TAMP_FLTCR_INIT 0 -#define STM32_TAMP_IER_INIT 0 /* * SDC driver system settings. @@ -261,15 +254,6 @@ #define STM32_SERIAL_USE_UART4 FALSE #define STM32_SERIAL_USE_LPUART1 FALSE -/* - * SIO driver system settings. - */ -#define STM32_SIO_USE_USART1 FALSE -#define STM32_SIO_USE_USART2 FALSE -#define STM32_SIO_USE_USART3 FALSE -#define STM32_SIO_USE_UART4 FALSE -#define STM32_SIO_USE_LPUART1 FALSE - /* * SPI driver system settings. */ diff --git a/platforms/chibios/boards/GENERIC_STM32_G474XE/configs/mcuconf.h b/platforms/chibios/boards/GENERIC_STM32_G474XE/configs/mcuconf.h index d6385da6249d..5710e2cb45bd 100644 --- a/platforms/chibios/boards/GENERIC_STM32_G474XE/configs/mcuconf.h +++ b/platforms/chibios/boards/GENERIC_STM32_G474XE/configs/mcuconf.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2020 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -41,7 +41,6 @@ * HAL driver system settings. */ #define STM32_NO_INIT FALSE -#define STM32_CLOCK_DYNAMIC FALSE #define STM32_VOS STM32_VOS_RANGE1 #define STM32_PWR_BOOST TRUE #define STM32_PWR_CR2 (PWR_CR2_PLS_LEV0) @@ -275,6 +274,7 @@ /* * PWM driver system settings. */ +#define STM32_PWM_USE_ADVANCED FALSE #define STM32_PWM_USE_TIM1 FALSE #define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM3 FALSE @@ -289,13 +289,6 @@ /* * RTC driver system settings. */ -#define STM32_RTC_PRESA_VALUE 32 -#define STM32_RTC_PRESS_VALUE 1024 -#define STM32_RTC_CR_INIT 0 -#define STM32_TAMP_CR1_INIT 0 -#define STM32_TAMP_CR2_INIT 0 -#define STM32_TAMP_FLTCR_INIT 0 -#define STM32_TAMP_IER_INIT 0 /* * SDC driver system settings. @@ -311,16 +304,6 @@ #define STM32_SERIAL_USE_UART5 FALSE #define STM32_SERIAL_USE_LPUART1 FALSE -/* - * SIO driver system settings. - */ -#define STM32_SIO_USE_USART1 FALSE -#define STM32_SIO_USE_USART2 FALSE -#define STM32_SIO_USE_USART3 FALSE -#define STM32_SIO_USE_UART4 FALSE -#define STM32_SIO_USE_UART5 FALSE -#define STM32_SIO_USE_LPUART1 FALSE - /* * SPI driver system settings. */ @@ -400,6 +383,5 @@ */ #define STM32_WSPI_USE_QUADSPI1 FALSE #define STM32_WSPI_QUADSPI1_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) -#define STM32_WSPI_QUADSPI1_PRESCALER_VALUE 1 #endif /* MCUCONF_H */ diff --git a/platforms/chibios/boards/QMK_PROTON_C/configs/chconf.h b/platforms/chibios/boards/QMK_PROTON_C/configs/chconf.h index a0b1dcaba5c7..f81233296038 100644 --- a/platforms/chibios/boards/QMK_PROTON_C/configs/chconf.h +++ b/platforms/chibios/boards/QMK_PROTON_C/configs/chconf.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2020 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -29,27 +29,7 @@ #define CHCONF_H #define _CHIBIOS_RT_CONF_ -#define _CHIBIOS_RT_CONF_VER_7_0_ - -/*===========================================================================*/ -/** - * @name System settings - * @{ - */ -/*===========================================================================*/ - -/** - * @brief Handling of instances. - * @note If enabled then threads assigned to various instances can - * interact each other using the same synchronization objects. - * If disabled then each OS instance is a separate world, no - * direct interactions are handled by the OS. - */ -#if !defined(CH_CFG_SMP_MODE) -#define CH_CFG_SMP_MODE FALSE -#endif - -/** @} */ +#define _CHIBIOS_RT_CONF_VER_6_1_ /*===========================================================================*/ /** @@ -180,17 +160,6 @@ #define CH_CFG_USE_TM TRUE #endif -/** - * @brief Time Stamps APIs. - * @details If enabled then the time time stamps APIs are included in - * the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_CFG_USE_TIMESTAMP) -#define CH_CFG_USE_TIMESTAMP TRUE -#endif - /** * @brief Threads registry APIs. * @details If enabled then the registry APIs are included in the kernel. @@ -662,7 +631,7 @@ * @details User fields added to the end of the @p ch_system_t structure. */ #define CH_CFG_SYSTEM_EXTRA_FIELDS \ - /* Add system custom fields here.*/ + /* Add threads custom fields here.*/ /** * @brief System initialization hook. @@ -670,23 +639,7 @@ * just before interrupts are enabled globally. */ #define CH_CFG_SYSTEM_INIT_HOOK() { \ - /* Add system initialization code here.*/ \ -} - -/** - * @brief OS instance structure extension. - * @details User fields added to the end of the @p os_instance_t structure. - */ -#define CH_CFG_OS_INSTANCE_EXTRA_FIELDS \ - /* Add OS instance custom fields here.*/ - -/** - * @brief OS instance initialization hook. - * - * @param[in] oip pointer to the @p os_instance_t structure - */ -#define CH_CFG_OS_INSTANCE_INIT_HOOK(oip) { \ - /* Add OS instance initialization code here.*/ \ + /* Add threads initialization code here.*/ \ } /** @@ -702,8 +655,6 @@ * * @note It is invoked from within @p _thread_init() and implicitly from all * the threads creation APIs. - * - * @param[in] tp pointer to the @p thread_t structure */ #define CH_CFG_THREAD_INIT_HOOK(tp) { \ /* Add threads initialization code here.*/ \ @@ -712,8 +663,6 @@ /** * @brief Threads finalization hook. * @details User finalization code added to the @p chThdExit() API. - * - * @param[in] tp pointer to the @p thread_t structure */ #define CH_CFG_THREAD_EXIT_HOOK(tp) { \ /* Add threads finalization code here.*/ \ @@ -722,9 +671,6 @@ /** * @brief Context switch hook. * @details This hook is invoked just before switching between threads. - * - * @param[in] ntp thread being switched in - * @param[in] otp thread being switched out */ #define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) { \ /* Context switch code here.*/ \ @@ -799,14 +745,6 @@ /* Trace code here.*/ \ } -/** - * @brief Runtime Faults Collection Unit hook. - * @details This hook is invoked each time new faults are collected and stored. - */ -#define CH_CFG_RUNTIME_FAULTS_HOOK(mask) { \ - /* Faults handling code here.*/ \ -} - /** @} */ /*===========================================================================*/ diff --git a/platforms/chibios/boards/QMK_PROTON_C/configs/halconf.h b/platforms/chibios/boards/QMK_PROTON_C/configs/halconf.h index d876ee2a4209..d7a639a6d07f 100644 --- a/platforms/chibios/boards/QMK_PROTON_C/configs/halconf.h +++ b/platforms/chibios/boards/QMK_PROTON_C/configs/halconf.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2020 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -415,26 +415,6 @@ #define SERIAL_BUFFERS_SIZE 128 #endif -/*===========================================================================*/ -/* SIO driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Default bit rate. - * @details Configuration parameter, this is the baud rate selected for the - * default configuration. - */ -#if !defined(SIO_DEFAULT_BITRATE) || defined(__DOXYGEN__) -#define SIO_DEFAULT_BITRATE 38400 -#endif - -/** - * @brief Support for thread synchronization API. - */ -#if !defined(SIO_USE_SYNCHRONIZATION) || defined(__DOXYGEN__) -#define SIO_USE_SYNCHRONIZATION TRUE -#endif - /*===========================================================================*/ /* SERIAL_USB driver related setting. */ /*===========================================================================*/ diff --git a/platforms/chibios/boards/QMK_PROTON_C/configs/mcuconf.h b/platforms/chibios/boards/QMK_PROTON_C/configs/mcuconf.h index cab4c29cf659..4d7b586c085e 100644 --- a/platforms/chibios/boards/QMK_PROTON_C/configs/mcuconf.h +++ b/platforms/chibios/boards/QMK_PROTON_C/configs/mcuconf.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2020 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -186,6 +186,7 @@ /* * PWM driver system settings. */ +#define STM32_PWM_USE_ADVANCED FALSE #define STM32_PWM_USE_TIM1 FALSE #define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM3 TRUE diff --git a/platforms/chibios/boards/common/configs/chconf.h b/platforms/chibios/boards/common/configs/chconf.h index 005690007692..18ad609ca130 100644 --- a/platforms/chibios/boards/common/configs/chconf.h +++ b/platforms/chibios/boards/common/configs/chconf.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2020 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -29,27 +29,7 @@ #define CHCONF_H #define _CHIBIOS_RT_CONF_ -#define _CHIBIOS_RT_CONF_VER_7_0_ - -/*===========================================================================*/ -/** - * @name System settings - * @{ - */ -/*===========================================================================*/ - -/** - * @brief Handling of instances. - * @note If enabled then threads assigned to various instances can - * interact each other using the same synchronization objects. - * If disabled then each OS instance is a separate world, no - * direct interactions are handled by the OS. - */ -#if !defined(CH_CFG_SMP_MODE) -#define CH_CFG_SMP_MODE FALSE -#endif - -/** @} */ +#define _CHIBIOS_RT_CONF_VER_6_1_ /*===========================================================================*/ /** @@ -180,17 +160,6 @@ #define CH_CFG_USE_TM FALSE #endif -/** - * @brief Time Stamps APIs. - * @details If enabled then the time time stamps APIs are included in - * the kernel. - * - * @note The default is @p TRUE. - */ -#if !defined(CH_CFG_USE_TIMESTAMP) -#define CH_CFG_USE_TIMESTAMP TRUE -#endif - /** * @brief Threads registry APIs. * @details If enabled then the registry APIs are included in the kernel. @@ -662,7 +631,7 @@ * @details User fields added to the end of the @p ch_system_t structure. */ #define CH_CFG_SYSTEM_EXTRA_FIELDS \ - /* Add system custom fields here.*/ + /* Add threads custom fields here.*/ /** * @brief System initialization hook. @@ -670,23 +639,7 @@ * just before interrupts are enabled globally. */ #define CH_CFG_SYSTEM_INIT_HOOK() { \ - /* Add system initialization code here.*/ \ -} - -/** - * @brief OS instance structure extension. - * @details User fields added to the end of the @p os_instance_t structure. - */ -#define CH_CFG_OS_INSTANCE_EXTRA_FIELDS \ - /* Add OS instance custom fields here.*/ - -/** - * @brief OS instance initialization hook. - * - * @param[in] oip pointer to the @p os_instance_t structure - */ -#define CH_CFG_OS_INSTANCE_INIT_HOOK(oip) { \ - /* Add OS instance initialization code here.*/ \ + /* Add threads initialization code here.*/ \ } /** @@ -702,8 +655,6 @@ * * @note It is invoked from within @p _thread_init() and implicitly from all * the threads creation APIs. - * - * @param[in] tp pointer to the @p thread_t structure */ #define CH_CFG_THREAD_INIT_HOOK(tp) { \ /* Add threads initialization code here.*/ \ @@ -712,8 +663,6 @@ /** * @brief Threads finalization hook. * @details User finalization code added to the @p chThdExit() API. - * - * @param[in] tp pointer to the @p thread_t structure */ #define CH_CFG_THREAD_EXIT_HOOK(tp) { \ /* Add threads finalization code here.*/ \ @@ -722,9 +671,6 @@ /** * @brief Context switch hook. * @details This hook is invoked just before switching between threads. - * - * @param[in] ntp thread being switched in - * @param[in] otp thread being switched out */ #define CH_CFG_CONTEXT_SWITCH_HOOK(ntp, otp) { \ /* Context switch code here.*/ \ @@ -799,14 +745,6 @@ /* Trace code here.*/ \ } -/** - * @brief Runtime Faults Collection Unit hook. - * @details This hook is invoked each time new faults are collected and stored. - */ -#define CH_CFG_RUNTIME_FAULTS_HOOK(mask) { \ - /* Faults handling code here.*/ \ -} - /** @} */ /*===========================================================================*/ diff --git a/platforms/chibios/boards/common/configs/halconf.h b/platforms/chibios/boards/common/configs/halconf.h index 3d77749fd5ef..c80f67ee27c1 100644 --- a/platforms/chibios/boards/common/configs/halconf.h +++ b/platforms/chibios/boards/common/configs/halconf.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2020 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -415,26 +415,6 @@ #define SERIAL_BUFFERS_SIZE 128 #endif -/*===========================================================================*/ -/* SIO driver related settings. */ -/*===========================================================================*/ - -/** - * @brief Default bit rate. - * @details Configuration parameter, this is the baud rate selected for the - * default configuration. - */ -#if !defined(SIO_DEFAULT_BITRATE) || defined(__DOXYGEN__) -#define SIO_DEFAULT_BITRATE 38400 -#endif - -/** - * @brief Support for thread synchronization API. - */ -#if !defined(SIO_USE_SYNCHRONIZATION) || defined(__DOXYGEN__) -#define SIO_USE_SYNCHRONIZATION TRUE -#endif - /*===========================================================================*/ /* SERIAL_USB driver related setting. */ /*===========================================================================*/ diff --git a/util/update_chibios_mirror.sh b/util/update_chibios_mirror.sh index b7e96a93059a..0bf648ebfd27 100755 --- a/util/update_chibios_mirror.sh +++ b/util/update_chibios_mirror.sh @@ -7,7 +7,7 @@ chibios_branches="trunk stable_20.3.x stable_21.6.x" # The ChibiOS tags to mirror -chibios_tags="ver20.3.1 ver20.3.2 ver20.3.3 ver21.6.0" +chibios_tags="ver20.3.1 ver20.3.2 ver20.3.3 ver20.3.4 ver21.6.0" # The ChibiOS-Contrib branches to mirror contrib_branches="chibios-20.3.x chibios-21.6.x" From 5230f2bc2731aab9f0500989d6c9b44ba4a93247 Mon Sep 17 00:00:00 2001 From: Nick Brassel Date: Wed, 3 Nov 2021 06:49:43 +1100 Subject: [PATCH 9/9] Rollback L422-based boards. --- builddefs/mcu_selection.mk | 4 +- .../GENERIC_STM32_L412XB/configs/board.h | 5 +- .../GENERIC_STM32_L412XB/configs/mcuconf.h | 63 ++++++++++++++----- 3 files changed, 54 insertions(+), 18 deletions(-) diff --git a/builddefs/mcu_selection.mk b/builddefs/mcu_selection.mk index db48af4497a9..1251b7a2b7c2 100644 --- a/builddefs/mcu_selection.mk +++ b/builddefs/mcu_selection.mk @@ -532,7 +532,7 @@ ifneq (,$(filter $(MCU),STM32L412 STM32L422)) # /boards/, or drivers/boards/ BOARD ?= GENERIC_STM32_L412XB - PLATFORM_NAME ?= platform_l412_l422 + PLATFORM_NAME ?= platform_l432 USE_FPU ?= yes @@ -543,7 +543,7 @@ endif ifneq ($(findstring GD32VF103, $(MCU)),) # RISC-V MCU = risc-v - + # RISC-V extensions and abi configuration MCU_ARCH = rv32imac MCU_ABI = ilp32 diff --git a/platforms/chibios/boards/GENERIC_STM32_L412XB/configs/board.h b/platforms/chibios/boards/GENERIC_STM32_L412XB/configs/board.h index de5f85acdd99..2e37d95fe39a 100644 --- a/platforms/chibios/boards/GENERIC_STM32_L412XB/configs/board.h +++ b/platforms/chibios/boards/GENERIC_STM32_L412XB/configs/board.h @@ -18,4 +18,7 @@ #include_next "board.h" #undef STM32L432xx -#define STM32L422xx + +// Pretend that we're an L443xx as the ChibiOS definitions for L4x2/L4x3 mistakenly don't enable GPIOH, I2C2, or SPI2. +// Until ChibiOS upstream is fixed, this should be kept at L443, as nothing in QMK currently utilises the crypto peripheral on the L443. +#define STM32L443xx diff --git a/platforms/chibios/boards/GENERIC_STM32_L412XB/configs/mcuconf.h b/platforms/chibios/boards/GENERIC_STM32_L412XB/configs/mcuconf.h index e1fd08872b37..8ad5a8da2163 100644 --- a/platforms/chibios/boards/GENERIC_STM32_L412XB/configs/mcuconf.h +++ b/platforms/chibios/boards/GENERIC_STM32_L412XB/configs/mcuconf.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2020 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -32,7 +32,12 @@ #define MCUCONF_H #define STM32L4xx_MCUCONF +#define STM32L412_MCUCONF #define STM32L422_MCUCONF +#define STM32L432_MCUCONF +#define STM32L433_MCUCONF +#define STM32L442_MCUCONF +#define STM32L443_MCUCONF /* * HAL driver system settings. @@ -47,14 +52,17 @@ #define STM32_HSE_ENABLED FALSE #define STM32_LSE_ENABLED FALSE #define STM32_MSIPLL_ENABLED FALSE +#define STM32_ADC_CLOCK_ENABLED TRUE +#define STM32_USB_CLOCK_ENABLED TRUE +#define STM32_SAI1_CLOCK_ENABLED TRUE +#define STM32_SAI2_CLOCK_ENABLED TRUE #define STM32_MSIRANGE STM32_MSIRANGE_4M #define STM32_MSISRANGE STM32_MSISRANGE_4M #define STM32_SW STM32_SW_PLL #define STM32_PLLSRC STM32_PLLSRC_HSI16 #define STM32_PLLM_VALUE 4 #define STM32_PLLN_VALUE 80 -#define STM32_PLLPDIV_VALUE 0 -#define STM32_PLLP_VALUE 0 +#define STM32_PLLP_VALUE 7 #define STM32_PLLQ_VALUE 4 #define STM32_PLLR_VALUE 4 #define STM32_HPRE STM32_HPRE_DIV1 @@ -65,21 +73,29 @@ #define STM32_MCOPRE STM32_MCOPRE_DIV1 #define STM32_LSCOSEL STM32_LSCOSEL_NOCLOCK #define STM32_PLLSAI1N_VALUE 72 -#define STM32_PLLSAI1PDIV_VALUE 6 #define STM32_PLLSAI1P_VALUE 7 #define STM32_PLLSAI1Q_VALUE 6 #define STM32_PLLSAI1R_VALUE 6 +#define STM32_PLLSAI2N_VALUE 72 +#define STM32_PLLSAI2P_VALUE 7 +#define STM32_PLLSAI2R_VALUE 6 /* * Peripherals clock sources. */ #define STM32_USART1SEL STM32_USART1SEL_SYSCLK #define STM32_USART2SEL STM32_USART2SEL_SYSCLK +#define STM32_USART3SEL STM32_USART3SEL_SYSCLK +#define STM32_UART4SEL STM32_UART4SEL_SYSCLK +#define STM32_UART5SEL STM32_UART5SEL_SYSCLK #define STM32_LPUART1SEL STM32_LPUART1SEL_SYSCLK #define STM32_I2C1SEL STM32_I2C1SEL_SYSCLK +#define STM32_I2C2SEL STM32_I2C2SEL_SYSCLK #define STM32_I2C3SEL STM32_I2C3SEL_SYSCLK #define STM32_LPTIM1SEL STM32_LPTIM1SEL_PCLK1 #define STM32_LPTIM2SEL STM32_LPTIM2SEL_PCLK1 +#define STM32_SAI1SEL STM32_SAI1SEL_OFF +#define STM32_SAI2SEL STM32_SAI2SEL_OFF #define STM32_CLK48SEL STM32_CLK48SEL_HSI48 #define STM32_ADCSEL STM32_ADCSEL_SYSCLK #define STM32_SWPMI1SEL STM32_SWPMI1SEL_PCLK1 @@ -111,6 +127,7 @@ #define STM32_IRQ_USART1_PRIORITY 12 #define STM32_IRQ_USART2_PRIORITY 12 +#define STM32_IRQ_USART3_PRIORITY 12 #define STM32_IRQ_LPUART1_PRIORITY 12 /* @@ -120,15 +137,29 @@ #define STM32_ADC_USE_ADC1 FALSE #define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(1, 1) #define STM32_ADC_ADC1_DMA_PRIORITY 2 -#define STM32_ADC_USE_ADC2 FALSE -#define STM32_ADC_ADC2_DMA_STREAM STM32_DMA_STREAM_ID(1, 2) -#define STM32_ADC_ADC2_DMA_PRIORITY 2 #define STM32_ADC_ADC12_IRQ_PRIORITY 5 #define STM32_ADC_ADC1_DMA_IRQ_PRIORITY 5 -#define STM32_ADC_ADC2_DMA_IRQ_PRIORITY 5 #define STM32_ADC_ADC123_CLOCK_MODE ADC_CCR_CKMODE_AHB_DIV1 #define STM32_ADC_ADC123_PRESC ADC_CCR_PRESC_DIV2 +/* + * CAN driver system settings. + */ +#define STM32_CAN_USE_CAN1 FALSE +#define STM32_CAN_CAN1_IRQ_PRIORITY 11 + +/* + * DAC driver system settings. + */ +#define STM32_DAC_DUAL_MODE FALSE +#define STM32_DAC_USE_DAC1_CH1 FALSE +#define STM32_DAC_USE_DAC1_CH2 FALSE +#define STM32_DAC_DAC1_CH1_IRQ_PRIORITY 10 +#define STM32_DAC_DAC1_CH2_IRQ_PRIORITY 10 +#define STM32_DAC_DAC1_CH1_DMA_PRIORITY 2 +#define STM32_DAC_DAC1_CH2_DMA_PRIORITY 2 +#define STM32_DAC_DAC1_CH1_DMA_STREAM STM32_DMA_STREAM_ID(2, 4) +#define STM32_DAC_DAC1_CH2_DMA_STREAM STM32_DMA_STREAM_ID(1, 4) /* * GPT driver system settings. @@ -167,6 +198,7 @@ /* * PWM driver system settings. */ +#define STM32_PWM_USE_ADVANCED FALSE #define STM32_PWM_USE_TIM1 FALSE #define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM15 FALSE @@ -186,22 +218,23 @@ #define STM32_SERIAL_USE_USART1 FALSE #define STM32_SERIAL_USE_USART2 FALSE #define STM32_SERIAL_USE_LPUART1 FALSE - -/* - * SIO driver system settings. - */ -#define STM32_SIO_USE_USART1 FALSE -#define STM32_SIO_USE_USART2 FALSE -#define STM32_SIO_USE_LPUART1 FALSE +#define STM32_SERIAL_USART1_PRIORITY 12 +#define STM32_SERIAL_USART2_PRIORITY 12 +#define STM32_SERIAL_LPUART1_PRIORITY 12 /* * SPI driver system settings. */ #define STM32_SPI_USE_SPI1 FALSE +#define STM32_SPI_USE_SPI3 FALSE #define STM32_SPI_SPI1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 3) #define STM32_SPI_SPI1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 4) +#define STM32_SPI_SPI3_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 1) +#define STM32_SPI_SPI3_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) #define STM32_SPI_SPI1_DMA_PRIORITY 1 +#define STM32_SPI_SPI3_DMA_PRIORITY 1 #define STM32_SPI_SPI1_IRQ_PRIORITY 10 +#define STM32_SPI_SPI3_IRQ_PRIORITY 10 #define STM32_SPI_DMA_ERROR_HOOK(spip) osalSysHalt("DMA failure") /*