-
Notifications
You must be signed in to change notification settings - Fork 31
/
Copy pathvfpu.rs
5795 lines (5340 loc) · 165 KB
/
vfpu.rs
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
//! VFPU support.
/// A macro-based VFPU assembler.
///
/// This follows the standard Rust `asm!` macro syntax, with support for VFPU
/// instructions.
///
/// Limitations:
///
/// - Currently, registers cannot be specified by name in operands. For example
/// this is invalid: `out("t0") _`, instead you must use `out("$8")`.
///
/// # A note on transposed matrices
///
/// While some documentation online suggests that the `M___` registers represent
/// matrices, and the adjacent `E___` registers represent their inverse, this is
/// somewhat wrong.
///
/// It can be better said that `M___` interprets the registers as being stored
/// in row-major format, and `E___` interprets the registers as being stored in
/// column-major format. While many instructions (`vmmov`, `vmidt`, `vmzero`)
/// aren't sensitive to matrix transpositions, this matters for `vtfm_` and
/// `vhtfm_`.
///
/// `vmmul` is an exception to this rule. See [this comment] for more details.
///
/// [this comment]: https://github.com/overdrivenpotato/rust-psp/issues/112#issuecomment-1043535976
#[macro_export]
macro_rules! vfpu_asm {
// Kickstart the parser.
($($t:tt)*) => {{
$crate::vfpu_asm_next!((asm:) () $($t)*)
}};
}
#[doc(hidden)]
#[macro_export]
macro_rules! vfpu_asm_next {
// Extract an assembly literal.
((asm: $($a:tt)* ) () $code2:literal $(, $($t:tt)*)?) => {
$crate::unstringify!(let $tokens = unstringify!($code2) in {
$crate::vfpu_asm_next!((asm: $($a)* ($crate::instruction!($tokens))) () $($($t)*)?)
})
};
// Extract a stringified assembly literal.
((asm: $($a:tt)* ) () stringify!( $($token:tt)* ) $(, $($t:tt)*)?) => {
$crate::vfpu_asm_next!((asm: $($a)* ($crate::instruction!($($token)*))) () $($($t)*)?)
};
// If the next token isn't a directive, start parsing operands.
((asm: $($a:tt)* ) () $($t:tt)*) => {
$crate::vfpu_asm_next!((asm: $($a)* ) (ops: ) $($t)*)
};
// Extract an option directive.
((asm: $($a:tt)* ) (ops: $($b:tt)* ) options($($option:ident),+) $(, $($t:tt)*)?) => {
$crate::vfpu_asm_next!((asm: $($a)* ) (ops: $($b)* (options ($($option),+);) ) $($($t),*)? )
};
// Extract an unaliased register operand.
((asm: $($a:tt)* ) (ops: $($b:tt)* ) $op:ident($reg:tt) $place1:tt $(=> $place2:tt)? $(, $($t:tt)*)?) => {
$crate::vfpu_asm_next!((asm: $($a)* ) (ops: $($b)* (regop $op($reg) $place1 $(=> $place2)? ;) ) $($($t)*)? )
};
// Extract an aliased register operand.
((asm: $($a:tt)* ) (ops: $($b:tt)* ) $alias:ident = $op:ident($reg:tt) $place1:tt $(=> $place2:tt)? $(, $($t:tt)*)?) => {
$crate::vfpu_asm_next!((asm: $($a)* ) (ops: $($b)* (regop [$alias =] $op($reg) $place1 $(=> $place2)? ;) ) $($($t)*)? )
};
// Extract an unaliased const operand.
((asm: $($a:tt)* ) (ops: $($b:tt)* ) const $val:expr $(, $($t:tt)*)?) => {
$crate::vfpu_asm_next!((asm: $($a)* ) (ops: $($b)* (const_ $val ;) ) $($($t)*)? )
};
// Extract an aliased const operand.
((asm: $($a:tt)* ) (ops: $($b:tt)* ) $alias:ident = const $ex:expr $(, $($t:tt)*)?) => {
$crate::vfpu_asm_next!((asm: $($a)* ) (ops: $($b)* (const_ [$alias =] $ex ;) ) $($($t)*)? )
};
// Extract an unaliased sym operand.
((asm: $($a:tt)* ) (ops: $($b:tt)* ) sym $pa:path $(, $($t:tt)*)?) => {
$crate::vfpu_asm_next!((asm: $($a)* ) (ops: $($b)* (sym $pa ;) ) $($($t)*)? )
};
// Extract an aliased sym operand.
((asm: $($a:tt)* ) (ops: $($b:tt)* ) $alias:ident = sym $pa:path $(, $($t:tt)*)?) => {
$crate::vfpu_asm_next!((asm: $($a)* ) (ops: $($b)* (sym [$alias =] $pa ;) ) $($($t)*)? )
};
// No more tokens to parse. Build the assembly.
(
(asm: $( ( $($asm:tt)* ) )+)
$((ops:
$((
$(regop $([$io_name:tt =])? $op:ident($io_reg:tt) $io_p1:tt $(=> $io_p2:tt)? ;)?
$(const_ $([$c_name:tt =])? $c_expr:expr ;)?
$(sym $([$s_name:tt =])? $s_path:path ;)?
$(options ($($option:ident),+) ;)?
))*
))?
) => {{
#[cfg(target_os = "psp")]
{
core::arch::asm!(
".set push",
".set noreorder",
".set noat",
".set __psp_regnum_$0, 0",
".set __psp_regnum_$1, 1",
".set __psp_regnum_$2, 2",
".set __psp_regnum_$3, 3",
".set __psp_regnum_$4, 4",
".set __psp_regnum_$5, 5",
".set __psp_regnum_$6, 6",
".set __psp_regnum_$7, 7",
".set __psp_regnum_$8, 8",
".set __psp_regnum_$9, 9",
".set __psp_regnum_$10, 10",
".set __psp_regnum_$11, 11",
".set __psp_regnum_$12, 12",
".set __psp_regnum_$13, 13",
".set __psp_regnum_$14, 14",
".set __psp_regnum_$15, 15",
".set __psp_regnum_$16, 16",
".set __psp_regnum_$17, 17",
".set __psp_regnum_$18, 18",
".set __psp_regnum_$19, 19",
".set __psp_regnum_$20, 20",
".set __psp_regnum_$21, 21",
".set __psp_regnum_$22, 22",
".set __psp_regnum_$23, 23",
".set __psp_regnum_$24, 24",
".set __psp_regnum_$25, 25",
".set __psp_regnum_$26, 26",
".set __psp_regnum_$27, 27",
".set __psp_regnum_$28, 28",
".set __psp_regnum_$29, 29",
".set __psp_regnum_$30, 30",
".set __psp_regnum_$31, 31",
// TODO: Can VFPU instructions ever even access coproc1 registers?
// If not, this part can be removed.
//
".set __psp_regnum_$f0, 0",
".set __psp_regnum_$f1, 1",
".set __psp_regnum_$f2, 2",
".set __psp_regnum_$f3, 3",
".set __psp_regnum_$f4, 4",
".set __psp_regnum_$f5, 5",
".set __psp_regnum_$f6, 6",
".set __psp_regnum_$f7, 7",
".set __psp_regnum_$f8, 8",
".set __psp_regnum_$f9, 9",
".set __psp_regnum_$f10, 10",
".set __psp_regnum_$f11, 11",
".set __psp_regnum_$f12, 12",
".set __psp_regnum_$f13, 13",
".set __psp_regnum_$f14, 14",
".set __psp_regnum_$f15, 15",
".set __psp_regnum_$f16, 16",
".set __psp_regnum_$f17, 17",
".set __psp_regnum_$f18, 18",
".set __psp_regnum_$f19, 19",
".set __psp_regnum_$f20, 20",
".set __psp_regnum_$f21, 21",
".set __psp_regnum_$f22, 22",
".set __psp_regnum_$f23, 23",
".set __psp_regnum_$f24, 24",
".set __psp_regnum_$f25, 25",
".set __psp_regnum_$f26, 26",
".set __psp_regnum_$f27, 27",
".set __psp_regnum_$f28, 28",
".set __psp_regnum_$f29, 29",
".set __psp_regnum_$f30, 30",
".set __psp_regnum_$f31, 31",
// This block defines a macro, and a symbol to guard that macro so
// that it is only defined once. The macro is equivalent to:
//
// __psp_reg_or(register, left shift, orval)
//
// Arguments:
// - register: The register name, as spit out by the rust assembler.
// E.g. $1, $5, or $f0, $f13, etc..
// - left shift: The mount to shift the register number left by
// - orval: The value to or the shifted register with
//
// Once invoked, the macro defines a .word value, so it can be used
// with an instruction template to create VFPU instructions.
//
// The registers are converted to numbers with the use of the above
// variables, following the `__psp_regnum_$N` pattern, where N is
// the register number, (0, 5, f0, f13).
".ifndef __psp_reg_or_defined",
".set __psp_reg_or_defined, 1",
".macro __psp_reg_or reg lshift orval",
".word ((__psp_regnum_\\()\\reg\\() << \\lshift)|\\orval)",
".endm",
".endif",
".align 2",
$( $($asm)* ),*,
".set pop",
$(
$(
$($($io_name =)? $op($io_reg) $io_p1 $(=> $io_p2)?)?
$($($c_name =)? const $c_expr)?
$($($s_name =)? sym $s_path)?
$(options ($($option),*))?
),*
)?
)
}
#[cfg(not(target_os = "psp"))]
{
// The type signature here lets you obtain any value, which avoids
// dead code warnings.
//
// Adding `unsafe` ensures that the macro caller always calls PSP
// assembly in an unsafe context.
#[inline(always)]
unsafe fn die<T>() -> T {
panic!("tried running vfpu_asm on a non-PSP platform");
}
die::<()>();
// Fix errors for output variables which are never assigned). The
// type can be anything due to the signature of `die`.
$(
$(
{
$($crate::psp_asm_discard!(regop $op $io_p1 $(=> $io_p2)?);)?
$($crate::psp_asm_discard!(const_ $c_expr);)?
}
)*
)?
}
}};
}
/// Like `stringify!`, but with several extra features:
///
/// # Preserves assembly string templates
///
/// Assembly strings break when spaces are added, i.e.:
///
/// ```rust,compile_fail
/// asm!("xor { }, { }", out("eax") _);
/// ```
///
/// This macro preserves format strings, and also understands double braces:
///
/// ```
/// let s = format!(stringify_asm!(op { }, { 2 : ? }, {{{1}}}), 123, 456, "test");
/// assert_eq!(s, r#"op 123 , "test" , { 456 }"#));
/// ```
///
/// # Register names
///
/// This macro automatically converts register names (`a0`, `t4`, `s2`, etc) to
/// corresponding numbers (`$4`, `$12`, etc).
#[macro_export]
#[doc(hidden)]
macro_rules! stringify_asm {
// Catch double braces.
({{ $($t1:tt)* }} $($($t2:tt)+)?) => {
concat!("{{ ", concat!($crate::stringify_asm!($($t1)*)), " }}" $(, " ", $crate::stringify_asm!($($t2)+))?)
};
// Catch fmt directives.
({ $($t1:tt)* } $($($t2:tt)+)?) => {
concat!("{", concat!($(stringify!($t1)),*), "}" $(, " ", $crate::stringify_asm!($($t2)+))?)
};
// Catch preprocessor directives
(. $a:ident $($($t2:tt)+)?) => {
concat!(
".", stringify!($a)
$(, " ", $crate::stringify_asm!($($t2)+))?
)
};
// Catch mnemonics with 3 dots
($a:ident . $b:ident . $c:ident $($($t2:tt)+)?) => {
concat!(
stringify!($a), ".", stringify!($b), ".", stringify!($c)
$(, " ", $crate::stringify_asm!($($t2)+))?
)
};
// We can't make a rule for dollar signs due to macro limitations. This is
// a workaround that attempts to parse a dollar sign anyways.
($t1:tt $t2:tt $($t3:tt)*) => {
$crate::try_stringify_reg!(($t1) $t2 $($t3)*)
};
// Base case.
($token:tt) => { $crate::try_stringify_mips_reg!($token) };
}
#[macro_export]
#[doc(hidden)]
macro_rules! psp_asm_discard {
(regop inout $io_p1:tt => _) => {
let _ = $io_p1;
};
(regop inout $io_p1:tt => $io_p2:tt) => {
let _ = $io_p1;
$io_p2 = die();
};
(regop inlateout $io_p1:tt => _) => {
let _ = $io_p1;
};
(regop inlateout $io_p1:tt => $io_p2:tt) => {
let _ = $io_p1;
$io_p2 = die();
};
(regop out _) => {};
(regop out $io_p1:tt) => {
$io_p1 = die();
};
(regop lateout $io_p1:tt) => {
$io_p1 = die();
};
(regop in $io_p1:tt) => {
let _ = $io_p1;
};
(regop const_ $c_expr:expr) => {
let _ = $c_expr;
};
}
#[macro_export]
#[doc(hidden)]
macro_rules! try_stringify_reg {
(($) $b:tt $($($t:tt)+)?) => {
concat!("$", stringify!($b) $(, " ", $crate::stringify_asm!($($t)+))? )
};
// If nothing else, try to interpret this as a register mnemonic.
(($a:tt) $b:tt $($t:tt)*) => {
concat!($crate::try_stringify_mips_reg!($a), " ", $crate::stringify_asm!($b $($t)*) )
};
}
// The instruction encodings here were mainly obtained from the following link:
// http://hitmen.c02.at/files/yapspd/psp_doc/chap4.html#sec4.9
//
// Missing instructions were discovered via PSP toolchain GCC patches.
//
// Almost all instructions here were generated using vim macros operating on the
// table linked above.
#[macro_export]
#[doc(hidden)]
macro_rules! instruction {
// No offset
(lv.s $t:ident, $s:tt) => { $crate::instruction!(lv.s $t, 0($s)) };
// lv.s 110110ss sssttttt oooooooo oooooo0t
(lv.s $t:ident, $offset:literal ( $s:tt )) => {
concat!(
"__psp_reg_or ", $crate::stringify_asm!($s), " (16+5) ", " (",
"(0b11001000 << 24) | ",
"((", $crate::register_single!($t), "& 0b11111) << 16) | ",
"((((", stringify!($offset), " / 4) >> 6) & 0xff) << 8) | ",
"(((", stringify!($offset), " / 4) << 2) & 0xff) | ((", $crate::register_single!($t), " >> 5) & 1)",
")",
)
};
// No offset
(lv.q $t:ident, $s:tt) => { $crate::instruction!(lv.q $t, 0($s)) };
// lv.q 110110ss sssttttt oooooooo oooooo0t
(lv.q $t:ident, $offset:literal ( $s:tt )) => {
concat!(
"__psp_reg_or ", $crate::stringify_asm!($s), " (16+5) ", " (",
"(0b11011000 << 24) | ",
"((", $crate::register_quad!($t), "& 0b11111) << 16) | ",
"((((", stringify!($offset), " / 4) >> 6) & 0xff) << 8) | ",
"(((", stringify!($offset), " / 4) << 2) & 0xff) | ((", $crate::register_quad!($t), " >> 5) & 1)",
")",
)
};
// No offset, no writeback
(sv.s $t:ident, $s:tt) => {
$crate::instruction!(sv.s $t, 0($s), wb:0)
};
// No offset, has writeback
(sv.s $t:ident, $s:tt, wb) => {
$crate::instruction!(sv.s $t, 0($s), wb:1)
};
// Has offset, no writeback
(sv.s $t:ident, $offset:literal ( $s:tt )) => {
$crate::instruction!(sv.s $t, $offset ($s), wb:0)
};
// Has offset, has writeback
(sv.s $t:ident, $offset:literal ( $s:tt ), wb) => {
$crate::instruction!(sv.s $t, $offset ($s), wb:1)
};
// sv.s 111110ss sssttttt oooooooo oooooowt
(sv.s $t:ident, $offset:literal ( $s:tt ), wb:$wb:literal) => {
concat!(
"__psp_reg_or ", $crate::stringify_asm!($s), " (16+5) (",
"(0b11101000 << 24) | ",
"((", $crate::register_single!($t), " & 0b11111) << 16) | ",
"((((", stringify!($offset), " / 4) >> 6) & 0xff) << 8) | ",
"(((", stringify!($offset), " / 4) << 2) & 0xff) | ",
"((", $crate::register_single!($t), " >> 5) & 1) | ",
"(", stringify!($wb), " << 1)",
")",
)
};
// No offset, no writeback
(sv.q $t:ident, $s:tt) => {
$crate::instruction!(sv.q $t, 0($s), wb:0)
};
// No offset, has writeback
(sv.q $t:ident, $s:tt, wb) => {
$crate::instruction!(sv.q $t, 0($s), wb:1)
};
// Has offset, no writeback
(sv.q $t:ident, $offset:literal ( $s:tt )) => {
$crate::instruction!(sv.q $t, $offset ($s), wb:0)
};
// Has offset, has writeback
(sv.q $t:ident, $offset:literal ( $s:tt ), wb) => {
$crate::instruction!(sv.q $t, $offset ($s), wb:1)
};
// sv.q 111110ss sssttttt oooooooo oooooowt
(sv.q $t:ident, $offset:literal ( $s:tt ), wb:$wb:literal) => {
concat!(
"__psp_reg_or ", $crate::stringify_asm!($s), " (16+5) (",
"(0b11111000 << 24) | ",
"((", $crate::register_quad!($t), " & 0b11111) << 16) | ",
"((((", stringify!($offset), " / 4) >> 6) & 0xff) << 8) | ",
"(((", stringify!($offset), " / 4) << 2) & 0xff) | ",
"((", $crate::register_quad!($t), " >> 5) & 1) | ",
"(", stringify!($wb), " << 1)",
")",
)
};
// mtv 0100 1000 111 sssss 0000 0000 0 ddddddd
(mtvc $t:ident, $s:ident) => { $crate::instruction!(mtv $t, $s) };
(mtv $s:tt, $d:ident) => {
concat!(
"__psp_reg_or ", $crate::stringify_asm!($s), " 16 (",
"(0b01001000 << 24) | ",
"(0b11100000 << 16) | ",
"(0 << 8) |",
$crate::register_single!($d),
")",
)
};
// mfv 0100 1000 011 ddddd 000000000 sssssss
(mfvc $t:ident, $s:ident) => { $crate::instruction!(mfv $t, $s) };
(mfv $d:tt, $s:ident) => {
concat!(
"__psp_reg_or ", $crate::stringify_asm!($d), " 16 (",
"(0b01001000 << 24) | ",
"(0b01100000 << 16) | ",
"(0 << 8) |",
$crate::register_single!($s),
")",
)
};
(vpfxd $($t:tt)*) => {
$crate::vpfx_instr!(_vpfxd_internal (stack:) (cur:) $($t)*);
};
(_vpfxd_internal [$($x:tt)*]) => {
$crate::instruction!(_vpfxd_internal [$($x)*], [])
};
(_vpfxd_internal [$($x:tt)*], [$($y:tt)*]) => {
$crate::instruction!(_vpfxd_internal [$($x)*], [$($y)*], [])
};
(_vpfxd_internal [$($x:tt)*], [$($y:tt)*], [$($z:tt)*]) => {
$crate::instruction!(_vpfxd_internal [$($x)*], [$($y)*], [$($z)*], [])
};
// vpfxd 1101 1110 iiiiiiii iiiiiiii iiiiiiii
(_vpfxd_internal [$($x:tt)*], [$($y:tt)*], [$($z:tt)*], [$($w:tt)*]) => {
concat!(
".word (0b11011110 << 24)",
// First the lowest byte
"| (", $crate::instruction_prefix_d!($($x)*), " & 0x3)",
"| ((", $crate::instruction_prefix_d!($($y)*), " & 0x3) << 2)",
"| ((", $crate::instruction_prefix_d!($($z)*), " & 0x3) << 4)",
"| ((", $crate::instruction_prefix_d!($($w)*), " & 0x3) << 6)",
// Then the rest
"| (", $crate::instruction_prefix_d!($($x)*), " & 0xffff00)",
"| ((", $crate::instruction_prefix_d!($($y)*), " & 0xffff00) << 1)",
"| ((", $crate::instruction_prefix_d!($($z)*), " & 0xffff00) << 2)",
"| ((", $crate::instruction_prefix_d!($($w)*), " & 0xffff00) << 3)",
)
};
// Internal pre-parse variants of this prefix instruction. Arguments are
// surrounded by square brackets for easy use.
(vpfxs $($x:tt)+) => {
$crate::vpfx_instr!(_vpfxs_internal (stack:) (cur:) $($x)+)
};
// vpfxs 1101 1100 iiiiiiii iiiiiiii iiiiiiii
(_vpfxs_internal [$($x:tt)+], [$($y:tt)+], [$($z:tt)+], [$($w:tt)+]) => {
concat!(
".word (0b11011100 << 24)",
// First the lowest byte
"| (", $crate::instruction_prefix!($($x)+), " & 0x3)",
"| ((", $crate::instruction_prefix!($($y)+), " & 0x3) << 2)",
"| ((", $crate::instruction_prefix!($($z)+), " & 0x3) << 4)",
"| ((", $crate::instruction_prefix!($($w)+), " & 0x3) << 6)",
// Then the rest
"| (", $crate::instruction_prefix!($($x)+), " & 0xffff00)",
"| ((", $crate::instruction_prefix!($($y)+), " & 0xffff00) << 1)",
"| ((", $crate::instruction_prefix!($($z)+), " & 0xffff00) << 2)",
"| ((", $crate::instruction_prefix!($($w)+), " & 0xffff00) << 3)",
)
};
(_vpfxs_internal [$($x:tt)+]) => {
$crate::instruction!(_vpfxs_internal [$($x)+], [Y])
};
(_vpfxs_internal [$($x:tt)+], [$($y:tt)+]) => {
$crate::instruction!(_vpfxs_internal [$($x)+], [$($y)+], [Z])
};
(_vpfxs_internal [$($x:tt)+], [$($y:tt)+], [$($z:tt)+]) => {
$crate::instruction!(_vpfxs_internal [$($x)+], [$($y)+], [$($z)+], [W])
};
(vpfxt $($x:tt)+) => {
$crate::vpfx_instr!(_vpfxt_internal (stack:) (cur:) $($x)+)
};
(_vpfxt_internal [$($x:tt)+]) => {
$crate::instruction!(_vpfxt_internal [$($x)+], [Y])
};
(_vpfxt_internal [$($x:tt)+], [$($y:tt)+]) => {
$crate::instruction!(_vpfxt_internal [$($x)+], [$($y)+], [Z])
};
(_vpfxt_internal [$($x:tt)+], [$($y:tt)+], [$($z:tt)+]) => {
$crate::instruction!(_vpfxt_internal [$($x)+], [$($y)+], [$($z)+], [W])
};
// vpfxs 1101 1101 iiiiiiii iiiiiiii iiiiiiii
(_vpfxt_internal [$($x:tt)+], [$($y:tt)+], [$($z:tt)+], [$($w:tt)+]) => {
concat!(
".word (0b11011101 << 24)",
// First the lowest byte
"| (", $crate::instruction_prefix!($($x)+), " & 0x3)",
"| ((", $crate::instruction_prefix!($($y)+), " & 0x3) << 2)",
"| ((", $crate::instruction_prefix!($($z)+), " & 0x3) << 4)",
"| ((", $crate::instruction_prefix!($($w)+), " & 0x3) << 6)",
// Then the rest
"| (", $crate::instruction_prefix!($($x)+), " & 0xffff00)",
"| ((", $crate::instruction_prefix!($($y)+), " & 0xffff00) << 1)",
"| ((", $crate::instruction_prefix!($($z)+), " & 0xffff00) << 2)",
"| ((", $crate::instruction_prefix!($($w)+), " & 0xffff00) << 3)",
)
};
// Performs element-wise floating point absolute value
(vabs.s $rd:ident $([$($rdp:tt)+])?, $rs:ident $([$($rsp:tt)+])?) => {
concat!(
$($crate::instruction!(vpfxd $($rdp)*), "\n",)?
$($crate::instruction!(vpfxs $($rsp)*), "\n",)?
".word 0b11010000000000000000000000000000",
"| (", $crate::register_single!($rd), " << 0)",
"| (", $crate::register_single!($rs), " << 8)",
"| (0b0000001 << 16)",
)
};
(vabs.p $rd:ident $([$($rdp:tt)+])?, $rs:ident $([$($rsp:tt)+])?) => {
concat!(
$($crate::instruction!(vpfxd $($rdp)*), "\n",)?
$($crate::instruction!(vpfxs $($rsp)*), "\n",)?
".word 0b11010000000000000000000000000000",
"| 0b0000000010000000",
"| (", $crate::register_pair!($rd), " << 0)",
"| (", $crate::register_pair!($rs), " << 8)",
"| (0b0000001 << 16)",
)
};
(vabs.t $rd:ident $([$($rdp:tt)+])?, $rs:ident $([$($rsp:tt)+])?) => {
concat!(
$($crate::instruction!(vpfxd $($rdp)*), "\n",)?
$($crate::instruction!(vpfxs $($rsp)*), "\n",)?
".word 0b11010000000000000000000000000000",
"| 0b1000000000000000",
"| (", $crate::register_triple!($rd), " << 0)",
"| (", $crate::register_triple!($rs), " << 8)",
"| (0b0000001 << 16)",
)
};
(vabs.q $rd:ident $([$($rdp:tt)+])?, $rs:ident $([$($rsp:tt)+])?) => {
concat!(
$($crate::instruction!(vpfxd $($rdp)*), "\n",)?
$($crate::instruction!(vpfxs $($rsp)*), "\n",)?
".word 0b11010000000000000000000000000000",
"| 0b1000000010000000",
"| (", $crate::register_quad!($rd), " << 0)",
"| (", $crate::register_quad!($rs), " << 8)",
"| (0b0000001 << 16)",
)
};
// Performs element-wise floating point addition
(vadd.s $rd:ident $([$($rdp:tt)+])?, $rs:ident $([$($rsp:tt)+])?, $rt:ident $([$($rtp:tt)+])?) => {
concat!(
$($crate::instruction!(vpfxd $($rdp)*), "\n",)?
$($crate::instruction!(vpfxs $($rsp)*), "\n",)?
$($crate::instruction!(vpfxt $($rtp)*), "\n",)?
".word 0b01100000000000000000000000000000",
"| (", $crate::register_single!($rd), " << 0)",
"| (", $crate::register_single!($rs), " << 8)",
"| (", $crate::register_single!($rt), " << 16)",
)
};
(vadd.p $rd:ident $([$($rdp:tt)+])?, $rs:ident $([$($rsp:tt)+])?, $rt:ident $([$($rtp:tt)+])?) => {
concat!(
$($crate::instruction!(vpfxd $($rdp)*), "\n",)?
$($crate::instruction!(vpfxs $($rsp)*), "\n",)?
$($crate::instruction!(vpfxt $($rtp)*), "\n",)?
".word 0b01100000000000000000000000000000",
"| 0b0000000010000000",
"| (", $crate::register_pair!($rd), " << 0)",
"| (", $crate::register_pair!($rs), " << 8)",
"| (", $crate::register_pair!($rt), " << 16)",
)
};
(vadd.t $rd:ident $([$($rdp:tt)+])?, $rs:ident $([$($rsp:tt)+])?, $rt:ident $([$($rtp:tt)+])?) => {
concat!(
$($crate::instruction!(vpfxd $($rdp)*), "\n",)?
$($crate::instruction!(vpfxs $($rsp)*), "\n",)?
$($crate::instruction!(vpfxt $($rtp)*), "\n",)?
".word 0b01100000000000000000000000000000",
"| 0b1000000000000000",
"| (", $crate::register_triple!($rd), " << 0)",
"| (", $crate::register_triple!($rs), " << 8)",
"| (", $crate::register_triple!($rt), " << 16)",
)
};
(vadd.q $rd:ident $([$($rdp:tt)+])?, $rs:ident $([$($rsp:tt)+])?, $rt:ident $([$($rtp:tt)+])?) => {
concat!(
$($crate::instruction!(vpfxd $($rdp)*), "\n",)?
$($crate::instruction!(vpfxs $($rsp)*), "\n",)?
$($crate::instruction!(vpfxt $($rtp)*), "\n",)?
".word 0b01100000000000000000000000000000",
"| 0b1000000010000000",
"| (", $crate::register_quad!($rd), " << 0)",
"| (", $crate::register_quad!($rs), " << 8)",
"| (", $crate::register_quad!($rt), " << 16)",
)
};
// Performs element-wise floating point asin(rs)⋅2/π operation
(vasin.s $rd:ident $([$($rdp:tt)+])?, $rs:ident $([$($rsp:tt)+])?) => {
concat!(
$($crate::instruction!(vpfxd $($rdp)*), "\n",)?
$($crate::instruction!(vpfxs $($rsp)*), "\n",)?
".word 0b11010000000000000000000000000000",
"| (", $crate::register_single!($rd), " << 0)",
"| (", $crate::register_single!($rs), " << 8)",
"| (0b0010111 << 16)",
)
};
(vasin.p $rd:ident $([$($rdp:tt)+])?, $rs:ident $([$($rsp:tt)+])?) => {
concat!(
$($crate::instruction!(vpfxd $($rdp)*), "\n",)?
$($crate::instruction!(vpfxs $($rsp)*), "\n",)?
".word 0b11010000000000000000000000000000",
"| 0b0000000010000000",
"| (", $crate::register_pair!($rd), " << 0)",
"| (", $crate::register_pair!($rs), " << 8)",
"| (0b0010111 << 16)",
)
};
(vasin.t $rd:ident $([$($rdp:tt)+])?, $rs:ident $([$($rsp:tt)+])?) => {
concat!(
$($crate::instruction!(vpfxd $($rdp)*), "\n",)?
$($crate::instruction!(vpfxs $($rsp)*), "\n",)?
".word 0b11010000000000000000000000000000",
"| 0b1000000000000000",
"| (", $crate::register_triple!($rd), " << 0)",
"| (", $crate::register_triple!($rs), " << 8)",
"| (0b0010111 << 16)",
)
};
(vasin.q $rd:ident $([$($rdp:tt)+])?, $rs:ident $([$($rsp:tt)+])?) => {
concat!(
$($crate::instruction!(vpfxd $($rdp)*), "\n",)?
$($crate::instruction!(vpfxs $($rsp)*), "\n",)?
".word 0b11010000000000000000000000000000",
"| 0b1000000010000000",
"| (", $crate::register_quad!($rd), " << 0)",
"| (", $crate::register_quad!($rs), " << 8)",
"| (0b0010111 << 16)",
)
};
// Calculates the average value of the vector elements
(vavg.p $rd:ident $([$($rdp:tt)+])?, $rs:ident $([$($rsp:tt)+])?) => {
concat!(
$($crate::instruction!(vpfxd $($rdp)*), "\n",)?
$($crate::instruction!(vpfxs $($rsp)*), "\n",)?
".word 0b11010000000000000000000000000000",
"| 0b0000000010000000",
"| (", $crate::register_single!($rd), " << 0)",
"| (", $crate::register_pair!($rs), " << 8)",
"| (0b1000111 << 16)",
)
};
(vavg.t $rd:ident $([$($rdp:tt)+])?, $rs:ident $([$($rsp:tt)+])?) => {
concat!(
$($crate::instruction!(vpfxd $($rdp)*), "\n",)?
$($crate::instruction!(vpfxs $($rsp)*), "\n",)?
".word 0b11010000000000000000000000000000",
"| 0b1000000000000000",
"| (", $crate::register_single!($rd), " << 0)",
"| (", $crate::register_triple!($rs), " << 8)",
"| (0b1000111 << 16)",
)
};
(vavg.q $rd:ident $([$($rdp:tt)+])?, $rs:ident $([$($rsp:tt)+])?) => {
concat!(
$($crate::instruction!(vpfxd $($rdp)*), "\n",)?
$($crate::instruction!(vpfxs $($rsp)*), "\n",)?
".word 0b11010000000000000000000000000000",
"| 0b1000000010000000",
"| (", $crate::register_single!($rd), " << 0)",
"| (", $crate::register_quad!($rs), " << 8)",
"| (0b1000111 << 16)",
)
};
// Performs a `butterfly` operation between the input elements.
(vbfy1.p $rd:ident $([$($rdp:tt)+])?, $rs:ident $([$($rsp:tt)+])?) => {
concat!(
$($crate::instruction!(vpfxd $($rdp)*), "\n",)?
$($crate::instruction!(vpfxs $($rsp)*), "\n",)?
".word 0b11010000000000000000000000000000",
"| 0b0000000010000000",
"| (", $crate::register_pair!($rd), " << 0)",
"| (", $crate::register_pair!($rs), " << 8)",
"| (0b1000010 << 16)",
)
};
(vbfy1.q $rd:ident $([$($rdp:tt)+])?, $rs:ident $([$($rsp:tt)+])?) => {
concat!(
$($crate::instruction!(vpfxd $($rdp)*), "\n",)?
$($crate::instruction!(vpfxs $($rsp)*), "\n",)?
".word 0b11010000000000000000000000000000",
"| 0b1000000010000000",
"| (", $crate::register_quad!($rd), " << 0)",
"| (", $crate::register_quad!($rs), " << 8)",
"| (0b1000010 << 16)",
)
};
// Performs a `butterfly` operation between the input elements.
(vbfy2.q $rd:ident $([$($rdp:tt)+])?, $rs:ident $([$($rsp:tt)+])?) => {
concat!(
$($crate::instruction!(vpfxd $($rdp)*), "\n",)?
$($crate::instruction!(vpfxs $($rsp)*), "\n",)?
".word 0b11010000000000000000000000000000",
"| 0b1000000010000000",
"| (", $crate::register_quad!($rd), " << 0)",
"| (", $crate::register_quad!($rs), " << 8)",
"| (0b1000011 << 16)",
)
};
// Converts the input packed chars into full 32 bit integers in the output register. The input is placed on the most significant bits of the output integer, while the least significant bits are filled with zeros.
(vc2i.s $rd:ident $([$($rdp:tt)+])?, $rs:ident) => {
concat!(
$($crate::instruction!(vpfxd $($rdp)*), "\n",)?
".word 0b11010000000000000000000000000000",
"| (", $crate::register_quad!($rd), " << 0)",
"| (", $crate::register_single!($rs), " << 8)",
"| (0b0111001 << 16)",
)
};
// Performs element-wise floating point cos(π/2⋅rs) operation
(vcos.s $rd:ident $([$($rdp:tt)+])?, $rs:ident $([$($rsp:tt)+])?) => {
concat!(
$($crate::instruction!(vpfxd $($rdp)*), "\n",)?
$($crate::instruction!(vpfxs $($rsp)*), "\n",)?
".word 0b11010000000000000000000000000000",
"| (", $crate::register_single!($rd), " << 0)",
"| (", $crate::register_single!($rs), " << 8)",
"| (0b0010011 << 16)",
)
};
(vcos.p $rd:ident $([$($rdp:tt)+])?, $rs:ident $([$($rsp:tt)+])?) => {
concat!(
$($crate::instruction!(vpfxd $($rdp)*), "\n",)?
$($crate::instruction!(vpfxs $($rsp)*), "\n",)?
".word 0b11010000000000000000000000000000",
"| 0b0000000010000000",
"| (", $crate::register_pair!($rd), " << 0)",
"| (", $crate::register_pair!($rs), " << 8)",
"| (0b0010011 << 16)",
)
};
(vcos.t $rd:ident $([$($rdp:tt)+])?, $rs:ident $([$($rsp:tt)+])?) => {
concat!(
$($crate::instruction!(vpfxd $($rdp)*), "\n",)?
$($crate::instruction!(vpfxs $($rsp)*), "\n",)?
".word 0b11010000000000000000000000000000",
"| 0b1000000000000000",
"| (", $crate::register_triple!($rd), " << 0)",
"| (", $crate::register_triple!($rs), " << 8)",
"| (0b0010011 << 16)",
)
};
(vcos.q $rd:ident $([$($rdp:tt)+])?, $rs:ident $([$($rsp:tt)+])?) => {
concat!(
$($crate::instruction!(vpfxd $($rdp)*), "\n",)?
$($crate::instruction!(vpfxs $($rsp)*), "\n",)?
".word 0b11010000000000000000000000000000",
"| 0b1000000010000000",
"| (", $crate::register_quad!($rd), " << 0)",
"| (", $crate::register_quad!($rs), " << 8)",
"| (0b0010011 << 16)",
)
};
// Performs a partial cross-product operation
(vcrs.t $rd:ident $([$($rdp:tt)+])?, $rs:ident $([$($rsp:tt)+])?, $rt:ident) => {
concat!(
$($crate::instruction!(vpfxd $($rdp)*), "\n",)?
$($crate::instruction!(vpfxs $($rsp)*), "\n",)?
".word 0b01100110100000000000000000000000",
"| 0b1000000000000000",
"| (", $crate::register_triple!($rd), " << 0)",
"| (", $crate::register_triple!($rs), " << 8)",
"| (", $crate::register_triple!($rt), " << 16)",
)
};
// Performs a full cross-product operation
(vcrsp.t $rd:ident, $rs:ident, $rt:ident) => {
concat!(
".word 0b11110010100000000000000000000000",
"| 0b1000000000000000",
"| (", $crate::register_triple!($rd), " << 0)",
"| (", $crate::register_triple!($rs), " << 8)",
"| (", $crate::register_triple!($rt), " << 16)",
)
};
// Loads a predefined indexed floating point constant specified by the immediate field
(vcst.s $rd:ident $([$($rdp:tt)+])?, $imm5:ident) => {
concat!(
$($crate::instruction!(vpfxd $($rdp)*), "\n",)?
".word 0b11010000011000000000000000000000",
"| (", $crate::register_single!($rd), " << 0)",
"| (", $crate::vfpu_const!($imm5), " << 16)",
)
};
(vcst.p $rd:ident $([$($rdp:tt)+])?, $imm5:ident) => {
concat!(
$($crate::instruction!(vpfxd $($rdp)*), "\n",)?
".word 0b11010000011000000000000000000000",
"| 0b0000000010000000",
"| (", $crate::register_pair!($rd), " << 0)",
"| (", $crate::vfpu_const!($imm5), " << 16)",
)
};
(vcst.t $rd:ident $([$($rdp:tt)+])?, $imm5:ident) => {
concat!(
$($crate::instruction!(vpfxd $($rdp)*), "\n",)?
".word 0b11010000011000000000000000000000",
"| 0b1000000000000000",
"| (", $crate::register_triple!($rd), " << 0)",
"| (", $crate::vfpu_const!($imm5), " << 16)",
)
};
(vcst.q $rd:ident $([$($rdp:tt)+])?, $imm5:ident) => {
concat!(
$($crate::instruction!(vpfxd $($rdp)*), "\n",)?
".word 0b11010000011000000000000000000000",
"| 0b1000000010000000",
"| (", $crate::register_quad!($rd), " << 0)",
"| (", $crate::vfpu_const!($imm5), " << 16)",
)
};
// Performs a 2x2 matrix determinant between two matrix rows
(vdet.p $rd:ident $([$($rdp:tt)+])?, $rs:ident $([$($rsp:tt)+])?, $rt:ident) => {
concat!(
$($crate::instruction!(vpfxd $($rdp)*), "\n",)?
$($crate::instruction!(vpfxs $($rsp)*), "\n",)?
".word 0b01100111000000000000000000000000",
"| 0b0000000010000000",
"| (", $crate::register_single!($rd), " << 0)",
"| (", $crate::register_pair!($rs), " << 8)",
"| (", $crate::register_pair!($rt), " << 16)",
)
};
// Performs element-wise floating point division
(vdiv.s $rd:ident $([$($rdp:tt)+])?, $rs:ident $([$($rsp:tt)+])?, $rt:ident $([$($rtp:tt)+])?) => {
concat!(
$($crate::instruction!(vpfxd $($rdp)*), "\n",)?
$($crate::instruction!(vpfxs $($rsp)*), "\n",)?
$($crate::instruction!(vpfxt $($rtp)*), "\n",)?
".word 0b01100011100000000000000000000000",
"| (", $crate::register_single!($rd), " << 0)",
"| (", $crate::register_single!($rs), " << 8)",
"| (", $crate::register_single!($rt), " << 16)",
)
};
(vdiv.p $rd:ident $([$($rdp:tt)+])?, $rs:ident $([$($rsp:tt)+])?, $rt:ident $([$($rtp:tt)+])?) => {
concat!(
$($crate::instruction!(vpfxd $($rdp)*), "\n",)?
$($crate::instruction!(vpfxs $($rsp)*), "\n",)?
$($crate::instruction!(vpfxt $($rtp)*), "\n",)?
".word 0b01100011100000000000000000000000",