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Changed all line endings to CRLF in the repo
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.github/codecov.yml

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## @file
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# codecov upload configuration file to carryforward coverage results of
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# packages that do not upload coverage results for a given pull request.
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##
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# Copyright (c) Microsoft Corporation.
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# SPDX-License-Identifier: BSD-2-Clause-Patent
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##
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flags:
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ArmPkg:
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carryforward: true
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ArmPlatformPkg:
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carryforward: true
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ArmVirtPkg:
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carryforward: true
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DynamicTablesPkg:
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carryforward: true
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## @file
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# codecov upload configuration file to carryforward coverage results of
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# packages that do not upload coverage results for a given pull request.
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##
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# Copyright (c) Microsoft Corporation.
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# SPDX-License-Identifier: BSD-2-Clause-Patent
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##
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flags:
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ArmPkg:
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carryforward: true
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ArmPlatformPkg:
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carryforward: true
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ArmVirtPkg:
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carryforward: true
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DynamicTablesPkg:
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carryforward: true

.markdownlintignore

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# Ignore build directory
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/Build/
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# Ignore external dependencies
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*_extdep/
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# Ignore cloned dependencies
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/Common/MU_TIANO
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/MU_BASECORE
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# Ignore build directory
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/Build/
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# Ignore external dependencies
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*_extdep/
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# Ignore cloned dependencies
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/Common/MU_TIANO
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/MU_BASECORE
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//
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// Copyright (c) 2014, ARM Limited. All rights reserved.
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//
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// This program and the accompanying materials are licensed and made available
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// under the terms and conditions of the BSD License which accompanies this
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// distribution. The full text of the license may be found at
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// http://opensource.org/licenses/bsd-license.php
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//
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// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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//
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//
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#include <AsmMacroIoLibV8.h>
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AREA |.text|,ALIGN=3,CODE,READONLY
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EXPORT ArmGicV3GetControlSystemRegisterEnable
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EXPORT ArmGicV3SetControlSystemRegisterEnable
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EXPORT ArmGicV3SendNsG1Sgi // MU_CHANGE
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EXPORT ArmGicV3EnableInterruptInterface
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EXPORT ArmGicV3DisableInterruptInterface
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EXPORT ArmGicV3EndOfInterrupt
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EXPORT ArmGicV3AcknowledgeInterrupt
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EXPORT ArmGicV3SetPriorityMask
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EXPORT ArmGicV3SetBinaryPointer
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//UINT32
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//EFIAPI
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//ArmGicV3GetControlSystemRegisterEnable (
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// VOID
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// );
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ArmGicV3GetControlSystemRegisterEnable PROC
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EL1_OR_EL2_OR_EL3(x1)
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1
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mrs x0, ICC_SRE_EL1
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b %f4
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2
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mrs x0, ICC_SRE_EL2
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b %f4
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3
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mrs x0, ICC_SRE_EL3
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4
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ret
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ArmGicV3GetControlSystemRegisterEnable ENDP
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//VOID
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//EFIAPI
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//ArmGicV3SetControlSystemRegisterEnable (
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// IN UINT32 ControlSystemRegisterEnable
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// );
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ArmGicV3SetControlSystemRegisterEnable PROC
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EL1_OR_EL2_OR_EL3(x1)
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1
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msr ICC_SRE_EL1, x0
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b %f4
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2
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msr ICC_SRE_EL2, x0
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b %f4
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3
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msr ICC_SRE_EL3, x0
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4
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isb sy
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ret
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ArmGicV3SetControlSystemRegisterEnable ENDP
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// MU_CHANGE Starts: Add ArmGicV3SendNsG1Sgi, to allow sending SGI from one core to other cores on GICv3
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// VOID
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// ArmGicV3SendNsG1Sgi (
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// IN UINT64 SgiVal
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// );
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ArmGicV3SendNsG1Sgi PROC
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dsb ishst
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msr ICC_SGI1R_EL1, x0
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isb
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ret
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ArmGicV3SendNsG1Sgi ENDP
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// MU_CHANGE Ends
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//VOID
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//ArmGicV3EnableInterruptInterface (
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// VOID
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// );
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ArmGicV3EnableInterruptInterface PROC
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mov x0, #1
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msr ICC_IGRPEN1_EL1, x0
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ret
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ArmGicV3EnableInterruptInterface ENDP
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//VOID
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//ArmGicV3DisableInterruptInterface (
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// VOID
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// );
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ArmGicV3DisableInterruptInterface PROC
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mov x0, #0
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msr ICC_IGRPEN1_EL1, x0
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ret
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ArmGicV3DisableInterruptInterface ENDP
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//VOID
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//ArmGicV3EndOfInterrupt (
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// IN UINTN InterruptId
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// );
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ArmGicV3EndOfInterrupt PROC
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msr ICC_EOIR1_EL1, x0
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ret
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ArmGicV3EndOfInterrupt ENDP
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//UINTN
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//ArmGicV3AcknowledgeInterrupt (
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// VOID
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// );
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ArmGicV3AcknowledgeInterrupt PROC
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mrs x0, ICC_IAR1_EL1
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ret
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ArmGicV3AcknowledgeInterrupt ENDP
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//VOID
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//ArmGicV3SetPriorityMask (
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// IN UINTN Priority
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// );
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ArmGicV3SetPriorityMask PROC
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msr ICC_PMR_EL1, x0
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ret
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ArmGicV3SetPriorityMask ENDP
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//VOID
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//ArmGicV3SetBinaryPointer (
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// IN UINTN BinaryPoint
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// );
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ArmGicV3SetBinaryPointer PROC
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msr ICC_BPR1_EL1, x0
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ret
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ArmGicV3SetBinaryPointer ENDP
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END
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//
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// Copyright (c) 2014, ARM Limited. All rights reserved.
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//
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// This program and the accompanying materials are licensed and made available
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// under the terms and conditions of the BSD License which accompanies this
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// distribution. The full text of the license may be found at
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// http://opensource.org/licenses/bsd-license.php
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//
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// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
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// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
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//
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//
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#include <AsmMacroIoLibV8.h>
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AREA |.text|,ALIGN=3,CODE,READONLY
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EXPORT ArmGicV3GetControlSystemRegisterEnable
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EXPORT ArmGicV3SetControlSystemRegisterEnable
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EXPORT ArmGicV3SendNsG1Sgi // MU_CHANGE
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EXPORT ArmGicV3EnableInterruptInterface
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EXPORT ArmGicV3DisableInterruptInterface
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EXPORT ArmGicV3EndOfInterrupt
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EXPORT ArmGicV3AcknowledgeInterrupt
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EXPORT ArmGicV3SetPriorityMask
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EXPORT ArmGicV3SetBinaryPointer
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//UINT32
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//EFIAPI
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//ArmGicV3GetControlSystemRegisterEnable (
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// VOID
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// );
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ArmGicV3GetControlSystemRegisterEnable PROC
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EL1_OR_EL2_OR_EL3(x1)
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1
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mrs x0, ICC_SRE_EL1
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b %f4
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2
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mrs x0, ICC_SRE_EL2
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b %f4
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3
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mrs x0, ICC_SRE_EL3
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4
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ret
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ArmGicV3GetControlSystemRegisterEnable ENDP
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//VOID
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//EFIAPI
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//ArmGicV3SetControlSystemRegisterEnable (
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// IN UINT32 ControlSystemRegisterEnable
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// );
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ArmGicV3SetControlSystemRegisterEnable PROC
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EL1_OR_EL2_OR_EL3(x1)
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1
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msr ICC_SRE_EL1, x0
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b %f4
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2
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msr ICC_SRE_EL2, x0
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b %f4
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3
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msr ICC_SRE_EL3, x0
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4
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isb sy
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ret
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ArmGicV3SetControlSystemRegisterEnable ENDP
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// MU_CHANGE Starts: Add ArmGicV3SendNsG1Sgi, to allow sending SGI from one core to other cores on GICv3
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// VOID
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// ArmGicV3SendNsG1Sgi (
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// IN UINT64 SgiVal
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// );
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ArmGicV3SendNsG1Sgi PROC
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dsb ishst
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msr ICC_SGI1R_EL1, x0
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isb
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ret
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ArmGicV3SendNsG1Sgi ENDP
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// MU_CHANGE Ends
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//VOID
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//ArmGicV3EnableInterruptInterface (
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// VOID
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// );
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ArmGicV3EnableInterruptInterface PROC
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mov x0, #1
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msr ICC_IGRPEN1_EL1, x0
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ret
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ArmGicV3EnableInterruptInterface ENDP
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//VOID
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//ArmGicV3DisableInterruptInterface (
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// VOID
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// );
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ArmGicV3DisableInterruptInterface PROC
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mov x0, #0
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msr ICC_IGRPEN1_EL1, x0
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ret
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ArmGicV3DisableInterruptInterface ENDP
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//VOID
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//ArmGicV3EndOfInterrupt (
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// IN UINTN InterruptId
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// );
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ArmGicV3EndOfInterrupt PROC
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msr ICC_EOIR1_EL1, x0
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ret
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ArmGicV3EndOfInterrupt ENDP
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//UINTN
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//ArmGicV3AcknowledgeInterrupt (
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// VOID
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// );
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ArmGicV3AcknowledgeInterrupt PROC
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mrs x0, ICC_IAR1_EL1
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ret
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ArmGicV3AcknowledgeInterrupt ENDP
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//VOID
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//ArmGicV3SetPriorityMask (
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// IN UINTN Priority
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// );
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ArmGicV3SetPriorityMask PROC
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msr ICC_PMR_EL1, x0
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ret
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ArmGicV3SetPriorityMask ENDP
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//VOID
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//ArmGicV3SetBinaryPointer (
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// IN UINTN BinaryPoint
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// );
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ArmGicV3SetBinaryPointer PROC
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msr ICC_BPR1_EL1, x0
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ret
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ArmGicV3SetBinaryPointer ENDP
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END

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