diff --git a/platformio.ini b/platformio.ini
index 213610c..9bf7036 100644
--- a/platformio.ini
+++ b/platformio.ini
@@ -11,6 +11,7 @@
 [env:nucleo_f103rb]
 platform = ststm32
 board = nucleo_f103rb
+build_flags = -DF1
 framework = stm32cube
 ; add "Custom" -> "SWO Viewer" project task
 extra_scripts = pre:add_swo_viewer.py
@@ -39,4 +40,41 @@ debug_server = $PLATFORMIO_CORE_DIR/packages/tool-openocd/bin/openocd
   -c "nucleo_f103rb.tpiu configure -formatter 0"
   -c "itm ports on"
   -c "nucleo_f103rb.tpiu enable"
+  -c "tcl_port 6666"
+
+[env:blackpill_f401cc]
+platform = ststm32
+board = blackpill_f401cc
+build_flags = -DF4
+framework = stm32cube
+debug_tool = stlink
+upload_protocol = stlink
+; add "Custom" -> "SWO Viewer" project task
+extra_scripts = pre:add_swo_viewer.py
+; set SWO trace clock in frequency to configured HCLK frequency
+; in this example, board is clocked via HSI to 64MHz.
+; if this number is wrong, there will be no output.
+swo_trace_clkin_freq = 16000000
+; if you want to see SWO outputs during debugging, a custom
+; debug server invocation must be used.
+; adapt interface and target accordingly.
+; this entails changing the traceclk parameter to match
+; the swo_trace_clkin_freq above.
+; the SWO pin frequency param is irrelevant, since we are forwarding to
+; tcl_trace, but OpenOCD will otherwise fail to enable the TPIU.
+; this is used when starting debugging, not in the SWO Viewer task.
+; after debugging starts, one must manually start the swo_viewer.py with
+; python swo_parser.py --dont-run
+debug_server = $PLATFORMIO_CORE_DIR/packages/tool-openocd/bin/openocd
+  -s $PLATFORMIO_CORE_DIR/packages/tool-openocd/openocd/scripts/
+  -f interface/stlink.cfg
+  -c "transport select hla_swd"
+  -f  target/stm32f4x.cfg
+  -c "stm32f4x.tpiu configure -protocol uart"
+  -c "stm32f4x.tpiu configure -output -"
+  -c "stm32f4x.tpiu configure -traceclk 16000000"
+  -c "stm32f4x.tpiu configure -pin-freq 2000000"
+  -c "stm32f4x.tpiu configure -formatter 0"
+  -c "itm ports on"
+  -c "stm32f4x.tpiu enable"
   -c "tcl_port 6666"
\ No newline at end of file
diff --git a/src/main.c b/src/main.c
index 5449e81..9dfada7 100644
--- a/src/main.c
+++ b/src/main.c
@@ -1,11 +1,40 @@
+#if F0
+#include "stm32f0xx_hal.h"
+#elif F1
 #include "stm32f1xx_hal.h"
+#elif F2
+#include "stm32f2xx_hal.h"
+#elif F3
+#include "stm32f3xx_hal.h"
+#elif F4
+#include "stm32f4xx_hal.h"
+#elif F7
+#include "stm32f7xx_hal.h"
+#elif L0
+#include "stm32l0xx_hal.h"
+#elif L1
+#include "stm32l1xx_hal.h"
+#elif L4
+#include "stm32l4xx_hal.h"
+#else
+#error "Unsupported STM32 Family"
+#endif
+
 #include <errno.h>
 #include <sys/unistd.h> // STDOUT_FILENO, STDERR_FILENO
 #include <stdio.h>
 
+#if F1
 #define LED_PIN GPIO_PIN_5
 #define LED_GPIO_PORT GPIOA
 #define LED_GPIO_CLK_ENABLE() __HAL_RCC_GPIOA_CLK_ENABLE()
+#elif F4
+#define LED_PIN                                GPIO_PIN_13
+#define LED_GPIO_PORT                          GPIOC
+#define LED_GPIO_CLK_ENABLE()                  __HAL_RCC_GPIOC_CLK_ENABLE()
+#else
+#error "Unsupported STM32 Family for this example"
+#endif
 
 void SystemClock_Config(void);
 
@@ -58,6 +87,7 @@ int _write(int file, char *data, int len)
   return len;
 }
 
+#if F1
 /* bring up internal clocks to 64 MHz via HSI -- otherwise we are still at 8MHz default */
 void SystemClock_Config(void)
 {
@@ -95,4 +125,44 @@ void SystemClock_Config(void)
   {
     //Error_Handler();
   }
-}
\ No newline at end of file
+}
+#elif F4
+void SystemClock_Config(void)
+{
+  RCC_OscInitTypeDef RCC_OscInitStruct = {0};
+  RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
+
+  /** Configure the main internal regulator output voltage
+  */
+  __HAL_RCC_PWR_CLK_ENABLE();
+  __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE2);
+
+  /** Initializes the RCC Oscillators according to the specified parameters
+  * in the RCC_OscInitTypeDef structure.
+  */
+  RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
+  RCC_OscInitStruct.HSIState = RCC_HSI_ON;
+  RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
+  RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
+  if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
+  {
+    // Error_Handler();
+  }
+
+  /** Initializes the CPU, AHB and APB buses clocks
+  */
+  RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
+                              |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
+  RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSI;
+  RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
+  RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
+  RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
+
+  if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK)
+  {
+    // Error_Handler();
+  }
+}
+#else
+#error "Unsupported STM32 Family for this example"
+#endif