[FIRRTL][LowerXMR] Child U-Turn

[dtzSiFive]

Not priority presently, but if we want something like input references (arguably not, marking wontfix for now) the following should work:

ref-child-uturn.mlir:

firrtl.circuit "RefUTurnChild" {
  firrtl.module private @UTurnChild(in %in: !firrtl.ref<uint<2>>, out %out: !firrtl.ref<uint<2>>) {
    firrtl.strictconnect %out, %in : !firrtl.ref<uint<2>>
  }

  firrtl.module @RefUTurnChild(in %x : !firrtl.uint<2>, out %y : !firrtl.uint<2>) {
    %sub_in, %sub_out = firrtl.instance sub @UTurnChild(in in: !firrtl.ref<uint<2>>, out out: !firrtl.ref<uint<2>>)

    %x_ref = firrtl.ref.send %x : !firrtl.uint<2>
    firrtl.strictconnect %sub_in, %x_ref : !firrtl.ref<uint<2>>

    %val = firrtl.ref.resolve %sub_out : !firrtl.ref<uint<2>>
    firrtl.strictconnect %y, %val : !firrtl.uint<2>
  }
}

Which currently produces an error:

ref-child-uturn.mlir:2:3: error: reference dataflow cannot be traced back to the remote read op for module port 'out'
  firrtl.module private @UTurnChild(in %in: !firrtl.ref<uint<2>>, out %out: !firrtl.ref<uint<2>>) {
  ^
ref-child-uturn.mlir:2:3: note: see current operation: 
"firrtl.module"() ({
^bb0(%arg0: !firrtl.ref<uint<2>>, %arg1: !firrtl.ref<uint<2>>):
  "firrtl.strictconnect"(%arg1, %arg0) : (!firrtl.ref<uint<2>>, !firrtl.ref<uint<2>>) -> ()
}) {annotations = [], parameters = [], portAnnotations = [[], []], portDirections = -2 : i2, portLocations = [loc("ref-child-uturn.mlir":2:40), loc("ref-child-uturn.mlir":2:71)], portNames = ["in", "out"], portSyms = [], portTypes = [!firrtl.ref<uint<2>>, !firrtl.ref<uint<2>>], sym_name = "UTurnChild", sym_visibility = "private"} : () -> ()

Note that the same circuit is valid if the child module is marked for inlining:

firrtl.circuit "RefUTurnChild" {
  firrtl.module private @UTurnChild(in %in: !firrtl.ref<uint<2>>, out %out: !firrtl.ref<uint<2>>)
    attributes {annotations = [{class = "firrtl.passes.InlineAnnotation"}]}
  { firrtl.strictconnect %out, %in : !firrtl.ref<uint<2>> }

  firrtl.module @RefUTurnChild(in %x : !firrtl.uint<2>, out %y : !firrtl.uint<2>) {
    %sub_in, %sub_out = firrtl.instance sub @UTurnChild(in in: !firrtl.ref<uint<2>>, out out: !firrtl.ref<uint<2>>)

    %x_ref = firrtl.ref.send %x : !firrtl.uint<2>
    firrtl.strictconnect %sub_in, %x_ref : !firrtl.ref<uint<2>>

    %val = firrtl.ref.resolve %sub_out : !firrtl.ref<uint<2>>
    firrtl.strictconnect %y, %val : !firrtl.uint<2>
  }
}

Which produces:

// Generated by CIRCT 1.31.0g20230217_f4a1235
module RefUTurnChild(	// ref-child-uturn.mlir:6:3
  input  [1:0] x,	// ref-child-uturn.mlir:6:35
  output [1:0] y	// ref-child-uturn.mlir:6:61
);

  assign y = RefUTurnChild.x;	// ref-child-uturn.mlir:6:3, :12:12
endmodule

[dtzSiFive]

This needs to work for the proposed FIRRTL reference types.

[dtzSiFive]

HoistPassthrough + ProbeDCE makes this work, here's a touched up example (use ref.define for probes) that works now:

firrtl.circuit "RefUTurnChild" {
  firrtl.module private @UTurnChild(in %in: !firrtl.ref<uint<2>>, out %out: !firrtl.ref<uint<2>>) {
    firrtl.ref.define %out, %in : !firrtl.ref<uint<2>>
  }

  firrtl.module @RefUTurnChild(in %x : !firrtl.uint<2>, out %y : !firrtl.uint<2>) {
    %sub_in, %sub_out = firrtl.instance sub @UTurnChild(in in: !firrtl.ref<uint<2>>, out out: !firrtl.ref<uint<2>>)

    %x_ref = firrtl.ref.send %x : !firrtl.uint<2>
    firrtl.ref.define %sub_in, %x_ref : !firrtl.ref<uint<2>>

    %val = firrtl.ref.resolve %sub_out : !firrtl.ref<uint<2>>
    firrtl.strictconnect %y, %val : !firrtl.uint<2>
  }
}