Sigma16 User Guide
Table of Contents
-
-
- Introduction +
- Introduction
- Core architecture tutorials
-
-
- Hello, world! -
- A quick tour -
- Registers, constants, and arithmetic -
- Keeping variables in memory -
- Assembly language -
- Editing files -
- Jumps and conditionals -
- Loops -
- Machine language -
- Pseudoinstructions -
- A strange program -
- Breakpoints +
- Hello, world! +
- A quick tour +
- Registers, constants, and arithmetic +
- Keeping variables in memory +
- Assembly language +
- Editing files +
- Jumps and conditionals +
- Loops +
- Machine language +
- Pseudoinstructions +
- A strange program +
- Breakpoints -
- Summary of core instruction formats +
- Summary of core instruction formats -
- Summary of core instructions +
- Summary of core instructions
- - Standard architecture tutorials +
- Standard architecture tutorials
-
-
- Logic -
- Shifting -
- Bit fields -
- Saving registers for procedure call -
- Branching to pc-relative address -
- Stack instructions -
- Arithmetic on natural numbers -
- Modules and linking -
- System control registers -
- Interrupts +
- Logic +
- Shifting +
- Bit fields +
- Saving registers for procedure call +
- Branching to pc-relative address +
- Stack instructions +
- Arithmetic on natural numbers +
- Modules and linking +
- System control registers +
- Interrupts
- The Sigma16 architecture
- Instruction set
-
-
- Accessing memory +
- Accessing memory
-
-
- lea -
- load -
- store -
- Stacks -
- Stack frames +
- lea +
- load +
- store +
- Stacks +
- Stack frames
- - Arithmetic +
- Arithmetic -
- Jumps +
- Jumps -
- Branches +
- Branches -
- Logic +
- Logic
-
-
- General logic functions -
- Word logic: logicw -
- Pseudoinstructions: invw, andw, orw, xorw -
- Bit logic within a register: logicr -
- Pseudoinstructions invr, andr, orr, xorb -
- Bit logic across registers: logicb -
- Pseudoinstructions invb, andb, orb, xorb -
- Pseudoinstructions setb, clearb, moveb, movebi +
- General logic functions +
- Word logic: logicw +
- Pseudoinstructions: invw, andw, orw, xorw +
- Bit logic within a register: logicr +
- Pseudoinstructions invr, andr, orr, xorb +
- Bit logic across registers: logicb +
- Pseudoinstructions invb, andb, orb, xorb +
- Pseudoinstructions setb, clearb, moveb, movebi
- - Bit manipulation +
- Bit manipulation -
- System control +
- System control
- - Summary of instruction set +
- Summary of instruction set -
- Assembly language +
- Assembly language
- Object code and linker
- Programming -
- Installation +
- Installation
- About Sigma16
-
-
- Copyright and license -
- In case of problems -
- Release notes +
- Copyright and license +
- In case of problems +
- Release notes
-
-
- Version 3.5.0, January 2023 -
- Version 3.4.0 -
- Version 3.3.2, April 2021 -
- Version 3.2.3, development from April 2021 -
- Version 3.2.2, March 2021 -
- Version 3.2.1, February 2021 +
- Version 3.5.0, January 2023 +
- Version 3.4.0 +
- Version 3.3.2, April 2021 +
- Version 3.2.3, development from April 2021 +
- Version 3.2.2, March 2021 +
- Version 3.2.1, February 2021
- - GPL3 license +
- GPL3 license
Table of Contents
Version 3.7.1, February 2024 -Introduction
-Introduction
+Sigma16 is a computer architecture designed for research and teaching in computer systems. This application provides a complete environment @@ -627,9 +638,9 @@
Introduction
Core architecture tutorials
Hello, world!
-Hello, world!
+Let's begin by running a simple example program. For now, we focus only on how to use the software tools. You don't need to understand @@ -730,9 +741,9 @@
Hello, world!
A quick tour
-A quick tour
+This tutorial introduces the main components of the architecture as well as the graphical user interface. @@ -810,9 +821,9 @@
A quick tour
Registers, constants, and arithmetic
-Registers, constants, and arithmetic
+Programs do most of their work using the register file, which is an array of 16 registers named R0, R1, R2, …, R15. The Register @@ -840,7 +851,7 @@
Registers, constants, and arithmetic
into a register. For example, to load 42 into register 3, write -+lea R3,42 ; R3 := 42@@ -861,7 +872,7 @@Registers, constants, and arithmetic
The same instruction can be written in a longer form:
-+lea R3,42[R0] ; R3 := 42@@ -901,7 +912,7 @@
Registers, constants, and arithmetic
into R4: -+add R4,R8,R1 ; R4 := R8 + R1@@ -920,7 +931,7 @@Registers, constants, and arithmetic
result into R2: -+lea R5,3[R0] ; R5 := 3 lea R8,4[R0] ; R8 := 4 add R2,R5,R8 ; R2 := R5 + R8 = 3+4 = 7 @@ -942,7 +953,7 @@Registers, constants, and arithmetic
register): -+add R4,R11,R0 ; R4 := R11 + R0 sub R5,R2,R13 ; R5 := R2 - R13 mul R2,R10,R7 ; R2 := R10 * R7 @@ -972,7 +983,7 @@Registers, constants, and arithmetic
whatever value was previously there. So consider this example: -+lea R7,20[R0] ; R7 := 20 lea R8,30[R0] ; R8 := 30 add R7,R7,R8 ; R7 := R7 + R8 @@ -1008,7 +1019,7 @@Registers, constants, and arithmetic
the number. Thus $00a5 and 0165 both represent the integer 165. -+lea R1,13[R0] ; R1 = 13 (hex 000d) lea R2,$002f[R0] ; R2 := 47 (hex 002f) lea R3,$0012[R0] ; R3 := 18 (hex 0012) @@ -1052,7 +1063,7 @@Registers, constants, and arithmetic
avoid R0 and R15). -+lea R1,3[R0] ; R1 := 3 lea R2,4[R0] ; R2 := 4 lea R3,5[R0] ; R3 := 5 @@ -1067,7 +1078,7 @@Registers, constants, and arithmetic
the first operand is R0, will stop the program. -+trap R0,R0,R0 ; halt@@ -1075,7 +1086,7 @@Registers, constants, and arithmetic
Here is a complete program named ConstArith: -+; ConstArith: illustrate lea and arithmetic instructions ; This file is part of Sigma16 @@ -1167,7 +1178,7 @@Registers, constants, and arithmetic
+add R6,R1,R2 ; R6 := a + b sub R7,R3,R4 ; R7 := c - d mul R5,R6,R7 ; R5 := (a+b) * (c-d) @@ -1217,9 +1228,9 @@Registers, constants, and arithmetic
Keeping variables in memory
-Keeping variables in memory
+So far we have used registers in the register file to hold variables. However, there are only 16 of these, and two have special purposes (R0 @@ -1314,7 +1325,7 @@
Keeping variables in memory
Solution: -+load R1,a[R0] ; R1 := a load R2,b[R0] ; R2 := b add R3,R1,R2 ; R3 := a+b @@ -1354,7 +1365,7 @@Keeping variables in memory
For example, to define variables x, y, z and give them initial values: -+x data 34 ; x is a variable with initial value 34 y data 9 ; y is initially 9 z data 0 ; z is initially 0 @@ -1374,7 +1385,7 @@Keeping variables in memory
and data statements: -+; Program Add. See Sigma16/README.md in top folder ; A minimal program that adds two integer variables @@ -1409,9 +1420,9 @@Keeping variables in memory
Assembly language
-Assembly language
+The programs we have seen so far are written in assembly language. The machine itself executes programs in machine language, which is @@ -1508,7 +1519,7 @@
Assembly language
Here are some syntactically valid statements:
-+loop load R1,count[R0] ; R1 = count add R1,R1,R2 ; R1 = R1 + 1@@ -1517,7 +1528,7 @@Assembly language
Each of the following statements is wrong! -+add R2, R8, R9 ; spaces in the operand field loop1 store x[R0],R5 ; wrong order: should be R5,x[R0] addemup ; invalid mnemonic @@ -1537,7 +1548,7 @@Assembly language
fields are what you intended. For example if you meant to say -+add R1,R2,R3 ; x := a + b@@ -1545,7 +1556,7 @@Assembly language
but you have a spurious space, like this -+add R1, R2,R3 ; x := a + b@@ -1569,7 +1580,7 @@Assembly language
Examples: -+lea R1,40[R0] ; R1 = 40 lea R2,$ffff[R0] ; R2 = -1 @@ -1614,7 +1625,7 @@Assembly language
vertically, like this: -+load R1,three[R0] ; R1 = 3 load R2,x[R0] ; R2 = x mul R3,R1,R2 ; R3 = 3*x @@ -1626,7 +1637,7 @@Assembly language
Not like this: -+load R1,three[R0] ; R1 = 3 load R2,x[R0] ; R2 = x mul R3,R1,R2 ; R3 = 3*x @@ -1652,9 +1663,9 @@Assembly language
Editing files
-Editing files
+Whatever method you use to edit your programs, be sure to save your work to a file from time to time. If you don't do that, sooner or @@ -1781,16 +1792,16 @@
Editing files
Jumps and conditionals
-Jumps and conditionals
+Conditionals allow a program to decide which statements to execute based on Boolean expressions. One example is the if-then statement, for example:
-+if x<y then statement 1 statement 2 @@ -1800,7 +1811,7 @@Jumps and conditionals
A related form is the if-then-else statement: -+if x<y then statement 1 else statement 2 @@ -1813,7 +1824,7 @@Jumps and conditionals
bexp to decide whether to jump to someLabel, or not to jump: -+if bexp then goto someLabel@@ -1821,7 +1832,7 @@Jumps and conditionals
The commonest case is where bexp is a comparision between two integers: -+if x < y then goto someLabel@@ -1849,7 +1860,7 @@Jumps and conditionals
is a relation, such as lt, eq, and so on: -+jumplt someLabel[R0] ; if < then goto someLabel jumple someLabel[R0] ; if <= then goto someLabel jumpeq someLabel[R0] ; if = then goto someLabel @@ -1884,7 +1895,7 @@Jumps and conditionals
address of the sub instruction. -+label1 add R2,R4,R13 label2 sub R15,R0,R1 @@ -1895,7 +1906,7 @@Jumps and conditionals
similar fixed patterns. Suppose Bexp is a Boolean in any register Rd -+if bexp then statement 1 statement 2 @@ -1905,7 +1916,7 @@Jumps and conditionals
This is translated according to the following pattern: -+if !bexp then goto L1 statement 1 L1: @@ -1916,7 +1927,7 @@Jumps and conditionals
Here is an example: -+a := 93 x := 35 y := 71 @@ -1928,7 +1939,7 @@Jumps and conditionals
The corresponding assembly language is: -+; a := 93 lea R1,93[R0] ; R1 := 93 store R1,a[R0] ; a := 93 @@ -1975,7 +1986,7 @@Jumps and conditionals
and which doesn't use a Boolean. -+jump somewhere[R0] ; go to somewhere@@ -1983,7 +1994,7 @@Jumps and conditionals
The general form of an if-then-else is -+if x < y then S1 else S2 @@ -1995,7 +2006,7 @@Jumps and conditionals
and conditional goto: -+if x >= y then goto L1 S1 goto L2 @@ -2005,15 +2016,15 @@Jumps and conditionals
Loops
-Loops
+Loops are implemented using compilation patterns based on comparisons and jumps. The fundamental form is the while loop.
-+while Bexp do S1 S2@@ -2022,7 +2033,7 @@Loops
The compilation pattern is: -+L1 if not Bexp then goto L2 S2 goto L1 @@ -2034,7 +2045,7 @@Loops
expressed as a while loop: -+while true do S1@@ -2042,7 +2053,7 @@Loops
This doesn't need a Boolean expression; it is simply compiled into: -+loop instructions for S1 jump loop[R0] @@ -2100,7 +2111,7 @@Loops
and the containment may go several levels deep. -+if b1 then S1 if b2 then S2 else S3 @@ -2141,9 +2152,9 @@Loops
Machine language
-Machine language
+The actual bits representing an instruction (written in hex) (e.g 0d69) are machine language. The actual hardware runs the machine @@ -2289,7 +2300,7 @@
Machine language
Example of RRR: -+add R13,R6,R9@@ -2347,7 +2358,7 @@Machine language
Consider
-+load R1,x[R0]@@ -2370,7 +2381,7 @@Machine language
machine code for load R1,x[R0] is: -+f101 0008@@ -2420,9 +2431,9 @@Machine language
Pseudoinstructions
-Pseudoinstructions
+We have seen conditional jump instructions like jumplt loop. Technically, jumplt, jumpeq and the rest are called @@ -2432,7 +2443,7 @@
Pseudoinstructions
using just two real instructions: jumpc0 and jumpc1: -+jumpc0 Rd,disp[Ra] jumpc1 Rd,disp[Ra]@@ -2443,7 +2454,7 @@Pseudoinstructions
pseudoinstructions for conditional jumps after an integer comparison: -+jumplt someLabel[R0] ; if < then goto someLabel jumple someLabel[R0] ; if <= then goto someLabel jumpeq someLabel[R0] ; if = then goto someLabel @@ -2454,9 +2465,9 @@Pseudoinstructions
A strange program
-A strange program
+Consider ``Program Strange'' below. This program doesn't compute anything particularly useful. It's rather strange and not a model for @@ -2484,7 +2495,7 @@
A strange program
+
; Strange: A Sigma16 program that is a bit strange
load R1,y[R0]
load R2,x[R0]
@@ -2642,9 +2653,9 @@ A strange program
Breakpoints
-Breakpoints
+When you are testing or debugging a program, you may need to execute many instructions before reaching the point you're interested in. @@ -2689,9 +2700,9 @@
Breakpoints
Trap break
-Trap break
+A trap break is a trap instruction whose first operand register contains the value 4. The other operand registers are ignored. When @@ -2704,7 +2715,7 @@
Trap break
in this code: -+... add R1,R2,R3 load R4,x[R1] @@ -2720,7 +2731,7 @@Trap break
code, and the other two operands are ignored, so we can just use R0. -+... add R1,R2,R3 lea R9,4 ; R9 := trap break code @@ -2750,9 +2761,9 @@Trap break
External break
-External break
+An external break tells the emulator to perform a breakpoint without modifying the program. Use these steps to set an external break: @@ -2791,13 +2802,13 @@
External break
Summary of core instruction formats
-Summary of core instruction formats
+RRR format
-RRR format
+RRR instructions are represented in one word comprising four 4-bit fields. Each field contains 4 bits representing a binary number @@ -2805,7 +2816,7 @@
RRR format
-
RRR format
RX format
-RX format
+RX instructions specify a memory location as well as a register operand. The machine language representation is two words: @@ -2921,9 +2932,9 @@
RX format
Summary of core instructions
-Summary of core instructions
+The following table summarises the instructions in the Core subset of Sigma16. The columns are: @@ -2973,9 +2984,9 @@
Summary of core instructions
Standard architecture tutorials
-Standard architecture tutorials
+The standard architecture provides additional registers and instructions to support systems programming, as well as instructions @@ -2983,9 +2994,9 @@
Standard architecture tutorials
Logic
-Logic
+
The pseudoinstruction andw R1,R2,R3 calculates the logical and the
operands R2 and R3, and places the result in the destination register
@@ -2995,7 +3006,7 @@
Logic
To invert all the bits in a word, useinvw.
-+lea R3,$f0f0[R0] ; R3 = f0f0 lea R4,$ff00[R0] ; R4 = ff00 invw R6,R3 ; R6 := inv R3 = 0f0f @@ -3017,9 +3028,9 @@Logic
Shifting
-Shifting
+There are two shift instructions, which shift the word in Re by f bits (to left or right) and place the result into Rd. These are logical @@ -3027,7 +3038,7 @@
Shifting
into the word are always 0. -+shiftl Rd,Re,f ; Rd := Re shifted left by f bits shiftr Rd,Re,f ; Rd := Re shifted right by f bits@@ -3037,7 +3048,7 @@Shifting
hexadecimal and as bits. -+lea R1,2[R0] ; R2 = 0002 0000 0000 0000 0010 shiftl R5,R1,4 ; R5 = 0020 0000 0000 0010 0000 shiftl R6,R1,13 ; R6 = 4000 0100 0000 0000 0000 @@ -3051,10 +3062,10 @@Shifting
Bit fields
-++-Bit fields
++lea R1,$ffff[R0] ; R1 = ffff add R2,R0,R0 ; R2 = 0000 extract R2,11,8,R1,3 ; R2 = 0f00 R2.11~8 := R1.3~0 @@ -3070,7 +3081,7 @@Bit fields
to 8 (i.e. the second hex digit), the result is 0f06. -+lea R1,$ffff[R0] ; R1 = ffff lea R2,$0f0f ; R2 = 0606 extract R2,11,8,R1,3 ; R2 = 0f06 R2.11~8 := R1.3~0 @@ -3107,9 +3118,9 @@Bit fields
-Saving registers for procedure call
-++-Saving registers for procedure call
+A common way to implement a procedure call is to save the caller's registers on a stack, so the procedure can use those registers without @@ -3121,7 +3132,7 @@
Saving registers for procedure call
On a procedure call, save the registers onto the stack: -+save R3,R5,6[R13] ; store R3-R5 into memory at 6[R13]@@ -3129,7 +3140,7 @@Saving registers for procedure call
When the procedure returns, restore the registers from the stack: -+restore R3,R5,6[R13] ; load R3-R5 from memory at 6[R13]@@ -3140,9 +3151,9 @@Saving registers for procedure call
-Branching to pc-relative address
-++-Branching to pc-relative address
+A branch instruction transfers control to a specified location, similar to a jump. The difference is in how the location to jump to @@ -3181,23 +3192,23 @@
Branching to pc-relative address
-Stack instructions
++-Stack instructions
-Arithmetic on natural numbers
++-Arithmetic on natural numbers
-Modules and linking
++-Modules and linking
-System control registers
-+-+-System control registers
+-@@ -3213,9 +3224,9 @@Interrupts
++Interrupts
The Sigma16 architecture
-Implementations
-++-Implementations
+The Sigma16 software application contains a complete programming environment, using emulation to implement the processor. The @@ -3238,9 +3249,9 @@
Implementations
-Subsystems
-++-Subsystems
+A register is a digital circuit that can retain one word of data. A new value can be loaded into a register, and the current contents may @@ -3281,9 +3292,9 @@
Subsystems
-Words
-++Words
+-In Sigma16, a word is a sequence of 16 bits. Occasionally we will also refer to a double word (a sequence of 32 bits). A a generic @@ -3316,9 +3327,9 @@
Words
-Indexing bits in a word
-++-Indexing bits in a word
+The bits of a word are indexed from right to left, starting with 0. The least significant (rightmost) bit has index 0, and the most @@ -3349,9 +3360,9 @@
Indexing bits in a word
-Fields
-++-Fields
+A bit field is a contiguous sequence of bits in a word. It is specified by two numbers: the index of the leftmost bit in the field, @@ -3360,9 +3371,9 @@
Fields
-Natural numbers
-++-Natural numbers
+The natural numbers are \(0, 1, 2, \ldots\). All natural numbers are nonnegative. Natural numbers are represented in binary. Sigma16 uses @@ -3390,9 +3401,9 @@
Natural numbers
-Integers
-++-Integers
+Integers are represented using two's complement notation. If the leftmost (most significant) bit of a word is 0, its two's complement @@ -3411,9 +3422,9 @@
Integers
-Notations for a word
-++-Notations for a word
+Assembly language provides several notations for expressing the value of a word. If a numeric value is out of range it is truncated. @@ -3435,9 +3446,9 @@
Notations for a word
-Memory
-++-Memory
+The memory is a hardware array of words that are accessed by address. A memory address is 16 bits wide, and there is one memory location @@ -3473,13 +3484,13 @@
Memory
-Registers
-++Registers
+--Register file
-++Register file
+The register file is a set of 16 general registers that hold a 16 bit word. A register is referenced by a 4-bit binary number. In @@ -3555,8 +3566,8 @@
Register file
-
- R0 contains the constant 0
-+- R0 contains the constant 0
-
+One of the registers, R0, has a special property: it always contains the constant 0. It is legal to perform an instruction that attempts @@ -3567,8 +3578,8 @@
Register file
- R15 is the condition code register
-+- R15 is the condition code register
+-Several instructions produce status information: the result of a comparison, whether there was an overflow, etc. This information is @@ -3758,9 +3769,9 @@
Register file
-Instruction control registers
-++Instruction control registers
+There are several instruction control registers that enable the processor to keep track of the state of the running program. These @@ -3771,8 +3782,8 @@
Instruction control registers
-
- pc
-+- pc
-
+The pc (program counter) register contains the address of the next instruction to be executed (not the address of the instruction currently being @@ -3782,12 +3793,12 @@
Instruction control registers
- ir – instruction register
+- ir – instruction register
-- adr – address register
+- adr – address register
-- status register
-+- status register
+@@ -3829,13 +3840,13 @@
Instruction control registers
--Interrupt control registers
-++Interrupt control registers
+-
- req and mask
-+- req and mask
-
+The Interrupt request and mask registers contain the same bits. When an interrupt is requested, the corresponding bit is set in the req @@ -3912,8 +3923,8 @@
Interrupt control registers
- rstat
-+- rstat
-
+When an interrupt occurs, the value of the status register is copied into rstat. @@ -3921,8 +3932,8 @@
Interrupt control registers
- rpc
-+- rpc
-
+When an interrupt occurs, the value of pc is copied into rpc. This is necessary to enable the operating system to resume the interrupted @@ -3931,8 +3942,8 @@
Interrupt control registers
- vect
-+- vect
+-The interrupt vector register contains the address of an array of addresses of interrupt handlers. @@ -3942,9 +3953,9 @@
Interrupt control registers
-Memory management registers
-++-Memory management registers
+(Will be implemented in future version)
@@ -3952,9 +3963,9 @@Memory management registers
-Instruction representation
-++Instruction representation
+-Instructions are represented in the memory of the computer using words, just like all other kinds of data. From the programmer's @@ -4103,9 +4114,9 @@
Instruction representation
-RRR format
-++-RRR format
+The RRR format is used for instructions that perform calculations in the registers, without using memory. @@ -4151,9 +4162,9 @@
RRR format
-RX format
-++-RX format
+The RX format is used for instructions that access the memory. There are two operands: a memory address and a register. The memory address @@ -4219,7 +4230,7 @@
RX format
executed: -+load R2,5[R4]@@ -4244,9 +4255,9 @@RX format
-EXP format
-++EXP format
+-The EXP instructions provide more complex operations, and they belong to the Standard architecture. (The Core architecture uses only RRR @@ -4263,7 +4274,7 @@
EXP format
-+@@ -4317,9 +4328,9 @@
EXP format
-Notation for machine language
-++Notation for machine language
+We usually write instructions in assembly language (sub R3,R12,R9) but the computer executes machine langugae (13c9). When each instruction @@ -4338,7 +4349,7 @@
Notation for machine language
For example, here is the general form of the logicu instruction: -+logicu Rd,e,Rf,g,h ; Rd.e := h (Rd.e, Rf.g) EXP op=#e ab=$14@@ -4357,7 +4368,7 @@Notation for machine language
Example:
-+logicu R7,5,R2,13,xor ; R7.5 := R7.5 xor R2.13 e714 52d6@@ -4372,9 +4383,9 @@Instruction set
--Accessing memory
-++Accessing memory
+-A memory address is a 16-bit binary number. Instructions don't specify addresses directly; they specify an address with two @@ -4400,9 +4411,9 @@
Accessing memory
-lea
-++-lea
+The load effective address instruction lea Rd,disp[Rx] calculates the effective address of the operand disp[Rx] and places the result in @@ -4412,9 +4423,9 @@
lea
-load
-++-load
+The load instruction load Rd,disp[Rx] calculates the effective address of the operand disp[Rx] and copies the word in memory at the @@ -4434,7 +4445,7 @@
load
Examples
-+load R12,count[R0] ; R12 := count load R6,arrayX[R2] ; R6 := arrayX[R2] load R3,$2b8e[R5] ; R3 := mem[2b8e+R5] @@ -4442,9 +4453,9 @@load
-store
-++-store
+The store instruction store Rd,disp[Rx] calculates the effective address of the operand disp[Rx] and the value of the destination @@ -4483,7 +4494,7 @@
store
Examples -+store R3,$2b8e[R5] store R12,count[R0] store R6,arrayX[R2] @@ -4491,9 +4502,9 @@store
-Stacks
-++Stacks
+Three instructions (push, pop, top) support operations on a stack represented as an array of contiguous elements, where the stack grows @@ -4546,14 +4557,14 @@
Stacks
-
- push
-+- push
-
+The push instruction pushes an element onto a stack. It is RRR format, and its general form is:
-+push Rd,Ra,Rb@@ -4575,7 +4586,7 @@Stacks
and the stack mask bit is set. The operational semantics is: -+if Ra < Rb then Ra := Ra + 1; mem[Ra] := Rd else R15.sovfl := 1, req.sovfl := 1 @@ -4598,14 +4609,14 @@Stacks
- pop
-+- pop
-
+The push instruction removes an element onto a stack and returns it. The instruction is RRR format, and its general form is:
-+pop Rd,Ra,Rb@@ -4628,7 +4639,7 @@Stacks
semantics is: -+if Ra >= Rb then Rd := mem[Ra]; Ra := Ra - 1 else R15.suvfl := 1, req.suvfl := 1 @@ -4636,14 +4647,14 @@Stacks
- top
-+- top
+-The top instruction returns the top element on a stack but does not remove it. The instruction is RRR format, and its general form is:
-+top Rd,Ra,Rb@@ -4665,7 +4676,7 @@Stacks
semantics is: -+if Ra >= Rb then Rd := mem[Ra] else R15.suvfl := 1, req.suvfl := 1 @@ -4675,9 +4686,9 @@Stacks
-Stack frames
-++Stack frames
+When a program calls a procedure it is usually necessary to save the state of the caller in a data structure called a stack frame. (This @@ -4744,13 +4755,13 @@
Stack frames
-
- save
-+- save
-
+The general form is
-+save Rd,Re,gh[Rf] EXP op=#e ab=$0b@@ -4772,14 +4783,14 @@Stack frames
into memory starting at address 6 + R13: -+save R3,R9,6[R13] ; e30b 9d06. store R3-R9 starting at 6[R13]It is equivalent to a sequence of store instructions:
-+store R3,6[R13] store R4,7[R13] store R5,8[R13] @@ -4796,15 +4807,15 @@Stack frames
- restore
-+- restore
-
+This
-restoreinstruction has the same operands as the correspondingsave, and it performs a sequence of stores corresponding to the loads performed by save. The general form is+restore Rd,Re,gh[Rf] EXP op=#e ab=$0c@@ -4824,7 +4835,7 @@Stack frames
For example, consider this instruction:
-+restore R3,R10,4[R14]@@ -4832,7 +4843,7 @@Stack frames
The effect is equivalent to -+load R3,4[R14] load R4,5[R14] load R5,6[R14] @@ -4849,7 +4860,7 @@Stack frames
To restore the registers from the stack frame, use: -+restore R3,R9,6[R13] ; e30b 9d06. store R3-R9 starting at 6[R13]@@ -4857,7 +4868,7 @@Stack frames
It is equivalent to a sequence of store instructions: -+load R3,6[R13] load R4,7[R13] load R5,8[R13] @@ -4868,14 +4879,14 @@-Stack frames
+restore R3,R5,6[R13] ; e30c 5d06. load R3-R5 starting at 6[R13]This is equivalent to a sequence of load instructions:
-+load R3,6[R13] load R4,7[R13] load R5,8[R13] @@ -4902,8 +4913,8 @@Stack frames
- Procedure call and return
-+-- Procedure call and return
+A common usage of save and restore is to simplify procedure call and return. When a procedure is called, store the registers onto the @@ -4921,13 +4932,13 @@
Stack frames
-Arithmetic
-++Arithmetic
+--add
-++-add
+The instruction
add Rd,Ra,Rbhas operandsRaandRband destinationRd. It fetches the operandsRaandRb, calculates @@ -4981,7 +4992,7 @@add
size 3 consists of the bits x.9 x.8 x.7. -+add R1,R2,R3 ; R1 := R2 + R3@@ -5082,9 +5093,9 @@add
-sub
-++-sub
+Example: sub R1,R2,R3 ; R1 := R2 - R3
@@ -5134,9 +5145,9 @@sub
-mul
-++-mul
+Example: mul R1,R2,R3 ; R1 := R2 * R3
@@ -5169,9 +5180,9 @@mul
-div
-++-div
+Example: div R1,R2,R3 ; R1 := R2 / R3, R15 := R2 rem R3
@@ -5204,7 +5215,7 @@div
For example: -+div R1,R2,R3 ; R1 := R2/R3, R15 := R2 rem R3 cmp R3,R0 ; Did we divide by 0? jumpeq zeroDivide[R0] ; If yes, handle error @@ -5219,9 +5230,9 @@div
-cmp
-++-cmp
+The compare instruction
cmp Ra,Rbcompares the values in the operand registersRaandRb, and then sets flags in the condition code @@ -5252,15 +5263,15 @@cmp
by a jump pseudoinstruction, for example: -+cmp R4,R9 ; compare R4 with R9 jumpgt abc]R0] ; if R4 > R9 then goto abc-addc
-++-addc
+The addc instruction performs a binary addition with carry propagation. It adds the two operand registers and the carry bit in @@ -5272,10 +5283,10 @@
addc
-muln
--++-muln
++muln Rd,Ra,Rb@@ -5289,10 +5300,10 @@muln
-divn
--++-divn
++divn Rd,Ra,Rb@@ -5316,47 +5327,47 @@divn
-Jumps
-++Jumps
+-A jump is a transfer control to another address, rather than to the following instruction. The destination address is specified as the effective address in the jump instruction. A jump can be used to -implement a goto statement. (See also Branches.) +implement a goto statement. (See also Branches.)
-jump
++-jump
-jumpc0, jumpc1
++-jumpc0, jumpc1
-jumpz, jumpnz
++-jumpz, jumpnz
--jal
++jal
-Branches
-++Branches
+-A branch instruction transfers control to another address, rather than to the following instruction. The destination address is specified as an offset relative to the value of the pc (after the pc has been incremented). A branch can be used to implement a goto statement. -(See also Jumps.) +(See also Jumps.)
-brf, brb
-++-brf, brb
+The brf instruction is Branch forward, and the brb instruction is branch backward. @@ -5369,7 +5380,7 @@
brf, brb
an offset of 0 refers to the instruction after the brf/brb. -+a brf 3 add R0,R0,R0 ; brf 0 would go here add R0,R0,R0 ; brf 1 would go here @@ -5381,7 +5392,7 @@brf, brb
Normally the operand is expressed as a label rather than a constant. -+a brf b add R0,R0,R0 add R0,R0,R0 @@ -5404,9 +5415,9 @@brf, brb
-brfc0, brbc0, brfc1, brbc1
-++-brfc0, brbc0, brfc1, brbc1
+There are four conditional branch instructions that perform a branch based on the value of a bit in a register. For example, brfc1 @@ -5436,9 +5447,9 @@
brfc0, brbc0, brfc1, brbc1
-brfz, brbz, brfnz, brbnz
-++-brfz, brbz, brfnz, brbnz
+These instructions perform a branch if a specified register is either equal to 0 (z), or not equal to 0 (nz). Equal to 0 means every bit in @@ -5455,9 +5466,9 @@
brfz, brbz, brfnz, brbnz
-dispatch
-++-dispatch
+The dispatch instruction implements a branch table. It provides an efficient way to implement a case statement using a binary code. @@ -5469,7 +5480,7 @@
dispatch
specific destination depending on the value of the code. -+load R8,code[R0] ; load a 3-bit binary code dispatch R8,3,0 ; 38 dispatch 3-bit code brf caseA ; if code=0 then goto caseA @@ -5505,9 +5516,9 @@dispatch
-Logic
-++Logic
+-The commonest Boolean operators are
inv,and,or, andxor. However, these aren't the only useful operations: there are 16 logic @@ -5542,9 +5553,9 @@Logic
-General logic functions
-++-General logic functions
+The invert function (also called not, logical negation) has one input.
@@ -5770,9 +5781,9 @@General logic functions
-Word logic: logicw
-++-Word logic: logicw
+The logicw instruction performs a bitwise logic operation on two operands: each bit of the result is obtained by performing the logic @@ -5788,7 +5799,7 @@
Word logic: logicw
is -+logicw Rd,Re,Rf,h ; Rd := h (Re, Rf) EXP. op=#e, ab=$12, g is ignored@@ -5798,7 +5809,7 @@Word logic: logicw
puts the result into R3. -+lea R1,$00ff[R0] ; R1 := 00ff lea R2,$0f0f[R0] ; R2 := 0f0f logicw R3,R1,R2,6 ; e312 1206. R3 := 0ff0 @@ -5806,9 +5817,9 @@Word logic: logicw
-Pseudoinstructions: invw, andw, orw, xorw
-++-Pseudoinstructions: invw, andw, orw, xorw
+If you're using one of the most common logic functions, a pseudoinstruction is convenient and can make a program more readable. @@ -5817,7 +5828,7 @@
Pseudoinstructions: invw, andw, orw, xorw
pseudo operation and the function operand is omitted. -+invw R3,R4 ; R3 := invert R4 andw R3,R4,R5 ; R3 := R4 and R5 or w R3,R4,R5 ; R3 := R4 or R5 @@ -5832,7 +5843,7 @@Pseudoinstructions: invw, andw, orw, xorw
generate exactly the same machine language: -+logicw R5,R7,R2,1 ; R5 := R7 and R2 andw R5,R7,R2 ; R5 := R7 and R2@@ -5844,7 +5855,7 @@Pseudoinstructions: invw, andw, orw, xorw
instead of the numeric code: -+xor equ 6 ... logicw R5,R7,R2,xor ; R5 := R7 xor R2 @@ -5852,9 +5863,9 @@Pseudoinstructions: invw, andw, orw, xorw
-Bit logic within a register: logicr
-++-Bit logic within a register: logicr
+The
logicrinstruction allows you to specify any two operand bits and a destination bit, all within the same register. This is @@ -5862,7 +5873,7 @@Bit logic within a register: logicr
the same word. The general form is: -+logicr Rd,e,f,g,h ; Rd.e := h (Rd.f, Rd.g) EXP op=#e ab=$13@@ -5888,7 +5899,7 @@Bit logic within a register: logicr
and place the result in bit 10. -+lea R1,2[R0] ; R1 := 0002, R1.0 = 0, R1.1 = 1 logicr R1,10,0,1,or ; e113 a017. R1 := 0402, R1.10 = 1@@ -5908,16 +5919,16 @@Bit logic within a register: logicr
-Pseudoinstructions invr, andr, orr, xorb
-++-Pseudoinstructions invr, andr, orr, xorb
+Pseudoinstructions are provided for the most common bit logic functions. The operands are the same as for
-logicr, except the last operand is omitted, as the function is specified by the mnemonic.+invr R1,3,9 ; R1.3 := inv R1.9 andr R1,3,9,2 ; R1.3 := R1.9 and R1.2 orr R1,3,9,2 ; R1.3 := R1.9 or R1.2 @@ -5926,16 +5937,16 @@Pseudoinstructions invr, andr, orr, xorb
-Bit logic across registers: logicb
-++-Bit logic across registers: logicb
+The
-logicbinstruction specifies two operand bits that may be in different registers. The result will overwrite the first operand bit. The general form is:+logicb Rd,e,Rf,g,h ; Rd.e := h (Rd.e, Rf.g) EXP op=$e ab=$14@@ -5943,7 +5954,7 @@Bit logic across registers: logicb
Example:
-+lea R2,$0200[R0] ; R2.9 := 1 lea R7,$0000[R0] ; R7.13 := 0 logicb R2,9,R7,13,xor ; e214 97d6. R2 := 0200, R2.9 := R2.9 xor R7.13 @@ -5951,10 +5962,10 @@Bit logic across registers: logicb
-Pseudoinstructions invb, andb, orb, xorb
--++-Pseudoinstructions invb, andb, orb, xorb
++invb R1,3,R2,9 ; R1.3 := inv R2.9 andb R1,3,R2,9 ; R1.3 := R1.3 and R2.9 orub R1,3,R2,9 ; R1.3 := R1.3 or R2.9 @@ -5970,9 +5981,9 @@Pseudoinstructions invb, andb, orb, xorb
-Pseudoinstructions setb, clearb, moveb, movebi
-+-+Pseudoinstructions setb, clearb, moveb, movebi
+The bit logic instructions have some useful special cases that don't appear to involve logic at all. These are supported by @@ -5983,7 +5994,7 @@
Pseudoinstructions setb, clearb, moveb, movebi
- -
setb Rd,eputs 1 into a specified bit:Rd.e :1=.+setb R4,7 ; R4.7 := 1@@ -5991,7 +6002,7 @@Pseudoinstructions setb, clearb, moveb, movebi
- -
clearb Rd,eputs 0 into the specified bit.+clearb R4,7 ; R4.7 := 0@@ -6000,7 +6011,7 @@Pseudoinstructions setb, clearb, moveb, movebi
position in another register. -+moveb R4,7,R12,5 ; R4.7 := R12.5@@ -6009,20 +6020,20 @@Pseudoinstructions setb, clearb, moveb, movebi
into a specified position in another register. -+moveb R4,7,R12,5 ; R4.7 := R12.5-Bit manipulation
-++Bit manipulation
+--Shifting: shiftl, shiftr
-++-Shifting: shiftl, shiftr
+The shift instructions treat the operand as a string of bits, and move each bit a fixed distance to the left or right. @@ -6036,7 +6047,7 @@
Shifting: shiftl, shiftr
of the result become 0. The general form is -+shiftl Rd,Re,h EXP op=$e, ab=$10, f,g are ignored@@ -6049,7 +6060,7 @@Shifting: shiftl, shiftr
leftmost k bits become 0. The general form is -+shiftr Rd,Re,h EXP op=$e, ab=$11, f,g are ignored@@ -6060,7 +6071,7 @@Shifting: shiftl, shiftr
changed. -+shiftr R2,R3,5@@ -6077,7 +6088,7 @@Shifting: shiftl, shiftr
rightmost k bits become 0. -+moveb R4,7,R12,5 ; R4.7 := R12.5@@ -6086,15 +6097,15 @@Shifting: shiftl, shiftr
into a specified position in another register. -+moveb R4,7,R12,5 ; R4.7 := R12.5-Bit fields: extract, extracti
-++-Bit fields: extract, extracti
+The extract and extracti instructions provide access to a field within a word. The extract instruction copies an arbitrary field of bits @@ -6216,7 +6227,7 @@
Bit fields: extract, extracti
is -+extract Rd,f,g,Re,h@@ -6225,7 +6236,7 @@Bit fields: extract, extracti
with the corresponding bit in the source field: -+Rd.f := Re.h Rd.f-1 := Re.h-1 ... @@ -6240,14 +6251,14 @@Bit fields: extract, extracti
following bit assignments: -+R14.9 := R13.5 R14.8 := R13.4 R14.7 := R13.3-+; Assembly language: extract Rd,f,g,Re,h ; Effect: Rd.f..g := Re.h..(h+g-f) ; EXP opcode: e,15 @@ -6260,7 +6271,7 @@Bit fields: extract, extracti
Example:
-+extract R2,7,4,R3,20 R2.7 := R3.20 R2.6 := R3.19 @@ -6364,29 +6375,29 @@Bit fields: extract, extracti
-System control
-++System control
+--Request to OS: trap
++-Request to OS: trap
-Accessing control: getctl, putctl
++-Accessing control: getctl, putctl
--Context switching: resume
++-Context switching: resume
-Timer: timeron, timeroff
++Timer: timeron, timeroff
-Summary of instruction set
-++Summary of instruction set
+-@@ -6481,9 +6492,9 @@
Summary of instruction set
-RRR format
-++-RRR format
+This is some plain text. This is some plain text. This is some plain text. This is some plain text. This is some plain text. This is some @@ -6656,9 +6667,9 @@
RRR format
-RX format
-++-RX format
+All RX instructions apart from testset are in the Core subset.
@@ -6796,9 +6807,9 @@RX format
-EXP format
-++EXP format
+-Rkk D,K,Q
@@ -7110,9 +7121,9 @@EXP format
-Assembly language
-++Assembly language
+-:CUSTOMID: sec-assembly-language
@@ -7169,7 +7180,7 @@Assembly language
Assembly language
-+add R3,R5,R1 sub R4,R2,R3 mul R1,R9,R10 @@ -7178,16 +7189,16 @@Assembly language
Machine language
-+0351 1423 219a-Programs, modules, and files
-++Programs, modules, and files
+-Sigma16 has the flexibility required for "programming in the large". It provides modules, separate assembly, import and export, relocation, @@ -7225,9 +7236,9 @@
Programs, modules, and files
-Standalone programs
-++