overflow_generate.vhd

-- WARNING: Do NOT edit the input and output ports in this file in a text
-- editor if you plan to continue editing the block that represents it in
-- the Block Editor! File corruption is VERY likely to occur.

-- Copyright (C) 1991-2008 Altera Corporation
-- Your use of Altera Corporation's design tools, logic functions 
-- and other software and tools, and its AMPP partner logic 
-- functions, and any output files from any of the foregoing 
-- (including device programming or simulation files), and any 
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-- to the terms and conditions of the Altera Program License 
-- Subscription Agreement, Altera MegaCore Function License 
-- Agreement, or other applicable license agreement, including, 
-- without limitation, that your use is for the sole purpose of 
-- programming logic devices manufactured by Altera and sold by 
-- Altera or its authorized distributors.  Please refer to the 
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-- Generated by Quartus II Version 8.0 (Build Build 215 05/29/2008)
-- Created on Sat Jan 28 17:04:02 2012

LIBRARY ieee;
USE ieee.std_logic_1164.all;


--  Entity Declaration

ENTITY overflow_generate IS
	-- {{ALTERA_IO_BEGIN}} DO NOT REMOVE THIS LINE!
	PORT
	(
		a_in : IN STD_LOGIC_VECTOR(0 to 3);
		b_in : IN STD_LOGIC_VECTOR(0 to 3);
		overflow : OUT STD_LOGIC
	);
	-- {{ALTERA_IO_END}} DO NOT REMOVE THIS LINE!
	
END overflow_generate;


--  Architecture Body

ARCHITECTURE overflow_generate_architecture OF overflow_generate IS

	
BEGIN

	process (a_in,b_in)
		variable A,B,C,D,E,F,G,H:STD_LOGIC;
	begin
		A := a_in(0);
		B := a_in(1);
		C := a_in(2);
		D := a_in(3);
		
		E := b_in(0);
		F := b_in(1);
		G := b_in(2);
		H := b_in(3);
		
	overflow <= (not B and C and not E and F) or (A and not C and not E and F) or (C and not D and not E and F) or (not A and C and E and not F) or (B and not C and E and not F) or (C and not D and E and not F) or (not A and B and not E and G) or (A and not B and not F and G) or (A and not B and E and not G) or (not A and B and F and not G) or (B and not C and F and not G) or (A and not B and G and not H) or (A and not B and not C and not D and G) or (not A and C and D and F and not G) or (B and not C and not E and G and H) or (not A and B and C and G and not H) or (not A and B and D and G and not H) or (A and not C and not D and G and not H) or (B and not D and F and not G and not H) or (C and E and not F and not G and not H) or (not A and C and D and not E and G and H);
	
	end process;

END overflow_generate_architecture;