diff --git a/cranelift/codegen/src/data_value.rs b/cranelift/codegen/src/data_value.rs
index affc5b711a91..86f1882c325b 100644
--- a/cranelift/codegen/src/data_value.rs
+++ b/cranelift/codegen/src/data_value.rs
@@ -10,7 +10,7 @@ use core::fmt::{self, Display, Formatter};
 ///
 /// [Value]: crate::ir::Value
 #[allow(missing_docs)]
-#[derive(Clone, Debug, PartialEq, PartialOrd)]
+#[derive(Clone, Debug, PartialOrd)]
 pub enum DataValue {
     B(bool),
     I8(i8),
@@ -29,6 +29,44 @@ pub enum DataValue {
     V64([u8; 8]),
 }
 
+impl PartialEq for DataValue {
+    fn eq(&self, other: &Self) -> bool {
+        use DataValue::*;
+        match (self, other) {
+            (B(l), B(r)) => l == r,
+            (B(_), _) => false,
+            (I8(l), I8(r)) => l == r,
+            (I8(_), _) => false,
+            (I16(l), I16(r)) => l == r,
+            (I16(_), _) => false,
+            (I32(l), I32(r)) => l == r,
+            (I32(_), _) => false,
+            (I64(l), I64(r)) => l == r,
+            (I64(_), _) => false,
+            (I128(l), I128(r)) => l == r,
+            (I128(_), _) => false,
+            (U8(l), U8(r)) => l == r,
+            (U8(_), _) => false,
+            (U16(l), U16(r)) => l == r,
+            (U16(_), _) => false,
+            (U32(l), U32(r)) => l == r,
+            (U32(_), _) => false,
+            (U64(l), U64(r)) => l == r,
+            (U64(_), _) => false,
+            (U128(l), U128(r)) => l == r,
+            (U128(_), _) => false,
+            (F32(l), F32(r)) => l.as_f32() == r.as_f32(),
+            (F32(_), _) => false,
+            (F64(l), F64(r)) => l.as_f64() == r.as_f64(),
+            (F64(_), _) => false,
+            (V128(l), V128(r)) => l == r,
+            (V128(_), _) => false,
+            (V64(l), V64(r)) => l == r,
+            (V64(_), _) => false,
+        }
+    }
+}
+
 impl DataValue {
     /// Try to cast an immediate integer (a wrapped `i64` on most Cranelift instructions) to the
     /// given Cranelift [Type].
diff --git a/cranelift/codegen/src/ir/immediates.rs b/cranelift/codegen/src/ir/immediates.rs
index 445e3f9ae5ec..a98a9596f68f 100644
--- a/cranelift/codegen/src/ir/immediates.rs
+++ b/cranelift/codegen/src/ir/immediates.rs
@@ -475,8 +475,11 @@ impl FromStr for Offset32 {
 /// We specifically avoid using a f32 here since some architectures may silently alter floats.
 /// See: https://github.com/bytecodealliance/wasmtime/pull/2251#discussion_r498508646
 ///
+/// The [PartialEq] and [Hash] implementations are over the underlying bit pattern, but
+/// [PartialOrd] respects IEEE754 semantics.
+///
 /// All bit patterns are allowed.
-#[derive(Copy, Clone, Debug, Eq, Hash)]
+#[derive(Copy, Clone, Debug, Eq, PartialEq, Hash)]
 #[cfg_attr(feature = "enable-serde", derive(Serialize, Deserialize))]
 #[repr(C)]
 pub struct Ieee32(u32);
@@ -487,8 +490,11 @@ pub struct Ieee32(u32);
 /// We specifically avoid using a f64 here since some architectures may silently alter floats.
 /// See: https://github.com/bytecodealliance/wasmtime/pull/2251#discussion_r498508646
 ///
+/// The [PartialEq] and [Hash] implementations are over the underlying bit pattern, but
+/// [PartialOrd] respects IEEE754 semantics.
+///
 /// All bit patterns are allowed.
-#[derive(Copy, Clone, Debug, Eq, Hash)]
+#[derive(Copy, Clone, Debug, Eq, PartialEq, Hash)]
 #[cfg_attr(feature = "enable-serde", derive(Serialize, Deserialize))]
 #[repr(C)]
 pub struct Ieee64(u64);
@@ -845,12 +851,6 @@ impl PartialOrd for Ieee32 {
     }
 }
 
-impl PartialEq<Ieee32> for Ieee32 {
-    fn eq(&self, other: &Ieee32) -> bool {
-        self.as_f32().eq(&other.as_f32())
-    }
-}
-
 impl Display for Ieee32 {
     fn fmt(&self, f: &mut Formatter) -> fmt::Result {
         let bits: u32 = self.0;
@@ -1037,12 +1037,6 @@ impl PartialOrd for Ieee64 {
     }
 }
 
-impl PartialEq<Ieee64> for Ieee64 {
-    fn eq(&self, other: &Ieee64) -> bool {
-        self.as_f64().eq(&other.as_f64())
-    }
-}
-
 impl Display for Ieee64 {
     fn fmt(&self, f: &mut Formatter) -> fmt::Result {
         let bits: u64 = self.0;