From 36f3280a91bca8145a2630bcf12f9180ecaf91eb Mon Sep 17 00:00:00 2001 From: Jamie Hanlon Date: Tue, 8 Feb 2022 22:00:44 +0000 Subject: [PATCH] Add note on the extended test set --- docs/index.rst | 8 ++++++-- 1 file changed, 6 insertions(+), 2 deletions(-) diff --git a/docs/index.rst b/docs/index.rst index 0927930..b95906a 100644 --- a/docs/index.rst +++ b/docs/index.rst @@ -217,8 +217,8 @@ Contributing Contributions are welcome, please follow the `LLVM coding standards `_. -Debugging ---------- +Developer notes +--------------- Produce XML from a test case: @@ -256,6 +256,10 @@ Run Python unit tests directly (the version of Python must match the build): $ cd Debug/tests $ python3 py_wrapper_tests.py +To run the extended test set, the +`netlist-paths-tests `_ +repository contains tests based on external System Verilog designs. + .. _cpp_api: