DSVerifier is a verification tool for digital systems. In particular, DSVerifier employs the bounded model checking (BMC) technique based on satisfiability modulo theories (SMT) and boolean satisfiability (SAT), which allows engineers to verify the occurrence of design errors, due to the finite word-length (FWL) effects employed in fixed-point digital filters and controllers.
This is not the official repository for DSVerifier anymore.
Please, visit the SSVLAB's repository to get the newer versions of DSVerifier.