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ejer2.qsys
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<?xml version="1.0" encoding="UTF-8"?>
<system name="$${FILENAME}">
<component
name="$${FILENAME}"
displayName="$${FILENAME}"
version="1.0"
description=""
tags=""
categories="System" />
<parameter name="bonusData"><![CDATA[bonusData
{
element $${FILENAME}
{
}
element HEX3_HEX0
{
datum _sortIndex
{
value = "18";
type = "int";
}
datum sopceditor_expanded
{
value = "0";
type = "boolean";
}
}
element HEX7_HEX4
{
datum _sortIndex
{
value = "19";
type = "int";
}
datum sopceditor_expanded
{
value = "0";
type = "boolean";
}
}
element jtag_uart.avalon_jtag_slave
{
datum _lockedAddress
{
value = "1";
type = "boolean";
}
datum baseAddress
{
value = "268439552";
type = "String";
}
}
element char_lcd.avalon_lcd_slave
{
datum _lockedAddress
{
value = "1";
type = "boolean";
}
datum baseAddress
{
value = "268447824";
type = "String";
}
}
element HEX7_HEX4.avalon_parallel_port_slave
{
datum _lockedAddress
{
value = "1";
type = "boolean";
}
datum baseAddress
{
value = "268435504";
type = "String";
}
}
element green_leds.avalon_parallel_port_slave
{
datum _lockedAddress
{
value = "1";
type = "boolean";
}
datum baseAddress
{
value = "268435472";
type = "String";
}
}
element red_leds.avalon_parallel_port_slave
{
datum _lockedAddress
{
value = "1";
type = "boolean";
}
datum baseAddress
{
value = "268435456";
type = "String";
}
}
element switches.avalon_parallel_port_slave
{
datum _lockedAddress
{
value = "1";
type = "boolean";
}
datum baseAddress
{
value = "268435520";
type = "String";
}
}
element pushbuttons.avalon_parallel_port_slave
{
datum _lockedAddress
{
value = "1";
type = "boolean";
}
datum baseAddress
{
value = "268435536";
type = "String";
}
}
element HEX3_HEX0.avalon_parallel_port_slave
{
datum _lockedAddress
{
value = "1";
type = "boolean";
}
datum baseAddress
{
value = "268435488";
type = "String";
}
}
element char_lcd
{
datum _sortIndex
{
value = "22";
type = "int";
}
datum sopceditor_expanded
{
value = "0";
type = "boolean";
}
}
element clk_27
{
datum _sortIndex
{
value = "1";
type = "int";
}
datum sopceditor_expanded
{
value = "0";
type = "boolean";
}
}
element clk_50
{
datum _sortIndex
{
value = "0";
type = "int";
}
datum sopceditor_expanded
{
value = "0";
type = "boolean";
}
}
element performance_counter.control_slave
{
datum _lockedAddress
{
value = "1";
type = "boolean";
}
datum baseAddress
{
value = "268443712";
type = "String";
}
}
element sysid.control_slave
{
datum _lockedAddress
{
value = "1";
type = "boolean";
}
datum baseAddress
{
value = "268443680";
type = "String";
}
}
element cpu
{
datum _sortIndex
{
value = "7";
type = "int";
}
datum sopceditor_expanded
{
value = "0";
type = "boolean";
}
}
element flash_bridge
{
datum _sortIndex
{
value = "11";
type = "int";
}
datum sopceditor_expanded
{
value = "0";
type = "boolean";
}
}
element flash_controller
{
datum _sortIndex
{
value = "10";
type = "int";
}
datum sopceditor_expanded
{
value = "0";
type = "boolean";
}
}
element green_leds
{
datum _sortIndex
{
value = "17";
type = "int";
}
datum sopceditor_expanded
{
value = "0";
type = "boolean";
}
}
element cpu.jtag_debug_module
{
datum _lockedAddress
{
value = "1";
type = "boolean";
}
datum baseAddress
{
value = "167772160";
type = "String";
}
}
element jtag_uart
{
datum _sortIndex
{
value = "12";
type = "int";
}
datum sopceditor_expanded
{
value = "0";
type = "boolean";
}
}
element onchip_memory
{
datum _sortIndex
{
value = "9";
type = "int";
}
datum sopceditor_expanded
{
value = "0";
type = "boolean";
}
}
element performance_counter
{
datum _sortIndex
{
value = "15";
type = "int";
}
datum sopceditor_expanded
{
value = "0";
type = "boolean";
}
}
element pushbuttons
{
datum _sortIndex
{
value = "21";
type = "int";
}
datum sopceditor_expanded
{
value = "0";
type = "boolean";
}
}
element red_leds
{
datum _sortIndex
{
value = "16";
type = "int";
}
datum sopceditor_expanded
{
value = "0";
type = "boolean";
}
}
element reset_bridge
{
datum _sortIndex
{
value = "2";
type = "int";
}
datum sopceditor_expanded
{
value = "0";
type = "boolean";
}
}
element sdram.s1
{
datum _lockedAddress
{
value = "1";
type = "boolean";
}
datum baseAddress
{
value = "0";
type = "String";
}
}
element timer.s1
{
datum _lockedAddress
{
value = "1";
type = "boolean";
}
datum baseAddress
{
value = "268443648";
type = "String";
}
}
element onchip_memory.s1
{
datum _lockedAddress
{
value = "1";
type = "boolean";
}
datum baseAddress
{
value = "136314880";
type = "String";
}
}
element sdram
{
datum _sortIndex
{
value = "8";
type = "int";
}
datum sopceditor_expanded
{
value = "0";
type = "boolean";
}
}
element sdram_clk
{
datum _sortIndex
{
value = "5";
type = "int";
}
datum sopceditor_expanded
{
value = "0";
type = "boolean";
}
}
element switches
{
datum _sortIndex
{
value = "20";
type = "int";
}
datum sopceditor_expanded
{
value = "0";
type = "boolean";
}
}
element sys_clk
{
datum _sortIndex
{
value = "4";
type = "int";
}
datum sopceditor_expanded
{
value = "0";
type = "boolean";
}
}
element sysid
{
datum _sortIndex
{
value = "14";
type = "int";
}
datum sopceditor_expanded
{
value = "0";
type = "boolean";
}
}
element timer
{
datum _sortIndex
{
value = "13";
type = "int";
}
datum sopceditor_expanded
{
value = "0";
type = "boolean";
}
}
element flash_controller.uas
{
datum _lockedAddress
{
value = "1";
type = "boolean";
}
datum baseAddress
{
value = "142606336";
type = "String";
}
}
element up_clocks
{
datum _sortIndex
{
value = "3";
type = "int";
}
datum sopceditor_expanded
{
value = "0";
type = "boolean";
}
}
element vga_clk
{
datum _sortIndex
{
value = "6";
type = "int";
}
datum sopceditor_expanded
{
value = "0";
type = "boolean";
}
}
}
]]></parameter>
<parameter name="clockCrossingAdapter" value="HANDSHAKE" />
<parameter name="device" value="EP4CE115F29C7" />
<parameter name="deviceFamily" value="Cyclone IV E" />
<parameter name="deviceSpeedGrade" value="7" />
<parameter name="fabricMode" value="QSYS" />
<parameter name="generateLegacySim" value="false" />
<parameter name="generationId" value="0" />
<parameter name="globalResetBus" value="false" />
<parameter name="hdlLanguage" value="VERILOG" />
<parameter name="maxAdditionalLatency" value="1" />
<parameter name="projectName">DE2_115_Media_Computer.qpf</parameter>
<parameter name="sopcBorderPoints" value="false" />
<parameter name="systemHash" value="1" />
<parameter name="timeStamp" value="1434115819974" />
<parameter name="useTestBenchNamingPattern" value="false" />
<instanceScript></instanceScript>
<interface name="clk_50_in" internal="clk_50.clk_in" type="clock" dir="end" />
<interface name="clk_27_in" internal="clk_27.clk_in" type="clock" dir="end" />
<interface
name="reset_bridge_in"
internal="reset_bridge.in_reset"
type="reset"
dir="end" />
<interface
name="sys_clk_out"
internal="sys_clk.out_clk"
type="clock"
dir="start" />
<interface
name="sdram_clk_out"
internal="sdram_clk.out_clk"
type="clock"
dir="start" />
<interface
name="vga_clk_out"
internal="vga_clk.out_clk"
type="clock"
dir="start" />
<interface name="sdram_out" internal="sdram.wire" type="conduit" dir="end" />
<interface
name="flash_bridge_out"
internal="flash_bridge.out"
type="conduit"
dir="end" />
<interface
name="red_leds_external_interface_out"
internal="red_leds.external_interface"
type="conduit"
dir="end" />
<interface
name="green_leds_external_interface_out"
internal="green_leds.external_interface"
type="conduit"
dir="end" />
<interface
name="hex3_hex0_external_interface_out"
internal="HEX3_HEX0.external_interface"
type="conduit"
dir="end" />
<interface
name="hex7_hex4_external_interface_out"
internal="HEX7_HEX4.external_interface"
type="conduit"
dir="end" />
<interface
name="switches_external_interface_out"
internal="switches.external_interface"
type="conduit"
dir="end" />
<interface
name="pushbuttons_external_interface_out"
internal="pushbuttons.external_interface"
type="conduit"
dir="end" />
<interface
name="char_lcd_external_interface_out"
internal="char_lcd.external_interface"
type="conduit"
dir="end" />
<module kind="clock_source" version="13.0" enabled="1" name="clk_50">
<parameter name="clockFrequency" value="50000000" />
<parameter name="clockFrequencyKnown" value="true" />
<parameter name="inputClockFrequency" value="0" />
<parameter name="resetSynchronousEdges" value="NONE" />
</module>
<module kind="clock_source" version="13.0" enabled="1" name="clk_27">
<parameter name="clockFrequency" value="27000000" />
<parameter name="clockFrequencyKnown" value="true" />
<parameter name="inputClockFrequency" value="0" />
<parameter name="resetSynchronousEdges" value="NONE" />
</module>
<module
kind="altera_reset_bridge"
version="13.0"
enabled="1"
name="reset_bridge">
<parameter name="ACTIVE_LOW_RESET" value="1" />
<parameter name="SYNCHRONOUS_EDGES" value="none" />
<parameter name="NUM_RESET_OUTPUTS" value="1" />
<parameter name="AUTO_CLK_CLOCK_RATE" value="-1" />
</module>
<module kind="altera_up_clocks" version="13.0" enabled="1" name="up_clocks">
<parameter name="board" value="DE2-115" />
<parameter name="sys_clk_freq" value="50" />
<parameter name="sdram_clk" value="true" />
<parameter name="vga_clk" value="true" />
<parameter name="audio_clk" value="true" />
<parameter name="audio_clk_freq" value="12.288" />
<parameter name="AUTO_CLK_IN_PRIMARY_CLOCK_RATE" value="50000000" />
<parameter name="AUTO_DEVICE_FAMILY" value="Cyclone IV E" />
</module>
<module kind="altera_clock_bridge" version="13.0" enabled="1" name="sys_clk">
<parameter name="DERIVED_CLOCK_RATE" value="50000000" />
<parameter name="EXPLICIT_CLOCK_RATE" value="0" />
<parameter name="NUM_CLOCK_OUTPUTS" value="1" />
</module>
<module
kind="altera_clock_bridge"
version="13.0"
enabled="1"
name="sdram_clk">
<parameter name="DERIVED_CLOCK_RATE" value="50000000" />
<parameter name="EXPLICIT_CLOCK_RATE" value="0" />
<parameter name="NUM_CLOCK_OUTPUTS" value="1" />
</module>
<module kind="altera_clock_bridge" version="13.0" enabled="1" name="vga_clk">
<parameter name="DERIVED_CLOCK_RATE" value="25000000" />
<parameter name="EXPLICIT_CLOCK_RATE" value="0" />
<parameter name="NUM_CLOCK_OUTPUTS" value="1" />
</module>
<module kind="altera_nios2_qsys" version="13.0" enabled="1" name="cpu">
<parameter name="setting_showUnpublishedSettings" value="false" />
<parameter name="setting_showInternalSettings" value="false" />
<parameter name="setting_preciseSlaveAccessErrorException" value="false" />
<parameter name="setting_preciseIllegalMemAccessException" value="false" />
<parameter name="setting_preciseDivisionErrorException" value="false" />
<parameter name="setting_performanceCounter" value="false" />
<parameter name="setting_illegalMemAccessDetection" value="false" />
<parameter name="setting_illegalInstructionsTrap" value="false" />
<parameter name="setting_fullWaveformSignals" value="false" />
<parameter name="setting_extraExceptionInfo" value="false" />
<parameter name="setting_exportPCB" value="false" />
<parameter name="setting_debugSimGen" value="false" />
<parameter name="setting_clearXBitsLDNonBypass" value="true" />
<parameter name="setting_bit31BypassDCache" value="true" />
<parameter name="setting_bigEndian" value="false" />
<parameter name="setting_export_large_RAMs" value="false" />
<parameter name="setting_asic_enabled" value="false" />
<parameter name="setting_asic_synopsys_translate_on_off" value="false" />
<parameter name="setting_oci_export_jtag_signals" value="false" />
<parameter name="setting_bhtIndexPcOnly" value="false" />
<parameter name="setting_avalonDebugPortPresent" value="false" />
<parameter name="setting_alwaysEncrypt" value="true" />
<parameter name="setting_allowFullAddressRange" value="false" />
<parameter name="setting_activateTrace" value="true" />
<parameter name="setting_activateTestEndChecker" value="false" />
<parameter name="setting_activateMonitors" value="true" />
<parameter name="setting_activateModelChecker" value="false" />
<parameter name="setting_HDLSimCachesCleared" value="true" />
<parameter name="setting_HBreakTest" value="false" />
<parameter name="muldiv_divider" value="false" />
<parameter name="mpu_useLimit" value="false" />
<parameter name="mpu_enabled" value="false" />
<parameter name="mmu_enabled" value="false" />
<parameter name="mmu_autoAssignTlbPtrSz" value="true" />
<parameter name="manuallyAssignCpuID" value="true" />
<parameter name="debug_triggerArming" value="true" />
<parameter name="debug_embeddedPLL" value="true" />
<parameter name="debug_debugReqSignals" value="false" />
<parameter name="debug_assignJtagInstanceID" value="false" />
<parameter name="dcache_omitDataMaster" value="false" />
<parameter name="cpuReset" value="false" />
<parameter name="is_hardcopy_compatible" value="false" />
<parameter name="setting_shadowRegisterSets" value="0" />
<parameter name="mpu_numOfInstRegion" value="8" />
<parameter name="mpu_numOfDataRegion" value="8" />
<parameter name="mmu_TLBMissExcOffset" value="0" />
<parameter name="debug_jtagInstanceID" value="0" />
<parameter name="resetOffset" value="0" />
<parameter name="exceptionOffset" value="32" />
<parameter name="cpuID" value="0" />
<parameter name="cpuID_stored" value="0" />
<parameter name="breakOffset" value="32" />
<parameter name="userDefinedSettings" value="" />
<parameter name="resetSlave" value="sdram.s1" />
<parameter name="mmu_TLBMissExcSlave" value="None" />
<parameter name="exceptionSlave" value="sdram.s1" />
<parameter name="breakSlave">cpu.jtag_debug_module</parameter>
<parameter name="setting_perfCounterWidth" value="32" />
<parameter name="setting_interruptControllerType" value="Internal" />
<parameter name="setting_branchPredictionType" value="Automatic" />
<parameter name="setting_bhtPtrSz" value="8" />
<parameter name="muldiv_multiplierType" value="EmbeddedMulFast" />
<parameter name="mpu_minInstRegionSize" value="12" />
<parameter name="mpu_minDataRegionSize" value="12" />
<parameter name="mmu_uitlbNumEntries" value="4" />
<parameter name="mmu_udtlbNumEntries" value="6" />
<parameter name="mmu_tlbPtrSz" value="7" />
<parameter name="mmu_tlbNumWays" value="16" />
<parameter name="mmu_processIDNumBits" value="8" />
<parameter name="impl" value="Small" />
<parameter name="icache_size" value="4096" />
<parameter name="icache_tagramBlockType" value="Automatic" />
<parameter name="icache_ramBlockType" value="Automatic" />
<parameter name="icache_numTCIM" value="0" />
<parameter name="icache_burstType" value="None" />
<parameter name="dcache_bursts" value="false" />
<parameter name="dcache_victim_buf_impl" value="ram" />
<parameter name="debug_level" value="Level2" />
<parameter name="debug_OCIOnchipTrace" value="_128" />
<parameter name="dcache_size" value="2048" />
<parameter name="dcache_tagramBlockType" value="Automatic" />
<parameter name="dcache_ramBlockType" value="Automatic" />
<parameter name="dcache_numTCDM" value="0" />
<parameter name="dcache_lineSize" value="32" />
<parameter name="setting_exportvectors" value="false" />
<parameter name="setting_ecc_present" value="false" />
<parameter name="regfile_ramBlockType" value="Automatic" />
<parameter name="ocimem_ramBlockType" value="Automatic" />
<parameter name="mmu_ramBlockType" value="Automatic" />
<parameter name="bht_ramBlockType" value="Automatic" />
<parameter name="instAddrWidth" value="28" />
<parameter name="dataAddrWidth" value="29" />
<parameter name="tightlyCoupledDataMaster0AddrWidth" value="1" />
<parameter name="tightlyCoupledDataMaster1AddrWidth" value="1" />
<parameter name="tightlyCoupledDataMaster2AddrWidth" value="1" />
<parameter name="tightlyCoupledDataMaster3AddrWidth" value="1" />
<parameter name="tightlyCoupledInstructionMaster0AddrWidth" value="1" />
<parameter name="tightlyCoupledInstructionMaster1AddrWidth" value="1" />
<parameter name="tightlyCoupledInstructionMaster2AddrWidth" value="1" />
<parameter name="tightlyCoupledInstructionMaster3AddrWidth" value="1" />
<parameter name="instSlaveMapParam"><![CDATA[<address-map><slave name='sdram.s1' start='0x0' end='0x8000000' /><slave name='onchip_memory.s1' start='0x8200000' end='0x8208000' /><slave name='flash_controller.uas' start='0x8800000' end='0x9000000' /><slave name='cpu.jtag_debug_module' start='0xA000000' end='0xA000800' /></address-map>]]></parameter>
<parameter name="dataSlaveMapParam"><![CDATA[<address-map><slave name='sdram.s1' start='0x0' end='0x8000000' /><slave name='onchip_memory.s1' start='0x8200000' end='0x8208000' /><slave name='flash_controller.uas' start='0x8800000' end='0x9000000' /><slave name='cpu.jtag_debug_module' start='0xA000000' end='0xA000800' /><slave name='red_leds.avalon_parallel_port_slave' start='0x10000000' end='0x10000010' /><slave name='green_leds.avalon_parallel_port_slave' start='0x10000010' end='0x10000020' /><slave name='HEX3_HEX0.avalon_parallel_port_slave' start='0x10000020' end='0x10000030' /><slave name='HEX7_HEX4.avalon_parallel_port_slave' start='0x10000030' end='0x10000040' /><slave name='switches.avalon_parallel_port_slave' start='0x10000040' end='0x10000050' /><slave name='pushbuttons.avalon_parallel_port_slave' start='0x10000050' end='0x10000060' /><slave name='jtag_uart.avalon_jtag_slave' start='0x10001000' end='0x10001008' /><slave name='timer.s1' start='0x10002000' end='0x10002020' /><slave name='sysid.control_slave' start='0x10002020' end='0x10002028' /><slave name='performance_counter.control_slave' start='0x10002040' end='0x10002080' /><slave name='char_lcd.avalon_lcd_slave' start='0x10003050' end='0x10003052' /></address-map>]]></parameter>
<parameter name="clockFrequency" value="50000000" />
<parameter name="deviceFamilyName" value="Cyclone IV E" />
<parameter name="internalIrqMaskSystemInfo" value="259" />
<parameter name="customInstSlavesSystemInfo" value="<info/>" />
<parameter name="deviceFeaturesSystemInfo">ADDRESS_STALL 1 CELL_LEVEL_BACK_ANNOTATION_DISABLED 0 COMPILER_SUPPORT 1 DSP 0 DSP_SHIFTER_BLOCK 0 DUMP_ASM_LAB_BITS_FOR_POWER 1 EMUL 1 ENABLE_ADVANCED_IO_ANALYSIS_GUI_FEATURES 1 EPCS 1 ESB 0 FAKE1 0 FAKE2 0 FAKE3 0 FAMILY_LEVEL_INSTALLATION_ONLY 1 FITTER_USE_FALLING_EDGE_DELAY 0 GENERATE_DC_ON_CURRENT_WARNING_FOR_INTERNAL_CLAMPING_DIODE 0 HARDCOPY 0 HAS_18_BIT_MULTS 0 HAS_ACE_SUPPORT 1 HAS_ADJUSTABLE_OUTPUT_IO_TIMING_MEAS_POINT 0 HAS_ADVANCED_IO_INVERTED_CORNER 0 HAS_ADVANCED_IO_POWER_SUPPORT 1 HAS_ADVANCED_IO_TIMING_SUPPORT 1 HAS_ALM_SUPPORT 0 HAS_ATOM_AND_ROUTING_POWER_MODELED_TOGETHER 0 HAS_AUTO_DERIVE_CLOCK_UNCERTAINTY_SUPPORT 0 HAS_AUTO_FIT_SUPPORT 1 HAS_BALANCED_OPT_TECHNIQUE_SUPPORT 1 HAS_BENEFICIAL_SKEW_SUPPORT 1 HAS_BITLEVEL_DRIVE_STRENGTH_CONTROL 1 HAS_BSDL_FILE_GENERATION 1 HAS_CGA_SUPPORT 1 HAS_CHECK_NETLIST_SUPPORT 0 HAS_CLOCK_REGION_CHECKER_ENABLED 1 HAS_CORE_JUNCTION_TEMP_DERATING 0 HAS_CROSSTALK_SUPPORT 0 HAS_CUSTOM_REGION_SUPPORT 1 HAS_DAP_JTAG_FROM_HPS 0 HAS_DATA_DRIVEN_ACVQ_HSSI_SUPPORT 0 HAS_DDB_FDI_SUPPORT 0 HAS_DESIGN_ANALYZER_SUPPORT 1 HAS_DETAILED_IO_RAIL_POWER_MODEL 1 HAS_DETAILED_LEIM_STATIC_POWER_MODEL 1 HAS_DETAILED_LE_POWER_MODEL 1 HAS_DETAILED_ROUTING_MUX_STATIC_POWER_MODEL 1 HAS_DETAILED_THERMAL_CIRCUIT_PARAMETER_SUPPORT 1 HAS_DEVICE_MIGRATION_SUPPORT 1 HAS_DIAGONAL_MIGRATION_SUPPORT 0 HAS_EMIF_TOOLKIT_SUPPORT 0 HAS_ERROR_DETECTION_SUPPORT 0 HAS_FAMILY_VARIANT_MIGRATION_SUPPORT 0 HAS_FANOUT_FREE_NODE_SUPPORT 1 HAS_FAST_FIT_SUPPORT 1 HAS_FITTER_EARLY_TIMING_ESTIMATE_SUPPORT 1 HAS_FITTER_ECO_SUPPORT 1 HAS_FIT_NETLIST_OPT_RETIME_SUPPORT 1 HAS_FIT_NETLIST_OPT_SUPPORT 1 HAS_FORMAL_VERIFICATION_SUPPORT 1 HAS_FPGA_XCHANGE_SUPPORT 1 HAS_FSAC_LUTRAM_REGISTER_PACKING_SUPPORT 0 HAS_FULL_DAT_MIN_TIMING_SUPPORT 1 HAS_FULL_INCREMENTAL_DESIGN_SUPPORT 1 HAS_FUNCTIONAL_SIMULATION_SUPPORT 1 HAS_FUNCTIONAL_VERILOG_SIMULATION_SUPPORT 0 HAS_FUNCTIONAL_VHDL_SIMULATION_SUPPORT 0 HAS_GLITCH_FILTERING_SUPPORT 1 HAS_HC_READY_SUPPORT 0 HAS_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_HOLD_TIME_AVOIDANCE_ACROSS_CLOCK_SPINE_SUPPORT 1 HAS_HSPICE_WRITER_SUPPORT 1 HAS_HSSI_POWER_CALCULATOR 0 HAS_IBISO_WRITER_SUPPORT 0 HAS_INCREMENTAL_DAT_SUPPORT 1 HAS_INCREMENTAL_SYNTHESIS_SUPPORT 1 HAS_INTERFACE_PLANNER_SUPPORT 0 HAS_IO_ASSIGNMENT_ANALYSIS_SUPPORT 1 HAS_IO_DECODER 0 HAS_IO_PLACEMENT_OPTIMIZATION_SUPPORT 1 HAS_IO_SMART_RECOMPILE_SUPPORT 0 HAS_JITTER_SUPPORT 1 HAS_JTAG_SLD_HUB_SUPPORT 1 HAS_LIMITED_TCL_FITTER_SUPPORT 0 HAS_LOGIC_LOCK_SUPPORT 1 HAS_MICROPROCESSOR 0 HAS_MIF_SMART_COMPILE_SUPPORT 1 HAS_MINMAX_TIMING_MODELING_SUPPORT 1 HAS_MIN_TIMING_ANALYSIS_SUPPORT 1 HAS_MUX_RESTRUCTURE_SUPPORT 1 HAS_NEW_HC_FLOW_SUPPORT 0 HAS_NEW_SERDES_MAX_RESOURCE_COUNT_REPORTING_SUPPORT 1 HAS_NEW_VPR_SUPPORT 1 HAS_NONSOCKET_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_NO_HARDBLOCK_PARTITION_SUPPORT 0 HAS_NO_JTAG_USERCODE_SUPPORT 0 HAS_OPERATING_SETTINGS_AND_CONDITIONS_REPORTING_SUPPORT 1 HAS_PAD_LOCATION_ASSIGNMENT_SUPPORT 0 HAS_PARTIAL_RECONFIG_SUPPORT 0 HAS_PHYSICAL_NETLIST_OUTPUT 0 HAS_PHYSICAL_ROUTING_SUPPORT 0 HAS_PIN_SPECIFIC_VOLTAGE_SUPPORT 1 HAS_PLDM_REF_SUPPORT 1 HAS_POWER_ESTIMATION_SUPPORT 1 HAS_PRELIMINARY_CLOCK_UNCERTAINTY_NUMBERS 0 HAS_PRE_FITTER_FPP_SUPPORT 0 HAS_PRE_FITTER_LUTRAM_NETLIST_CHECKER_ENABLED 0 HAS_PVA_SUPPORT 1 HAS_RCF_SUPPORT 1 HAS_RCF_SUPPORT_FOR_DEBUGGING 0 HAS_RED_BLACK_SEPARATION_SUPPORT 0 HAS_RE_LEVEL_TIMING_GRAPH_SUPPORT 1 HAS_RISEFALL_DELAY_SUPPORT 1 HAS_SIGNAL_PROBE_SUPPORT 1 HAS_SIGNAL_TAP_SUPPORT 1 HAS_SIMULATOR_SUPPORT 0 HAS_SPLIT_IO_SUPPORT 1 HAS_SPLIT_LC_SUPPORT 1 HAS_SYNTH_FSYN_NETLIST_OPT_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_RETIME_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_SUPPORT 1 HAS_TCL_FITTER_SUPPORT 0 HAS_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_TEMPLATED_REGISTER_PACKING_SUPPORT 1 HAS_TIME_BORROWING_SUPPORT 0 HAS_TIMING_DRIVEN_SYNTHESIS_SUPPORT 1 HAS_TIMING_INFO_SUPPORT 1 HAS_TIMING_OPERATING_CONDITIONS 1 HAS_TIMING_SIMULATION_SUPPORT 1 HAS_TITAN_BASED_MAC_REGISTER_PACKER_SUPPORT 0 HAS_U2B2_SUPPORT 0 HAS_USER_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_USE_FITTER_INFO_SUPPORT 1 HAS_VCCPD_POWER_RAIL 0 HAS_VERTICAL_MIGRATION_SUPPORT 1 HAS_VIEWDRAW_SYMBOL_SUPPORT 0 HAS_VIO_SUPPORT 1 HAS_VIRTUAL_DEVICES 0 HAS_WYSIWYG_DFFEAS_SUPPORT 1 HAS_XIBISO_WRITER_SUPPORT 1 IFP_USE_LEGACY_IO_CHECKER 0 INCREMENTAL_DESIGN_SUPPORTS_COMPATIBLE_CONSTRAINTS 1 INSTALLED 0 IS_CONFIG_ROM 0 IS_DEFAULT_FAMILY 0 IS_HARDCOPY_FAMILY 0 LVDS_IO 1 M10K_MEMORY 0 M144K_MEMORY 0 M20K_MEMORY 0 M4K_MEMORY 0 M512_MEMORY 0 M9K_MEMORY 1 MLAB_MEMORY 0 MRAM_MEMORY 0 NOT_LISTED 0 NO_RPE_SUPPORT 0 NO_SUPPORT_FOR_LOGICLOCK_CONTENT_BACK_ANNOTATION 1 NO_SUPPORT_FOR_STA_CLOCK_UNCERTAINTY_CHECK 0 NO_TDC_SUPPORT 0 POSTFIT_BAK_DATABASE_EXPORT_ENABLED 1 POSTMAP_BAK_DATABASE_EXPORT_ENABLED 1 PROGRAMMER_SUPPORT 1 QFIT_IN_DEVELOPMENT 0 QMAP_IN_DEVELOPMENT 0 RAM_LOGICAL_NAME_CHECKING_IN_CUT_ENABLED 1 REPORTS_METASTABILITY_MTBF 1 REQUIRES_INSTALLATION_PATCH 0 REQUIRES_LIST_OF_TEMPERATURE_AND_VOLTAGE_OPERATING_CONDITIONS 1 RESERVES_SIGNAL_PROBE_PINS 0 RESOLVE_MAX_FANOUT_EARLY 1 RESOLVE_MAX_FANOUT_LATE 0 RESPECTS_FIXED_SIZED_LOCKED_LOCATION_LOGICLOCK 1 RESTRICTED_USER_SELECTION 0 RISEFALL_SUPPORT_IS_HIDDEN 0 STRICT_TIMING_DB_CHECKS 0 SUPPORTS_ADDITIONAL_OPTIONS_FOR_UNUSED_IO 0 SUPPORTS_CRC 1 SUPPORTS_DIFFERENTIAL_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_DSP_BALANCING_BACK_ANNOTATION 0 SUPPORTS_GENERATION_OF_EARLY_POWER_ESTIMATOR_FILE 1 SUPPORTS_GLOBAL_SIGNAL_BACK_ANNOTATION 0 SUPPORTS_MAC_CHAIN_OUT_ADDER 0 SUPPORTS_RAM_PACKING_BACK_ANNOTATION 0 SUPPORTS_REG_PACKING_BACK_ANNOTATION 0 SUPPORTS_SIGNALPROBE_REGISTER_PIPELINING 1 SUPPORTS_SINGLE_ENDED_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_USER_MANUAL_LOGIC_DUPLICATION 1 TMV_RUN_CUSTOMIZABLE_VIEWER 1 TMV_RUN_INTERNAL_DETAILS 1 TMV_RUN_INTERNAL_DETAILS_ON_IO 0 TMV_RUN_INTERNAL_DETAILS_ON_IOBUF 1 TMV_RUN_INTERNAL_DETAILS_ON_LCELL 0 TMV_RUN_INTERNAL_DETAILS_ON_LRAM 0 TRANSCEIVER_3G_BLOCK 0 TRANSCEIVER_6G_BLOCK 0 USES_ACV_FOR_FLED 1 USES_ADB_FOR_BACK_ANNOTATION 1 USES_ALTERA_LNSIM 0 USES_ASIC_ROUTING_POWER_CALCULATOR 0 USES_DATA_DRIVEN_PLL_COMPUTATION_UTIL 1 USES_DEV 1 USES_ICP_FOR_ECO_FITTER 0 USES_LIBERTY_TIMING 0 USES_POWER_SIGNAL_ACTIVITIES 1 USES_THIRD_GENERATION_TIMING_MODELS_TIS 1 USES_U2B2_TIMING_MODELS 0 USE_ADVANCED_IO_POWER_BY_DEFAULT 1 USE_ADVANCED_IO_TIMING_BY_DEFAULT 1 USE_BASE_FAMILY_DDB_PATH 0 USE_OCT_AUTO_CALIBRATION 1 USE_RELAX_IO_ASSIGNMENT_RULES 0 USE_RISEFALL_ONLY 1 USE_SEPARATE_LIST_FOR_TECH_MIGRATION 0 USE_SINGLE_COMPILER_PASS_PLL_MIF_FILE_WRITER 1 USE_TITAN_IO_BASED_IO_REGISTER_PACKER_UTIL 0 WYSIWYG_BUS_WIDTH_CHECKING_IN_CUT_ENABLED 1</parameter>
<parameter name="tightlyCoupledDataMaster0MapParam" value="" />
<parameter name="tightlyCoupledDataMaster1MapParam" value="" />
<parameter name="tightlyCoupledDataMaster2MapParam" value="" />
<parameter name="tightlyCoupledDataMaster3MapParam" value="" />
<parameter name="tightlyCoupledInstructionMaster0MapParam" value="" />
<parameter name="tightlyCoupledInstructionMaster1MapParam" value="" />
<parameter name="tightlyCoupledInstructionMaster2MapParam" value="" />
<parameter name="tightlyCoupledInstructionMaster3MapParam" value="" />
</module>
<module
kind="altera_avalon_new_sdram_controller"
version="13.0.1.99.2"
enabled="1"
name="sdram">
<parameter name="TAC" value="5.5" />
<parameter name="TRCD" value="20.0" />
<parameter name="TRFC" value="70.0" />
<parameter name="TRP" value="20.0" />
<parameter name="TWR" value="14.0" />
<parameter name="casLatency" value="3" />
<parameter name="columnWidth" value="10" />
<parameter name="dataWidth" value="32" />
<parameter name="generateSimulationModel" value="true" />
<parameter name="initRefreshCommands" value="2" />
<parameter name="model">single_Micron_MT48LC4M32B2_7_chip</parameter>
<parameter name="numberOfBanks" value="4" />
<parameter name="numberOfChipSelects" value="1" />
<parameter name="pinsSharedViaTriState" value="false" />
<parameter name="powerUpDelay" value="100.0" />
<parameter name="refreshPeriod" value="15.625" />
<parameter name="rowWidth" value="13" />
<parameter name="masteredTristateBridgeSlave" value="0" />
<parameter name="TMRD" value="3" />
<parameter name="initNOPDelay" value="0.0" />
<parameter name="registerDataIn" value="true" />
<parameter name="clockRate" value="50000000" />
<parameter name="componentName" value="$${FILENAME}_sdram" />
</module>
<module
kind="altera_avalon_onchip_memory2"
version="13.0.1.99.2"
enabled="1"
name="onchip_memory">
<parameter name="allowInSystemMemoryContentEditor" value="false" />
<parameter name="blockType" value="AUTO" />
<parameter name="dataWidth" value="32" />
<parameter name="dualPort" value="false" />
<parameter name="initMemContent" value="true" />
<parameter name="initializationFileName" value="onchip_mem.hex" />
<parameter name="instanceID" value="NONE" />
<parameter name="memorySize" value="32768" />
<parameter name="readDuringWriteMode" value="DONT_CARE" />
<parameter name="simAllowMRAMContentsFile" value="false" />
<parameter name="simMemInitOnlyFilename" value="0" />
<parameter name="singleClockOperation" value="false" />
<parameter name="slave1Latency" value="1" />
<parameter name="slave2Latency" value="1" />
<parameter name="useNonDefaultInitFile" value="false" />
<parameter name="useShallowMemBlocks" value="false" />
<parameter name="writable" value="true" />
<parameter name="autoInitializationFileName">$${FILENAME}_onchip_memory</parameter>
<parameter name="deviceFamily" value="Cyclone IV E" />
<parameter name="deviceFeatures">ADDRESS_STALL 1 CELL_LEVEL_BACK_ANNOTATION_DISABLED 0 COMPILER_SUPPORT 1 DSP 0 DSP_SHIFTER_BLOCK 0 DUMP_ASM_LAB_BITS_FOR_POWER 1 EMUL 1 ENABLE_ADVANCED_IO_ANALYSIS_GUI_FEATURES 1 EPCS 1 ESB 0 FAKE1 0 FAKE2 0 FAKE3 0 FAMILY_LEVEL_INSTALLATION_ONLY 1 FITTER_USE_FALLING_EDGE_DELAY 0 GENERATE_DC_ON_CURRENT_WARNING_FOR_INTERNAL_CLAMPING_DIODE 0 HARDCOPY 0 HAS_18_BIT_MULTS 0 HAS_ACE_SUPPORT 1 HAS_ADJUSTABLE_OUTPUT_IO_TIMING_MEAS_POINT 0 HAS_ADVANCED_IO_INVERTED_CORNER 0 HAS_ADVANCED_IO_POWER_SUPPORT 1 HAS_ADVANCED_IO_TIMING_SUPPORT 1 HAS_ALM_SUPPORT 0 HAS_ATOM_AND_ROUTING_POWER_MODELED_TOGETHER 0 HAS_AUTO_DERIVE_CLOCK_UNCERTAINTY_SUPPORT 0 HAS_AUTO_FIT_SUPPORT 1 HAS_BALANCED_OPT_TECHNIQUE_SUPPORT 1 HAS_BENEFICIAL_SKEW_SUPPORT 1 HAS_BITLEVEL_DRIVE_STRENGTH_CONTROL 1 HAS_BSDL_FILE_GENERATION 1 HAS_CGA_SUPPORT 1 HAS_CHECK_NETLIST_SUPPORT 0 HAS_CLOCK_REGION_CHECKER_ENABLED 1 HAS_CORE_JUNCTION_TEMP_DERATING 0 HAS_CROSSTALK_SUPPORT 0 HAS_CUSTOM_REGION_SUPPORT 1 HAS_DAP_JTAG_FROM_HPS 0 HAS_DATA_DRIVEN_ACVQ_HSSI_SUPPORT 0 HAS_DDB_FDI_SUPPORT 0 HAS_DESIGN_ANALYZER_SUPPORT 1 HAS_DETAILED_IO_RAIL_POWER_MODEL 1 HAS_DETAILED_LEIM_STATIC_POWER_MODEL 1 HAS_DETAILED_LE_POWER_MODEL 1 HAS_DETAILED_ROUTING_MUX_STATIC_POWER_MODEL 1 HAS_DETAILED_THERMAL_CIRCUIT_PARAMETER_SUPPORT 1 HAS_DEVICE_MIGRATION_SUPPORT 1 HAS_DIAGONAL_MIGRATION_SUPPORT 0 HAS_EMIF_TOOLKIT_SUPPORT 0 HAS_ERROR_DETECTION_SUPPORT 0 HAS_FAMILY_VARIANT_MIGRATION_SUPPORT 0 HAS_FANOUT_FREE_NODE_SUPPORT 1 HAS_FAST_FIT_SUPPORT 1 HAS_FITTER_EARLY_TIMING_ESTIMATE_SUPPORT 1 HAS_FITTER_ECO_SUPPORT 1 HAS_FIT_NETLIST_OPT_RETIME_SUPPORT 1 HAS_FIT_NETLIST_OPT_SUPPORT 1 HAS_FORMAL_VERIFICATION_SUPPORT 1 HAS_FPGA_XCHANGE_SUPPORT 1 HAS_FSAC_LUTRAM_REGISTER_PACKING_SUPPORT 0 HAS_FULL_DAT_MIN_TIMING_SUPPORT 1 HAS_FULL_INCREMENTAL_DESIGN_SUPPORT 1 HAS_FUNCTIONAL_SIMULATION_SUPPORT 1 HAS_FUNCTIONAL_VERILOG_SIMULATION_SUPPORT 0 HAS_FUNCTIONAL_VHDL_SIMULATION_SUPPORT 0 HAS_GLITCH_FILTERING_SUPPORT 1 HAS_HC_READY_SUPPORT 0 HAS_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_HOLD_TIME_AVOIDANCE_ACROSS_CLOCK_SPINE_SUPPORT 1 HAS_HSPICE_WRITER_SUPPORT 1 HAS_HSSI_POWER_CALCULATOR 0 HAS_IBISO_WRITER_SUPPORT 0 HAS_INCREMENTAL_DAT_SUPPORT 1 HAS_INCREMENTAL_SYNTHESIS_SUPPORT 1 HAS_INTERFACE_PLANNER_SUPPORT 0 HAS_IO_ASSIGNMENT_ANALYSIS_SUPPORT 1 HAS_IO_DECODER 0 HAS_IO_PLACEMENT_OPTIMIZATION_SUPPORT 1 HAS_IO_SMART_RECOMPILE_SUPPORT 0 HAS_JITTER_SUPPORT 1 HAS_JTAG_SLD_HUB_SUPPORT 1 HAS_LIMITED_TCL_FITTER_SUPPORT 0 HAS_LOGIC_LOCK_SUPPORT 1 HAS_MICROPROCESSOR 0 HAS_MIF_SMART_COMPILE_SUPPORT 1 HAS_MINMAX_TIMING_MODELING_SUPPORT 1 HAS_MIN_TIMING_ANALYSIS_SUPPORT 1 HAS_MUX_RESTRUCTURE_SUPPORT 1 HAS_NEW_HC_FLOW_SUPPORT 0 HAS_NEW_SERDES_MAX_RESOURCE_COUNT_REPORTING_SUPPORT 1 HAS_NEW_VPR_SUPPORT 1 HAS_NONSOCKET_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_NO_HARDBLOCK_PARTITION_SUPPORT 0 HAS_NO_JTAG_USERCODE_SUPPORT 0 HAS_OPERATING_SETTINGS_AND_CONDITIONS_REPORTING_SUPPORT 1 HAS_PAD_LOCATION_ASSIGNMENT_SUPPORT 0 HAS_PARTIAL_RECONFIG_SUPPORT 0 HAS_PHYSICAL_NETLIST_OUTPUT 0 HAS_PHYSICAL_ROUTING_SUPPORT 0 HAS_PIN_SPECIFIC_VOLTAGE_SUPPORT 1 HAS_PLDM_REF_SUPPORT 1 HAS_POWER_ESTIMATION_SUPPORT 1 HAS_PRELIMINARY_CLOCK_UNCERTAINTY_NUMBERS 0 HAS_PRE_FITTER_FPP_SUPPORT 0 HAS_PRE_FITTER_LUTRAM_NETLIST_CHECKER_ENABLED 0 HAS_PVA_SUPPORT 1 HAS_RCF_SUPPORT 1 HAS_RCF_SUPPORT_FOR_DEBUGGING 0 HAS_RED_BLACK_SEPARATION_SUPPORT 0 HAS_RE_LEVEL_TIMING_GRAPH_SUPPORT 1 HAS_RISEFALL_DELAY_SUPPORT 1 HAS_SIGNAL_PROBE_SUPPORT 1 HAS_SIGNAL_TAP_SUPPORT 1 HAS_SIMULATOR_SUPPORT 0 HAS_SPLIT_IO_SUPPORT 1 HAS_SPLIT_LC_SUPPORT 1 HAS_SYNTH_FSYN_NETLIST_OPT_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_RETIME_SUPPORT 1 HAS_SYNTH_NETLIST_OPT_SUPPORT 1 HAS_TCL_FITTER_SUPPORT 0 HAS_TECHNOLOGY_MIGRATION_SUPPORT 0 HAS_TEMPLATED_REGISTER_PACKING_SUPPORT 1 HAS_TIME_BORROWING_SUPPORT 0 HAS_TIMING_DRIVEN_SYNTHESIS_SUPPORT 1 HAS_TIMING_INFO_SUPPORT 1 HAS_TIMING_OPERATING_CONDITIONS 1 HAS_TIMING_SIMULATION_SUPPORT 1 HAS_TITAN_BASED_MAC_REGISTER_PACKER_SUPPORT 0 HAS_U2B2_SUPPORT 0 HAS_USER_HIGH_SPEED_LOW_POWER_TILE_SUPPORT 0 HAS_USE_FITTER_INFO_SUPPORT 1 HAS_VCCPD_POWER_RAIL 0 HAS_VERTICAL_MIGRATION_SUPPORT 1 HAS_VIEWDRAW_SYMBOL_SUPPORT 0 HAS_VIO_SUPPORT 1 HAS_VIRTUAL_DEVICES 0 HAS_WYSIWYG_DFFEAS_SUPPORT 1 HAS_XIBISO_WRITER_SUPPORT 1 IFP_USE_LEGACY_IO_CHECKER 0 INCREMENTAL_DESIGN_SUPPORTS_COMPATIBLE_CONSTRAINTS 1 INSTALLED 0 IS_CONFIG_ROM 0 IS_DEFAULT_FAMILY 0 IS_HARDCOPY_FAMILY 0 LVDS_IO 1 M10K_MEMORY 0 M144K_MEMORY 0 M20K_MEMORY 0 M4K_MEMORY 0 M512_MEMORY 0 M9K_MEMORY 1 MLAB_MEMORY 0 MRAM_MEMORY 0 NOT_LISTED 0 NO_RPE_SUPPORT 0 NO_SUPPORT_FOR_LOGICLOCK_CONTENT_BACK_ANNOTATION 1 NO_SUPPORT_FOR_STA_CLOCK_UNCERTAINTY_CHECK 0 NO_TDC_SUPPORT 0 POSTFIT_BAK_DATABASE_EXPORT_ENABLED 1 POSTMAP_BAK_DATABASE_EXPORT_ENABLED 1 PROGRAMMER_SUPPORT 1 QFIT_IN_DEVELOPMENT 0 QMAP_IN_DEVELOPMENT 0 RAM_LOGICAL_NAME_CHECKING_IN_CUT_ENABLED 1 REPORTS_METASTABILITY_MTBF 1 REQUIRES_INSTALLATION_PATCH 0 REQUIRES_LIST_OF_TEMPERATURE_AND_VOLTAGE_OPERATING_CONDITIONS 1 RESERVES_SIGNAL_PROBE_PINS 0 RESOLVE_MAX_FANOUT_EARLY 1 RESOLVE_MAX_FANOUT_LATE 0 RESPECTS_FIXED_SIZED_LOCKED_LOCATION_LOGICLOCK 1 RESTRICTED_USER_SELECTION 0 RISEFALL_SUPPORT_IS_HIDDEN 0 STRICT_TIMING_DB_CHECKS 0 SUPPORTS_ADDITIONAL_OPTIONS_FOR_UNUSED_IO 0 SUPPORTS_CRC 1 SUPPORTS_DIFFERENTIAL_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_DSP_BALANCING_BACK_ANNOTATION 0 SUPPORTS_GENERATION_OF_EARLY_POWER_ESTIMATOR_FILE 1 SUPPORTS_GLOBAL_SIGNAL_BACK_ANNOTATION 0 SUPPORTS_MAC_CHAIN_OUT_ADDER 0 SUPPORTS_RAM_PACKING_BACK_ANNOTATION 0 SUPPORTS_REG_PACKING_BACK_ANNOTATION 0 SUPPORTS_SIGNALPROBE_REGISTER_PIPELINING 1 SUPPORTS_SINGLE_ENDED_AIOT_BOARD_TRACE_MODEL 1 SUPPORTS_USER_MANUAL_LOGIC_DUPLICATION 1 TMV_RUN_CUSTOMIZABLE_VIEWER 1 TMV_RUN_INTERNAL_DETAILS 1 TMV_RUN_INTERNAL_DETAILS_ON_IO 0 TMV_RUN_INTERNAL_DETAILS_ON_IOBUF 1 TMV_RUN_INTERNAL_DETAILS_ON_LCELL 0 TMV_RUN_INTERNAL_DETAILS_ON_LRAM 0 TRANSCEIVER_3G_BLOCK 0 TRANSCEIVER_6G_BLOCK 0 USES_ACV_FOR_FLED 1 USES_ADB_FOR_BACK_ANNOTATION 1 USES_ALTERA_LNSIM 0 USES_ASIC_ROUTING_POWER_CALCULATOR 0 USES_DATA_DRIVEN_PLL_COMPUTATION_UTIL 1 USES_DEV 1 USES_ICP_FOR_ECO_FITTER 0 USES_LIBERTY_TIMING 0 USES_POWER_SIGNAL_ACTIVITIES 1 USES_THIRD_GENERATION_TIMING_MODELS_TIS 1 USES_U2B2_TIMING_MODELS 0 USE_ADVANCED_IO_POWER_BY_DEFAULT 1 USE_ADVANCED_IO_TIMING_BY_DEFAULT 1 USE_BASE_FAMILY_DDB_PATH 0 USE_OCT_AUTO_CALIBRATION 1 USE_RELAX_IO_ASSIGNMENT_RULES 0 USE_RISEFALL_ONLY 1 USE_SEPARATE_LIST_FOR_TECH_MIGRATION 0 USE_SINGLE_COMPILER_PASS_PLL_MIF_FILE_WRITER 1 USE_TITAN_IO_BASED_IO_REGISTER_PACKER_UTIL 0 WYSIWYG_BUS_WIDTH_CHECKING_IN_CUT_ENABLED 1</parameter>
</module>
<module
kind="altera_generic_tristate_controller"
version="13.0"
enabled="1"
name="flash_controller">
<parameter name="TCM_ADDRESS_W" value="23" />
<parameter name="TCM_DATA_W" value="8" />
<parameter name="TCM_BYTEENABLE_W" value="1" />
<parameter name="TCM_READ_WAIT" value="160" />
<parameter name="TCM_WRITE_WAIT" value="160" />
<parameter name="TCM_SETUP_WAIT" value="60" />
<parameter name="TCM_DATA_HOLD" value="60" />
<parameter name="TCM_MAX_PENDING_READ_TRANSACTIONS" value="3" />
<parameter name="TCM_TURNAROUND_TIME" value="2" />
<parameter name="TCM_TIMING_UNITS" value="0" />
<parameter name="TCM_READLATENCY" value="2" />
<parameter name="TCM_SYMBOLS_PER_WORD" value="1" />
<parameter name="USE_READDATA" value="1" />
<parameter name="USE_WRITEDATA" value="1" />
<parameter name="USE_READ" value="1" />
<parameter name="USE_WRITE" value="1" />
<parameter name="USE_BEGINTRANSFER" value="0" />
<parameter name="USE_BYTEENABLE" value="0" />
<parameter name="USE_CHIPSELECT" value="1" />
<parameter name="USE_LOCK" value="0" />
<parameter name="USE_ADDRESS" value="1" />
<parameter name="USE_WAITREQUEST" value="0" />
<parameter name="USE_WRITEBYTEENABLE" value="0" />
<parameter name="USE_OUTPUTENABLE" value="0" />
<parameter name="USE_RESETREQUEST" value="0" />
<parameter name="USE_IRQ" value="0" />
<parameter name="USE_RESET_OUTPUT" value="0" />
<parameter name="ACTIVE_LOW_READ" value="0" />
<parameter name="ACTIVE_LOW_LOCK" value="0" />
<parameter name="ACTIVE_LOW_WRITE" value="0" />
<parameter name="ACTIVE_LOW_CHIPSELECT" value="0" />
<parameter name="ACTIVE_LOW_BYTEENABLE" value="0" />
<parameter name="ACTIVE_LOW_OUTPUTENABLE" value="0" />
<parameter name="ACTIVE_LOW_WRITEBYTEENABLE" value="0" />
<parameter name="ACTIVE_LOW_WAITREQUEST" value="0" />
<parameter name="ACTIVE_LOW_BEGINTRANSFER" value="0" />
<parameter name="ACTIVE_LOW_RESETREQUEST" value="0" />
<parameter name="ACTIVE_LOW_IRQ" value="0" />
<parameter name="ACTIVE_LOW_RESET_OUTPUT" value="0" />
<parameter name="CHIPSELECT_THROUGH_READLATENCY" value="0" />
<parameter name="IS_MEMORY_DEVICE" value="1" />
<parameter name="MODULE_ASSIGNMENT_KEYS">embeddedsw.configuration.hwClassnameDriverSupportList,embeddedsw.CMacro.SIZE</parameter>
<parameter name="MODULE_ASSIGNMENT_VALUES">altera_avalon_lan91c111\,altera_avalon_cfi_flash,8388608u</parameter>
<parameter name="INTERFACE_ASSIGNMENT_KEYS" value="" />
<parameter name="INTERFACE_ASSIGNMENT_VALUES" value="" />
<parameter name="CLOCK_RATE" value="50000000" />
<parameter name="AUTO_CLK_CLOCK_DOMAIN" value="9" />
<parameter name="AUTO_CLK_RESET_DOMAIN" value="9" />
<parameter name="AUTO_TRISTATECONDUIT_MASTERS" value="" />
<parameter name="AUTO_DEVICE_FAMILY" value="Cyclone IV E" />
<parameter name="AUTO_DEVICE" value="EP4CE115F29C7" />
</module>
<module
kind="altera_tristate_conduit_bridge"
version="13.0"
enabled="1"
name="flash_bridge">
<parameter name="INTERFACE_INFO"><![CDATA[<info><slave name="tcs"><master name="flash_controller.tcm"><pin role="" width="1" type="Invalid" output_name="" output_enable_name="" input_name="" /><pin role="address" width="23" type="Output" output_name="tcm_address_out" output_enable_name="" input_name="" /><pin role="chipselect" width="1" type="Output" output_name="tcm_chipselect_out" output_enable_name="" input_name="" /><pin role="data" width="8" type="Bidirectional" output_name="tcm_data_out" output_enable_name="tcm_data_outen" input_name="tcm_data_in" /><pin role="write" width="1" type="Output" output_name="tcm_write_out" output_enable_name="" input_name="" /><pin role="read" width="1" type="Output" output_name="tcm_read_out" output_enable_name="" input_name="" /></master></slave></info>]]></parameter>
<parameter name="AUTO_CLK_CLOCK_RATE" value="50000000" />
<parameter name="AUTO_DEVICE_FAMILY" value="Cyclone IV E" />
</module>
<module
kind="altera_avalon_jtag_uart"
version="13.0.1.99.2"
enabled="1"
name="jtag_uart">
<parameter name="allowMultipleConnections" value="false" />
<parameter name="hubInstanceID" value="0" />
<parameter name="readBufferDepth" value="64" />
<parameter name="readIRQThreshold" value="8" />
<parameter name="simInputCharacterStream" value="" />
<parameter name="simInteractiveOptions">NO_INTERACTIVE_WINDOWS</parameter>
<parameter name="useRegistersForReadBuffer" value="false" />
<parameter name="useRegistersForWriteBuffer" value="false" />
<parameter name="useRelativePathForSimFile" value="false" />
<parameter name="writeBufferDepth" value="64" />
<parameter name="writeIRQThreshold" value="8" />
<parameter name="avalonSpec" value="2.0" />
</module>
<module
kind="altera_avalon_timer"
version="13.0.1.99.2"
enabled="1"
name="timer">
<parameter name="alwaysRun" value="false" />
<parameter name="counterSize" value="32" />
<parameter name="fixedPeriod" value="false" />
<parameter name="period" value="125" />
<parameter name="periodUnits" value="MSEC" />
<parameter name="resetOutput" value="false" />
<parameter name="snapshot" value="true" />
<parameter name="timeoutPulseOutput" value="false" />
<parameter name="systemFrequency" value="50000000" />
</module>
<module
kind="altera_avalon_sysid_qsys"
version="13.0"
enabled="1"
name="sysid">
<parameter name="id" value="0" />
<parameter name="timestamp" value="0" />
<parameter name="AUTO_CLK_CLOCK_RATE" value="50000000" />
<parameter name="AUTO_DEVICE_FAMILY" value="Cyclone IV E" />
</module>
<module
kind="altera_avalon_performance_counter"
version="13.0.1.99.2"
enabled="1"
name="performance_counter">
<parameter name="numberOfSections" value="3" />
</module>
<module
kind="altera_up_avalon_parallel_port"
version="13.0"
enabled="1"
name="red_leds">
<parameter name="board" value="DE2-115" />
<parameter name="custom_port" value="false" />
<parameter name="preset" value="LEDs" />
<parameter name="leds" value="Red" />
<parameter name="sevensegs" value="3 to 0" />
<parameter name="gpio" value="GPIO 0 (JP1)" />
<parameter name="custom_DW" value="32" />
<parameter name="custom_direction" value="Input only" />
<parameter name="capture" value="false" />
<parameter name="edge" value="Rising" />
<parameter name="irq" value="false" />
<parameter name="irq_type" value="Edge" />
<parameter name="AUTO_CLOCK_RESET_CLOCK_RATE" value="50000000" />
<parameter name="AUTO_DEVICE_FAMILY" value="Cyclone IV E" />
</module>
<module
kind="altera_up_avalon_parallel_port"
version="13.0"
enabled="1"
name="green_leds">
<parameter name="board" value="DE2-115" />
<parameter name="custom_port" value="false" />
<parameter name="preset" value="LEDs" />
<parameter name="leds" value="Green" />
<parameter name="sevensegs" value="3 to 0" />
<parameter name="gpio" value="GPIO 0 (JP1)" />
<parameter name="custom_DW" value="32" />
<parameter name="custom_direction" value="Input only" />
<parameter name="capture" value="false" />
<parameter name="edge" value="Rising" />
<parameter name="irq" value="false" />
<parameter name="irq_type" value="Edge" />
<parameter name="AUTO_CLOCK_RESET_CLOCK_RATE" value="50000000" />
<parameter name="AUTO_DEVICE_FAMILY" value="Cyclone IV E" />
</module>
<module
kind="altera_up_avalon_parallel_port"
version="13.0"
enabled="1"
name="HEX3_HEX0">
<parameter name="board" value="DE2-115" />
<parameter name="custom_port" value="false" />
<parameter name="preset">Seven Segment Displays</parameter>
<parameter name="leds" value="Green" />
<parameter name="sevensegs" value="3 to 0" />
<parameter name="gpio" value="GPIO 0 (JP1)" />
<parameter name="custom_DW" value="32" />
<parameter name="custom_direction" value="Input only" />
<parameter name="capture" value="false" />
<parameter name="edge" value="Rising" />
<parameter name="irq" value="false" />
<parameter name="irq_type" value="Edge" />
<parameter name="AUTO_CLOCK_RESET_CLOCK_RATE" value="50000000" />
<parameter name="AUTO_DEVICE_FAMILY" value="Cyclone IV E" />
</module>
<module
kind="altera_up_avalon_parallel_port"
version="13.0"
enabled="1"
name="HEX7_HEX4">
<parameter name="board" value="DE2-115" />
<parameter name="custom_port" value="false" />
<parameter name="preset">Seven Segment Displays</parameter>
<parameter name="leds" value="Green" />
<parameter name="sevensegs" value="7 to 4" />
<parameter name="gpio" value="GPIO 0 (JP1)" />
<parameter name="custom_DW" value="32" />