diff --git a/esp-hal/src/rmt.rs b/esp-hal/src/rmt.rs index 59d832630e9..80420b60e98 100644 --- a/esp-hal/src/rmt.rs +++ b/esp-hal/src/rmt.rs @@ -1326,8 +1326,7 @@ pub trait TxChannelAsync: TxChannelInternal { } Self::clear_interrupts(); - Self::listen_interrupt(Event::End); - Self::listen_interrupt(Event::Error); + Self::listen_interrupt(Event::End | Event::Error); Self::send_raw(data, false, 0)?; RmtTxFuture::new(self).await; @@ -1389,8 +1388,7 @@ pub trait RxChannelAsync: RxChannelInternal { } Self::clear_interrupts(); - Self::listen_interrupt(Event::End); - Self::listen_interrupt(Event::Error); + Self::listen_interrupt(Event::End | Event::Error); Self::start_receive_raw(); RmtRxFuture::new(self).await; @@ -1914,12 +1912,14 @@ mod chip_specific { fn enable_listen_interrupt(events: enumset::EnumSet<$crate::rmt::Event>, enable: bool) { let rmt = unsafe { &*crate::peripherals::RMT::PTR }; rmt.int_ena().modify(|_, w| { - for event in events { - match event { - $crate::rmt::Event::Error => w.[< ch $ch_num _tx_err >]().bit(enable), - $crate::rmt::Event::End => w.[< ch $ch_num _tx_end >]().bit(enable), - $crate::rmt::Event::Threshold => w.[< ch $ch_num _tx_thr_event >]().bit(enable), - }; + if events.contains($crate::rmt::Event::Error) { + w.[< ch $ch_num _tx_err >]().bit(enable); + } + if events.contains($crate::rmt::Event::End) { + w.[< ch $ch_num _tx_end >]().bit(enable); + } + if events.contains($crate::rmt::Event::Threshold) { + w.[< ch $ch_num _tx_thr_event >]().bit(enable); } w }); @@ -2032,12 +2032,14 @@ mod chip_specific { fn enable_listen_interrupt(events: enumset::EnumSet<$crate::rmt::Event>, enable: bool) { let rmt = unsafe { &*crate::peripherals::RMT::PTR }; rmt.int_ena().modify(|_, w| { - for event in events { - match event { - $crate::rmt::Event::Error => w.[< ch $ch_num _rx_err >]().bit(enable), - $crate::rmt::Event::End => w.[< ch $ch_num _rx_end >]().bit(enable), - $crate::rmt::Event::Threshold => w.[< ch $ch_num _rx_thr_event >]().bit(enable), - }; + if events.contains($crate::rmt::Event::Error) { + w.[< ch $ch_num _rx_err >]().bit(enable); + } + if events.contains($crate::rmt::Event::End) { + w.[< ch $ch_num _rx_end >]().bit(enable); + } + if events.contains($crate::rmt::Event::Threshold) { + w.[< ch $ch_num _rx_thr_event >]().bit(enable); } w }); @@ -2258,12 +2260,14 @@ mod chip_specific { fn enable_listen_interrupt(events: enumset::EnumSet<$crate::rmt::Event>, enable: bool) { let rmt = unsafe { &*crate::peripherals::RMT::PTR }; rmt.int_ena().modify(|_,w| { - for event in events { - match event { - $crate::rmt::Event::Error => w.[< ch $ch_num _err >]().bit(enable), - $crate::rmt::Event::End => w.[< ch $ch_num _tx_end >]().bit(enable), - $crate::rmt::Event::Threshold => w.[< ch $ch_num _tx_thr_event >]().bit(enable), - }; + if events.contains($crate::rmt::Event::Error) { + w.[< ch $ch_num _err >]().bit(enable); + } + if events.contains($crate::rmt::Event::End) { + w.[< ch $ch_num _tx_end >]().bit(enable); + } + if events.contains($crate::rmt::Event::Threshold) { + w.[< ch $ch_num _tx_thr_event >]().bit(enable); } w }); @@ -2381,12 +2385,14 @@ mod chip_specific { fn enable_listen_interrupt(events: enumset::EnumSet<$crate::rmt::Event>, enable: bool) { let rmt = unsafe { &*crate::peripherals::RMT::PTR }; rmt.int_ena().modify(|_, w| { - for event in events { - match event { - $crate::rmt::Event::Error => w.[< ch $ch_num _err >]().bit(enable), - $crate::rmt::Event::End => w.[< ch $ch_num _rx_end >]().bit(enable), - $crate::rmt::Event::Threshold => w.[< ch $ch_num _tx_thr_event >]().bit(enable), - }; + if events.contains($crate::rmt::Event::Error) { + w.[< ch $ch_num _err >]().bit(enable); + } + if events.contains($crate::rmt::Event::End) { + w.[< ch $ch_num _rx_end >]().bit(enable); + } + if events.contains($crate::rmt::Event::Threshold) { + w.[< ch $ch_num _tx_thr_event >]().bit(enable); } w });