From a286e37c1187a42393aed70e75c26d5a9d77081d Mon Sep 17 00:00:00 2001 From: wisp3rwind <17089248+wisp3rwind@users.noreply.github.com> Date: Thu, 16 Jan 2025 10:41:46 +0100 Subject: [PATCH] rmt: don't use the paste! macro There's no need for it, the PACs have accessor methods that take channel indices (which were already used in a few places). --- esp-hal/src/rmt.rs | 864 ++++++++++++++++++++++----------------------- 1 file changed, 428 insertions(+), 436 deletions(-) diff --git a/esp-hal/src/rmt.rs b/esp-hal/src/rmt.rs index e632fa58460..ccef64c66ec 100644 --- a/esp-hal/src/rmt.rs +++ b/esp-hal/src/rmt.rs @@ -1761,164 +1761,162 @@ mod chip_specific { macro_rules! impl_tx_channel { ($signal:ident, $ch_num:literal) => { - paste::paste! { - impl $crate::rmt::TxChannelInternal for $crate::rmt::Channel where Dm: $crate::DriverMode { - const CHANNEL: u8 = $ch_num; - - fn new() -> Self { - let guard = GenericPeripheralGuard::new(); - Self { - phantom: core::marker::PhantomData, - _guard: guard, - } - } + impl $crate::rmt::TxChannelInternal for $crate::rmt::Channel where Dm: $crate::DriverMode { + const CHANNEL: u8 = $ch_num; - fn output_signal() -> crate::gpio::OutputSignal { - crate::gpio::OutputSignal::$signal + fn new() -> Self { + let guard = GenericPeripheralGuard::new(); + Self { + phantom: core::marker::PhantomData, + _guard: guard, } + } - fn set_divider(divider: u8) { - let rmt = unsafe { &*crate::peripherals::RMT::PTR }; - rmt.ch_tx_conf0($ch_num).modify(|_, w| unsafe { w.div_cnt().bits(divider) }); - } + fn output_signal() -> crate::gpio::OutputSignal { + crate::gpio::OutputSignal::$signal + } - fn update() { - let rmt = unsafe { &*crate::peripherals::RMT::PTR }; - rmt.ch_tx_conf0($ch_num).modify(|_, w| w.conf_update().set_bit()); - } + fn set_divider(divider: u8) { + let rmt = unsafe { &*crate::peripherals::RMT::PTR }; + rmt.ch_tx_conf0($ch_num).modify(|_, w| unsafe { w.div_cnt().bits(divider) }); + } - fn set_generate_repeat_interrupt(repeats: u16) { - let rmt = unsafe { &*crate::peripherals::RMT::PTR }; - if repeats > 1 { - rmt.ch_tx_lim($ch_num).modify(|_, w| unsafe { - w.loop_count_reset().set_bit(); - w.tx_loop_cnt_en().set_bit(); - w.tx_loop_num().bits(repeats) - }); - } else { - rmt.ch_tx_lim($ch_num).modify(|_, w| unsafe { - w.loop_count_reset().set_bit(); - w.tx_loop_cnt_en().clear_bit(); - w.tx_loop_num().bits(0) - }); - } + fn update() { + let rmt = unsafe { &*crate::peripherals::RMT::PTR }; + rmt.ch_tx_conf0($ch_num).modify(|_, w| w.conf_update().set_bit()); + } - rmt.ch_tx_lim($ch_num).modify(|_, w| w.loop_count_reset().clear_bit()); + fn set_generate_repeat_interrupt(repeats: u16) { + let rmt = unsafe { &*crate::peripherals::RMT::PTR }; + if repeats > 1 { + rmt.ch_tx_lim($ch_num).modify(|_, w| unsafe { + w.loop_count_reset().set_bit(); + w.tx_loop_cnt_en().set_bit(); + w.tx_loop_num().bits(repeats) + }); + } else { + rmt.ch_tx_lim($ch_num).modify(|_, w| unsafe { + w.loop_count_reset().set_bit(); + w.tx_loop_cnt_en().clear_bit(); + w.tx_loop_num().bits(0) + }); } - fn clear_interrupts() { - let rmt = unsafe { &*crate::peripherals::RMT::PTR }; + rmt.ch_tx_lim($ch_num).modify(|_, w| w.loop_count_reset().clear_bit()); + } - rmt.int_clr().write(|w| { - w.[< ch $ch_num _tx_end >]().set_bit(); - w.[< ch $ch_num _tx_err >]().set_bit(); - w.[< ch $ch_num _tx_loop >]().set_bit(); - w.[< ch $ch_num _tx_thr_event >]().set_bit() - }); - } + fn clear_interrupts() { + let rmt = unsafe { &*crate::peripherals::RMT::PTR }; - fn set_continuous(continuous: bool) { - let rmt = unsafe { &*crate::peripherals::RMT::PTR }; + rmt.int_clr().write(|w| { + w.ch_tx_end($ch_num).set_bit(); + w.ch_tx_err($ch_num).set_bit(); + w.ch_tx_loop($ch_num).set_bit(); + w.ch_tx_thr_event($ch_num).set_bit() + }); + } - rmt.ch_tx_conf0($ch_num).modify(|_, w| w.tx_conti_mode().bit(continuous)); - } + fn set_continuous(continuous: bool) { + let rmt = unsafe { &*crate::peripherals::RMT::PTR }; - fn set_wrap_mode(wrap: bool) { - let rmt = unsafe { &*crate::peripherals::RMT::PTR }; + rmt.ch_tx_conf0($ch_num).modify(|_, w| w.tx_conti_mode().bit(continuous)); + } - rmt.ch_tx_conf0($ch_num).modify(|_, w| w.mem_tx_wrap_en().bit(wrap)); - } + fn set_wrap_mode(wrap: bool) { + let rmt = unsafe { &*crate::peripherals::RMT::PTR }; - fn set_carrier(carrier: bool, high: u16, low: u16, level: bool) { - let rmt = unsafe { &*crate::peripherals::RMT::PTR }; + rmt.ch_tx_conf0($ch_num).modify(|_, w| w.mem_tx_wrap_en().bit(wrap)); + } - rmt.chcarrier_duty($ch_num) - .write(|w| unsafe { w.carrier_high().bits(high).carrier_low().bits(low) }); + fn set_carrier(carrier: bool, high: u16, low: u16, level: bool) { + let rmt = unsafe { &*crate::peripherals::RMT::PTR }; - rmt.ch_tx_conf0($ch_num).modify(|_, w| { - w.carrier_en().bit(carrier); - w.carrier_eff_en().set_bit(); - w.carrier_out_lv().bit(level) - }); - } + rmt.chcarrier_duty($ch_num) + .write(|w| unsafe { w.carrier_high().bits(high).carrier_low().bits(low) }); - fn set_idle_output(enable: bool, level: bool) { - let rmt = unsafe { &*crate::peripherals::RMT::PTR }; - rmt.ch_tx_conf0($ch_num).modify(|_, w| w.idle_out_en().bit(enable).idle_out_lv().bit(level)); - } + rmt.ch_tx_conf0($ch_num).modify(|_, w| { + w.carrier_en().bit(carrier); + w.carrier_eff_en().set_bit(); + w.carrier_out_lv().bit(level) + }); + } - fn set_memsize(memsize: u8) { - let rmt = unsafe { &*crate::peripherals::RMT::PTR }; + fn set_idle_output(enable: bool, level: bool) { + let rmt = unsafe { &*crate::peripherals::RMT::PTR }; + rmt.ch_tx_conf0($ch_num).modify(|_, w| w.idle_out_en().bit(enable).idle_out_lv().bit(level)); + } - rmt.ch_tx_conf0($ch_num).modify(|_, w| unsafe { w.mem_size().bits(memsize) }); - } + fn set_memsize(memsize: u8) { + let rmt = unsafe { &*crate::peripherals::RMT::PTR }; - fn start_tx() { - let rmt = unsafe { &*crate::peripherals::RMT::PTR }; + rmt.ch_tx_conf0($ch_num).modify(|_, w| unsafe { w.mem_size().bits(memsize) }); + } - rmt.ref_cnt_rst().write(|w| unsafe { w.bits(1 << $ch_num) }); - Self::update(); + fn start_tx() { + let rmt = unsafe { &*crate::peripherals::RMT::PTR }; - rmt.ch_tx_conf0($ch_num).modify(|_, w| { - w.mem_rd_rst().set_bit(); - w.apb_mem_rst().set_bit(); - w.tx_start().set_bit() - }); - Self::update(); - } + rmt.ref_cnt_rst().write(|w| unsafe { w.bits(1 << $ch_num) }); + Self::update(); - fn is_done() -> bool { - let rmt = unsafe { &*crate::peripherals::RMT::PTR }; - rmt.int_raw().read().[< ch $ch_num _tx_end >]().bit() - } + rmt.ch_tx_conf0($ch_num).modify(|_, w| { + w.mem_rd_rst().set_bit(); + w.apb_mem_rst().set_bit(); + w.tx_start().set_bit() + }); + Self::update(); + } - fn is_error() -> bool { - let rmt = unsafe { &*crate::peripherals::RMT::PTR }; - rmt.int_raw().read().[< ch $ch_num _tx_err >]().bit() - } + fn is_done() -> bool { + let rmt = unsafe { &*crate::peripherals::RMT::PTR }; + rmt.int_raw().read().ch_tx_end($ch_num).bit() + } - fn is_threshold_set() -> bool { - let rmt = unsafe { &*crate::peripherals::RMT::PTR }; - rmt.int_raw().read().[< ch $ch_num _tx_thr_event >]().bit() - } + fn is_error() -> bool { + let rmt = unsafe { &*crate::peripherals::RMT::PTR }; + rmt.int_raw().read().ch_tx_err($ch_num).bit() + } - fn reset_threshold_set() { - let rmt = unsafe { &*crate::peripherals::RMT::PTR }; - rmt.int_clr() - .write(|w| w.[< ch $ch_num _tx_thr_event >]().set_bit()); - } + fn is_threshold_set() -> bool { + let rmt = unsafe { &*crate::peripherals::RMT::PTR }; + rmt.int_raw().read().ch_tx_thr_event($ch_num).bit() + } - fn set_threshold(threshold: u8) { - let rmt = unsafe { &*crate::peripherals::RMT::PTR }; - rmt.ch_tx_lim($ch_num).modify(|_, w| unsafe { w.tx_lim().bits(threshold as u16) }); - } + fn reset_threshold_set() { + let rmt = unsafe { &*crate::peripherals::RMT::PTR }; + rmt.int_clr() + .write(|w| w.ch_tx_thr_event($ch_num).set_bit()); + } - fn is_loopcount_interrupt_set() -> bool { - let rmt = unsafe { &*crate::peripherals::RMT::PTR }; - rmt.int_raw().read().[< ch $ch_num _tx_loop >]().bit() - } + fn set_threshold(threshold: u8) { + let rmt = unsafe { &*crate::peripherals::RMT::PTR }; + rmt.ch_tx_lim($ch_num).modify(|_, w| unsafe { w.tx_lim().bits(threshold as u16) }); + } - fn stop() { - let rmt = unsafe { &*crate::peripherals::RMT::PTR }; - rmt.ch_tx_conf0($ch_num).modify(|_, w| w.tx_stop().set_bit()); - Self::update(); - } + fn is_loopcount_interrupt_set() -> bool { + let rmt = unsafe { &*crate::peripherals::RMT::PTR }; + rmt.int_raw().read().ch_tx_loop($ch_num).bit() + } - fn enable_listen_interrupt(events: enumset::EnumSet<$crate::rmt::Event>, enable: bool) { - let rmt = unsafe { &*crate::peripherals::RMT::PTR }; - rmt.int_ena().modify(|_, w| { - if events.contains($crate::rmt::Event::Error) { - w.[< ch $ch_num _tx_err >]().bit(enable); - } - if events.contains($crate::rmt::Event::End) { - w.[< ch $ch_num _tx_end >]().bit(enable); - } - if events.contains($crate::rmt::Event::Threshold) { - w.[< ch $ch_num _tx_thr_event >]().bit(enable); - } - w - }); - } + fn stop() { + let rmt = unsafe { &*crate::peripherals::RMT::PTR }; + rmt.ch_tx_conf0($ch_num).modify(|_, w| w.tx_stop().set_bit()); + Self::update(); + } + + fn enable_listen_interrupt(events: enumset::EnumSet<$crate::rmt::Event>, enable: bool) { + let rmt = unsafe { &*crate::peripherals::RMT::PTR }; + rmt.int_ena().modify(|_, w| { + if events.contains($crate::rmt::Event::Error) { + w.ch_tx_err($ch_num).bit(enable); + } + if events.contains($crate::rmt::Event::End) { + w.ch_tx_end($ch_num).bit(enable); + } + if events.contains($crate::rmt::Event::Threshold) { + w.ch_tx_thr_event($ch_num).bit(enable); + } + w + }); } } } @@ -1926,119 +1924,117 @@ mod chip_specific { macro_rules! impl_rx_channel { ($signal:ident, $ch_num:literal, $ch_index:literal) => { - paste::paste! { - impl $crate::rmt::RxChannelInternal for $crate::rmt::Channel where Dm: $crate::DriverMode { - const CHANNEL: u8 = $ch_num; - - fn new() -> Self { - let guard = GenericPeripheralGuard::new(); - Self { - phantom: core::marker::PhantomData, - _guard: guard, - } - } + impl $crate::rmt::RxChannelInternal for $crate::rmt::Channel where Dm: $crate::DriverMode { + const CHANNEL: u8 = $ch_num; - fn input_signal() -> crate::gpio::InputSignal { - crate::gpio::InputSignal::$signal + fn new() -> Self { + let guard = GenericPeripheralGuard::new(); + Self { + phantom: core::marker::PhantomData, + _guard: guard, } + } - fn set_divider(divider: u8) { - let rmt = unsafe { &*crate::peripherals::RMT::PTR }; - rmt.[< ch $ch_num _rx_conf0 >]().modify(|_, w| unsafe { w.div_cnt().bits(divider) }); - } + fn input_signal() -> crate::gpio::InputSignal { + crate::gpio::InputSignal::$signal + } - fn update() { - let rmt = unsafe { &*crate::peripherals::RMT::PTR }; - rmt.[< ch $ch_num _rx_conf1 >]().modify(|_, w| w.conf_update().set_bit()); - } + fn set_divider(divider: u8) { + let rmt = unsafe { &*crate::peripherals::RMT::PTR }; + rmt.ch_rx_conf0($ch_index).modify(|_, w| unsafe { w.div_cnt().bits(divider) }); + } - fn clear_interrupts() { - let rmt = unsafe { &*crate::peripherals::RMT::PTR }; + fn update() { + let rmt = unsafe { &*crate::peripherals::RMT::PTR }; + rmt.ch_rx_conf1($ch_index).modify(|_, w| w.conf_update().set_bit()); + } - rmt.int_clr().write(|w| { - w.[< ch $ch_num _rx_end >]().set_bit(); - w.[< ch $ch_num _rx_err >]().set_bit(); - w.[< ch $ch_num _rx_thr_event >]().set_bit() - }); - } + fn clear_interrupts() { + let rmt = unsafe { &*crate::peripherals::RMT::PTR }; - fn set_wrap_mode(wrap: bool) { - let rmt = unsafe { &*crate::peripherals::RMT::PTR }; - rmt.[< ch $ch_num _rx_conf1 >]().modify(|_, w| w.mem_rx_wrap_en().bit(wrap)); - } + rmt.int_clr().write(|w| { + w.ch_rx_end($ch_index).set_bit(); + w.ch_rx_err($ch_index).set_bit(); + w.ch_rx_thr_event($ch_index).set_bit() + }); + } - fn set_carrier(carrier: bool, high: u16, low: u16, level: bool) { - let rmt = unsafe { &*crate::peripherals::RMT::PTR }; + fn set_wrap_mode(wrap: bool) { + let rmt = unsafe { &*crate::peripherals::RMT::PTR }; + rmt.ch_rx_conf1($ch_index).modify(|_, w| w.mem_rx_wrap_en().bit(wrap)); + } - rmt.ch_rx_carrier_rm($ch_index).write(|w| unsafe { - w.carrier_high_thres().bits(high); - w.carrier_low_thres().bits(low) - }); + fn set_carrier(carrier: bool, high: u16, low: u16, level: bool) { + let rmt = unsafe { &*crate::peripherals::RMT::PTR }; - rmt.[< ch $ch_num _rx_conf0 >]() - .modify(|_, w| w.carrier_en().bit(carrier).carrier_out_lv().bit(level)); - } + rmt.ch_rx_carrier_rm($ch_index).write(|w| unsafe { + w.carrier_high_thres().bits(high); + w.carrier_low_thres().bits(low) + }); - fn set_memsize(memsize: u8) { - let rmt = unsafe { &*crate::peripherals::RMT::PTR }; - rmt.[< ch $ch_num _rx_conf0 >]().modify(|_, w| unsafe { w.mem_size().bits(memsize) }); - } + rmt.ch_rx_conf0($ch_index) + .modify(|_, w| w.carrier_en().bit(carrier).carrier_out_lv().bit(level)); + } - fn start_rx() { - let rmt = unsafe { &*crate::peripherals::RMT::PTR }; - rmt.[< ch $ch_num _rx_conf1 >]().modify(|_, w| { - w.mem_wr_rst().set_bit(); - w.apb_mem_rst().set_bit(); - w.mem_owner().set_bit(); - w.rx_en().set_bit() - }); - } + fn set_memsize(memsize: u8) { + let rmt = unsafe { &*crate::peripherals::RMT::PTR }; + rmt.ch_rx_conf0($ch_index).modify(|_, w| unsafe { w.mem_size().bits(memsize) }); + } - fn is_done() -> bool { - let rmt = unsafe { &*crate::peripherals::RMT::PTR }; - rmt.int_raw().read().[< ch $ch_num _rx_end >]().bit() - } + fn start_rx() { + let rmt = unsafe { &*crate::peripherals::RMT::PTR }; + rmt.ch_rx_conf1($ch_index).modify(|_, w| { + w.mem_wr_rst().set_bit(); + w.apb_mem_rst().set_bit(); + w.mem_owner().set_bit(); + w.rx_en().set_bit() + }); + } - fn is_error() -> bool { - let rmt = unsafe { &*crate::peripherals::RMT::PTR }; - rmt.int_raw().read().[< ch $ch_num _rx_err >]().bit() - } + fn is_done() -> bool { + let rmt = unsafe { &*crate::peripherals::RMT::PTR }; + rmt.int_raw().read().ch_rx_end($ch_index).bit() + } - fn stop() { - let rmt = unsafe { &*crate::peripherals::RMT::PTR }; - rmt.[< ch $ch_num _rx_conf1 >]().modify(|_, w| w.rx_en().clear_bit()); - } + fn is_error() -> bool { + let rmt = unsafe { &*crate::peripherals::RMT::PTR }; + rmt.int_raw().read().ch_rx_err($ch_index).bit() + } - fn set_filter_threshold(value: u8) { - let rmt = unsafe { &*crate::peripherals::RMT::PTR }; + fn stop() { + let rmt = unsafe { &*crate::peripherals::RMT::PTR }; + rmt.ch_rx_conf1($ch_index).modify(|_, w| w.rx_en().clear_bit()); + } - rmt.[< ch $ch_num _rx_conf1 >]().modify(|_, w| unsafe { - w.rx_filter_en().bit(value > 0); - w.rx_filter_thres().bits(value) - }); - } + fn set_filter_threshold(value: u8) { + let rmt = unsafe { &*crate::peripherals::RMT::PTR }; - fn set_idle_threshold(value: u16) { - let rmt = unsafe { &*crate::peripherals::RMT::PTR }; + rmt.ch_rx_conf1($ch_index).modify(|_, w| unsafe { + w.rx_filter_en().bit(value > 0); + w.rx_filter_thres().bits(value) + }); + } - rmt.[< ch $ch_num _rx_conf0 >]().modify(|_, w| unsafe { w.idle_thres().bits(value) }); - } + fn set_idle_threshold(value: u16) { + let rmt = unsafe { &*crate::peripherals::RMT::PTR }; - fn enable_listen_interrupt(events: enumset::EnumSet<$crate::rmt::Event>, enable: bool) { - let rmt = unsafe { &*crate::peripherals::RMT::PTR }; - rmt.int_ena().modify(|_, w| { - if events.contains($crate::rmt::Event::Error) { - w.[< ch $ch_num _rx_err >]().bit(enable); - } - if events.contains($crate::rmt::Event::End) { - w.[< ch $ch_num _rx_end >]().bit(enable); - } - if events.contains($crate::rmt::Event::Threshold) { - w.[< ch $ch_num _rx_thr_event >]().bit(enable); - } - w - }); - } + rmt.ch_rx_conf0($ch_index).modify(|_, w| unsafe { w.idle_thres().bits(value) }); + } + + fn enable_listen_interrupt(events: enumset::EnumSet<$crate::rmt::Event>, enable: bool) { + let rmt = unsafe { &*crate::peripherals::RMT::PTR }; + rmt.int_ena().modify(|_, w| { + if events.contains($crate::rmt::Event::Error) { + w.ch_rx_err($ch_index).bit(enable); + } + if events.contains($crate::rmt::Event::End) { + w.ch_rx_end($ch_index).bit(enable); + } + if events.contains($crate::rmt::Event::Threshold) { + w.ch_rx_thr_event($ch_index).bit(enable); + } + w + }); } } } @@ -2119,279 +2115,275 @@ mod chip_specific { macro_rules! impl_tx_channel { ($signal:ident, $ch_num:literal) => { - paste::paste! { - impl super::TxChannelInternal for $crate::rmt::Channel where Dm: $crate::DriverMode { - const CHANNEL: u8 = $ch_num; - - fn new() -> Self { - let guard = GenericPeripheralGuard::new(); - Self { - phantom: core::marker::PhantomData, - _guard: guard, - } - } + impl super::TxChannelInternal for $crate::rmt::Channel where Dm: $crate::DriverMode { + const CHANNEL: u8 = $ch_num; - fn output_signal() -> crate::gpio::OutputSignal { - crate::gpio::OutputSignal::$signal + fn new() -> Self { + let guard = GenericPeripheralGuard::new(); + Self { + phantom: core::marker::PhantomData, + _guard: guard, } + } - fn set_divider(divider: u8) { - let rmt = unsafe { &*crate::peripherals::RMT::PTR }; - rmt.[< ch $ch_num conf0 >]().modify(|_, w| unsafe { w.div_cnt().bits(divider) }); - } + fn output_signal() -> crate::gpio::OutputSignal { + crate::gpio::OutputSignal::$signal + } - fn update() { - // no-op - } + fn set_divider(divider: u8) { + let rmt = unsafe { &*crate::peripherals::RMT::PTR }; + rmt.chconf0($ch_num).modify(|_, w| unsafe { w.div_cnt().bits(divider) }); + } - #[cfg(not(esp32))] - fn set_generate_repeat_interrupt(repeats: u16) { - let rmt = unsafe { &*crate::peripherals::RMT::PTR }; - if repeats > 1 { - rmt.ch_tx_lim($ch_num).modify(|_, w| unsafe { w.tx_loop_num().bits(repeats) }); - } else { - rmt.ch_tx_lim($ch_num).modify(|_, w| unsafe { w.tx_loop_num().bits(0) }); - } - } + fn update() { + // no-op + } - #[cfg(esp32)] - fn set_generate_repeat_interrupt(_repeats: u16) { - // unsupported + #[cfg(not(esp32))] + fn set_generate_repeat_interrupt(repeats: u16) { + let rmt = unsafe { &*crate::peripherals::RMT::PTR }; + if repeats > 1 { + rmt.ch_tx_lim($ch_num).modify(|_, w| unsafe { w.tx_loop_num().bits(repeats) }); + } else { + rmt.ch_tx_lim($ch_num).modify(|_, w| unsafe { w.tx_loop_num().bits(0) }); } + } - fn clear_interrupts() { - let rmt = unsafe { &*crate::peripherals::RMT::PTR }; + #[cfg(esp32)] + fn set_generate_repeat_interrupt(_repeats: u16) { + // unsupported + } - rmt.int_clr().write(|w| { - w.[< ch $ch_num _err >]().set_bit(); - w.[< ch $ch_num _tx_end >]().set_bit(); - w.[< ch $ch_num _tx_thr_event >]().set_bit() - }); - } + fn clear_interrupts() { + let rmt = unsafe { &*crate::peripherals::RMT::PTR }; - fn set_continuous(continuous: bool) { - let rmt = unsafe { &*crate::peripherals::RMT::PTR }; + rmt.int_clr().write(|w| { + w.ch_err($ch_num).set_bit(); + w.ch_tx_end($ch_num).set_bit(); + w.ch_tx_thr_event($ch_num).set_bit() + }); + } - rmt.[< ch $ch_num conf1 >]().modify(|_, w| w.tx_conti_mode().bit(continuous)); - } + fn set_continuous(continuous: bool) { + let rmt = unsafe { &*crate::peripherals::RMT::PTR }; - fn set_wrap_mode(wrap: bool) { - let rmt = unsafe { &*crate::peripherals::RMT::PTR }; - // this is "okay", because we use all TX channels always in wrap mode - rmt.apb_conf().modify(|_, w| w.mem_tx_wrap_en().bit(wrap)); - } + rmt.chconf1($ch_num).modify(|_, w| w.tx_conti_mode().bit(continuous)); + } - fn set_carrier(carrier: bool, high: u16, low: u16, level: bool) { - let rmt = unsafe { &*crate::peripherals::RMT::PTR }; + fn set_wrap_mode(wrap: bool) { + let rmt = unsafe { &*crate::peripherals::RMT::PTR }; + // this is "okay", because we use all TX channels always in wrap mode + rmt.apb_conf().modify(|_, w| w.mem_tx_wrap_en().bit(wrap)); + } - rmt.chcarrier_duty($ch_num) - .write(|w| unsafe { w.carrier_high().bits(high).carrier_low().bits(low) }); + fn set_carrier(carrier: bool, high: u16, low: u16, level: bool) { + let rmt = unsafe { &*crate::peripherals::RMT::PTR }; - rmt.[< ch $ch_num conf0 >]() - .modify(|_, w| w.carrier_en().bit(carrier).carrier_out_lv().bit(level)); - } + rmt.chcarrier_duty($ch_num) + .write(|w| unsafe { w.carrier_high().bits(high).carrier_low().bits(low) }); - fn set_idle_output(enable: bool, level: bool) { - let rmt = unsafe { &*crate::peripherals::RMT::PTR }; - rmt.[< ch $ch_num conf1 >]() - .modify(|_, w| w.idle_out_en().bit(enable).idle_out_lv().bit(level)); - } + rmt.chconf0($ch_num) + .modify(|_, w| w.carrier_en().bit(carrier).carrier_out_lv().bit(level)); + } - fn set_memsize(memsize: u8) { - let rmt = unsafe { &*crate::peripherals::RMT::PTR }; + fn set_idle_output(enable: bool, level: bool) { + let rmt = unsafe { &*crate::peripherals::RMT::PTR }; + rmt.chconf1($ch_num) + .modify(|_, w| w.idle_out_en().bit(enable).idle_out_lv().bit(level)); + } - rmt.[< ch $ch_num conf0 >]().modify(|_, w| unsafe { w.mem_size().bits(memsize) }); - } + fn set_memsize(memsize: u8) { + let rmt = unsafe { &*crate::peripherals::RMT::PTR }; - fn start_tx() { - let rmt = unsafe { &*crate::peripherals::RMT::PTR }; + rmt.chconf0($ch_num).modify(|_, w| unsafe { w.mem_size().bits(memsize) }); + } - rmt.[< ch $ch_num conf1 >]().modify(|_, w| { - w.mem_rd_rst().set_bit(); - w.apb_mem_rst().set_bit(); - w.tx_start().set_bit() - }); - } + fn start_tx() { + let rmt = unsafe { &*crate::peripherals::RMT::PTR }; - fn is_done() -> bool { - let rmt = unsafe { &*crate::peripherals::RMT::PTR }; - rmt.int_raw().read().[< ch $ch_num _tx_end >]().bit() - } + rmt.chconf1($ch_num).modify(|_, w| { + w.mem_rd_rst().set_bit(); + w.apb_mem_rst().set_bit(); + w.tx_start().set_bit() + }); + } - fn is_error() -> bool { - let rmt = unsafe { &*crate::peripherals::RMT::PTR }; - rmt.int_raw().read().[< ch $ch_num _err >]().bit() - } + fn is_done() -> bool { + let rmt = unsafe { &*crate::peripherals::RMT::PTR }; + rmt.int_raw().read().ch_tx_end($ch_num).bit() + } - fn is_threshold_set() -> bool { - let rmt = unsafe { &*crate::peripherals::RMT::PTR }; - rmt.int_raw().read().[< ch $ch_num _tx_thr_event >]().bit() - } + fn is_error() -> bool { + let rmt = unsafe { &*crate::peripherals::RMT::PTR }; + rmt.int_raw().read().ch_err($ch_num).bit() + } - fn reset_threshold_set() { - let rmt = unsafe { &*crate::peripherals::RMT::PTR }; - rmt.int_clr() - .write(|w| w.[< ch $ch_num _tx_thr_event >]().set_bit()); - } + fn is_threshold_set() -> bool { + let rmt = unsafe { &*crate::peripherals::RMT::PTR }; + rmt.int_raw().read().ch_tx_thr_event($ch_num).bit() + } - fn set_threshold(threshold: u8) { - let rmt = unsafe { &*crate::peripherals::RMT::PTR }; - rmt.ch_tx_lim($ch_num).modify(|_, w| unsafe { w.tx_lim().bits(threshold as u16) }); - } + fn reset_threshold_set() { + let rmt = unsafe { &*crate::peripherals::RMT::PTR }; + rmt.int_clr() + .write(|w| w.ch_tx_thr_event($ch_num).set_bit()); + } - fn is_loopcount_interrupt_set() -> bool { - // no-op - false - } + fn set_threshold(threshold: u8) { + let rmt = unsafe { &*crate::peripherals::RMT::PTR }; + rmt.ch_tx_lim($ch_num).modify(|_, w| unsafe { w.tx_lim().bits(threshold as u16) }); + } - fn stop() { - #[cfg(esp32s2)] - { - let rmt = unsafe { &*crate::peripherals::RMT::PTR }; - rmt.[< ch $ch_num conf1 >]().modify(|_, w| w.tx_stop().set_bit()); - } - } + fn is_loopcount_interrupt_set() -> bool { + // no-op + false + } - fn enable_listen_interrupt(events: enumset::EnumSet<$crate::rmt::Event>, enable: bool) { + fn stop() { + #[cfg(esp32s2)] + { let rmt = unsafe { &*crate::peripherals::RMT::PTR }; - rmt.int_ena().modify(|_,w| { - if events.contains($crate::rmt::Event::Error) { - w.[< ch $ch_num _err >]().bit(enable); - } - if events.contains($crate::rmt::Event::End) { - w.[< ch $ch_num _tx_end >]().bit(enable); - } - if events.contains($crate::rmt::Event::Threshold) { - w.[< ch $ch_num _tx_thr_event >]().bit(enable); - } - w - }); + rmt.chconf1($ch_num).modify(|_, w| w.tx_stop().set_bit()); } } + + fn enable_listen_interrupt(events: enumset::EnumSet<$crate::rmt::Event>, enable: bool) { + let rmt = unsafe { &*crate::peripherals::RMT::PTR }; + rmt.int_ena().modify(|_,w| { + if events.contains($crate::rmt::Event::Error) { + w.ch_err($ch_num).bit(enable); + } + if events.contains($crate::rmt::Event::End) { + w.ch_tx_end($ch_num).bit(enable); + } + if events.contains($crate::rmt::Event::Threshold) { + w.ch_tx_thr_event($ch_num).bit(enable); + } + w + }); + } } } } macro_rules! impl_rx_channel { ($signal:ident, $ch_num:literal) => { - paste::paste! { - impl super::RxChannelInternal for $crate::rmt::Channel where Dm: $crate::DriverMode { - const CHANNEL: u8 = $ch_num; - - fn new() -> Self { - let guard = GenericPeripheralGuard::new(); - Self { - phantom: core::marker::PhantomData, - _guard: guard, - } - } + impl super::RxChannelInternal for $crate::rmt::Channel where Dm: $crate::DriverMode { + const CHANNEL: u8 = $ch_num; - fn input_signal() -> crate::gpio::InputSignal { - crate::gpio::InputSignal::$signal - } - - fn set_divider(divider: u8) { - let rmt = unsafe { &*crate::peripherals::RMT::PTR }; - rmt.[< ch $ch_num conf0 >]().modify(|_, w| unsafe { w.div_cnt().bits(divider) }); + fn new() -> Self { + let guard = GenericPeripheralGuard::new(); + Self { + phantom: core::marker::PhantomData, + _guard: guard, } + } - fn update() { - // no-op - } + fn input_signal() -> crate::gpio::InputSignal { + crate::gpio::InputSignal::$signal + } - fn clear_interrupts() { - let rmt = unsafe { &*crate::peripherals::RMT::PTR }; + fn set_divider(divider: u8) { + let rmt = unsafe { &*crate::peripherals::RMT::PTR }; + rmt.chconf0($ch_num).modify(|_, w| unsafe { w.div_cnt().bits(divider) }); + } - rmt.[< ch $ch_num conf1 >]().modify(|_, w| { - w.mem_wr_rst().set_bit(); - w.apb_mem_rst().set_bit(); - w.mem_owner().set_bit(); - w.rx_en().clear_bit() - }); - Self::update(); + fn update() { + // no-op + } - rmt.int_clr().write(|w| { - w.[< ch $ch_num _rx_end >]().set_bit(); - w.[< ch $ch_num _err >]().set_bit(); - w.[< ch $ch_num _tx_thr_event >]().set_bit() - }); - } + fn clear_interrupts() { + let rmt = unsafe { &*crate::peripherals::RMT::PTR }; + + rmt.chconf1($ch_num).modify(|_, w| { + w.mem_wr_rst().set_bit(); + w.apb_mem_rst().set_bit(); + w.mem_owner().set_bit(); + w.rx_en().clear_bit() + }); + Self::update(); + + rmt.int_clr().write(|w| { + w.ch_rx_end($ch_num).set_bit(); + w.ch_err($ch_num).set_bit(); + w.ch_tx_thr_event($ch_num).set_bit() + }); + } - fn set_wrap_mode(_wrap: bool) { - // no-op - } + fn set_wrap_mode(_wrap: bool) { + // no-op + } - fn set_carrier(carrier: bool, high: u16, low: u16, level: bool) { - let rmt = unsafe { &*crate::peripherals::RMT::PTR }; + fn set_carrier(carrier: bool, high: u16, low: u16, level: bool) { + let rmt = unsafe { &*crate::peripherals::RMT::PTR }; - rmt.chcarrier_duty($ch_num) - .write(|w| unsafe { w.carrier_high().bits(high).carrier_low().bits(low) }); + rmt.chcarrier_duty($ch_num) + .write(|w| unsafe { w.carrier_high().bits(high).carrier_low().bits(low) }); - rmt.[< ch $ch_num conf0 >]() - .modify(|_, w| w.carrier_en().bit(carrier).carrier_out_lv().bit(level)); - } + rmt.chconf0($ch_num) + .modify(|_, w| w.carrier_en().bit(carrier).carrier_out_lv().bit(level)); + } - fn set_memsize(memsize: u8) { - let rmt = unsafe { &*crate::peripherals::RMT::PTR }; + fn set_memsize(memsize: u8) { + let rmt = unsafe { &*crate::peripherals::RMT::PTR }; - rmt.[< ch $ch_num conf0 >]().modify(|_, w| unsafe { w.mem_size().bits(memsize) }); - } + rmt.chconf0($ch_num).modify(|_, w| unsafe { w.mem_size().bits(memsize) }); + } - fn start_rx() { - let rmt = unsafe { &*crate::peripherals::RMT::PTR }; + fn start_rx() { + let rmt = unsafe { &*crate::peripherals::RMT::PTR }; - rmt.[< ch $ch_num conf1 >]().modify(|_, w| { - w.mem_wr_rst().set_bit(); - w.apb_mem_rst().set_bit(); - w.mem_owner().set_bit(); - w.rx_en().set_bit() - }); - } + rmt.chconf1($ch_num).modify(|_, w| { + w.mem_wr_rst().set_bit(); + w.apb_mem_rst().set_bit(); + w.mem_owner().set_bit(); + w.rx_en().set_bit() + }); + } - fn is_done() -> bool { - let rmt = unsafe { &*crate::peripherals::RMT::PTR }; - rmt.int_raw().read().[< ch $ch_num _rx_end >]().bit() - } + fn is_done() -> bool { + let rmt = unsafe { &*crate::peripherals::RMT::PTR }; + rmt.int_raw().read().ch_rx_end($ch_num).bit() + } - fn is_error() -> bool { - let rmt = unsafe { &*crate::peripherals::RMT::PTR }; - rmt.int_raw().read().[< ch $ch_num _err >]().bit() - } + fn is_error() -> bool { + let rmt = unsafe { &*crate::peripherals::RMT::PTR }; + rmt.int_raw().read().ch_err($ch_num).bit() + } - fn stop() { - let rmt = unsafe { &*crate::peripherals::RMT::PTR }; - rmt.[< ch $ch_num conf1 >]().modify(|_, w| w.rx_en().clear_bit()); - } + fn stop() { + let rmt = unsafe { &*crate::peripherals::RMT::PTR }; + rmt.chconf1($ch_num).modify(|_, w| w.rx_en().clear_bit()); + } - fn set_filter_threshold(value: u8) { - let rmt = unsafe { &*crate::peripherals::RMT::PTR }; - rmt.[< ch $ch_num conf1 >]().modify(|_, w| unsafe { - w.rx_filter_en().bit(value > 0); - w.rx_filter_thres().bits(value) - }); - } + fn set_filter_threshold(value: u8) { + let rmt = unsafe { &*crate::peripherals::RMT::PTR }; + rmt.chconf1($ch_num).modify(|_, w| unsafe { + w.rx_filter_en().bit(value > 0); + w.rx_filter_thres().bits(value) + }); + } - fn set_idle_threshold(value: u16) { - let rmt = unsafe { &*crate::peripherals::RMT::PTR }; + fn set_idle_threshold(value: u16) { + let rmt = unsafe { &*crate::peripherals::RMT::PTR }; - rmt.[< ch $ch_num conf0 >]().modify(|_, w| unsafe { w.idle_thres().bits(value) }); - } + rmt.chconf0($ch_num).modify(|_, w| unsafe { w.idle_thres().bits(value) }); + } - fn enable_listen_interrupt(events: enumset::EnumSet<$crate::rmt::Event>, enable: bool) { - let rmt = unsafe { &*crate::peripherals::RMT::PTR }; - rmt.int_ena().modify(|_, w| { - if events.contains($crate::rmt::Event::Error) { - w.[< ch $ch_num _err >]().bit(enable); - } - if events.contains($crate::rmt::Event::End) { - w.[< ch $ch_num _rx_end >]().bit(enable); - } - if events.contains($crate::rmt::Event::Threshold) { - w.[< ch $ch_num _tx_thr_event >]().bit(enable); - } - w - }); - } + fn enable_listen_interrupt(events: enumset::EnumSet<$crate::rmt::Event>, enable: bool) { + let rmt = unsafe { &*crate::peripherals::RMT::PTR }; + rmt.int_ena().modify(|_, w| { + if events.contains($crate::rmt::Event::Error) { + w.ch_err($ch_num).bit(enable); + } + if events.contains($crate::rmt::Event::End) { + w.ch_rx_end($ch_num).bit(enable); + } + if events.contains($crate::rmt::Event::Threshold) { + w.ch_tx_thr_event($ch_num).bit(enable); + } + w + }); } } }