; Assembly listing for method System.SpanHelpers:IndexOf(byref,ushort,int):int ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; fully interruptible ; Final local variable assignments ; ; V00 arg0 [V00,T05] ( 7, 37.50) byref -> x19 ; V01 arg1 [V01,T09] ( 5, 10 ) ushort -> x20 ; V02 arg2 [V02,T15] ( 5, 4.50) int -> x21 ; V03 loc0 [V03,T01] ( 19,121.50) long -> x22 ; V04 loc1 [V04,T00] ( 17,150 ) long -> x24 ; V05 loc2 [V05,T12] ( 5, 10 ) byref -> x0 ;* V06 loc3 [V06 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) ;* V07 loc4 [V07 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) ;* V08 loc5 [V08 ] ( 0, 0 ) int -> zero-ref ;* V09 loc6 [V09 ] ( 0, 0 ) struct (32) zero-ref do-not-enreg[S] ;* V10 loc7 [V10 ] ( 0, 0 ) struct (32) zero-ref do-not-enreg[S] ;* V11 loc8 [V11 ] ( 0, 0 ) int -> zero-ref ;* V12 loc9 [V12 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) ;* V13 loc10 [V13 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) ;* V14 loc11 [V14 ] ( 0, 0 ) int -> zero-ref ;* V15 loc12 [V15 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) ;* V16 loc13 [V16 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) ;* V17 loc14 [V17 ] ( 0, 0 ) int -> zero-ref ; V18 loc15 [V18,T31] ( 2, 18 ) simd16 -> d8 HFA(simd16) ld-addr-op ; V19 loc16 [V19,T29] ( 3, 34 ) simd16 -> d16 HFA(simd16) ; V20 loc17 [V20,T30] ( 2, 32 ) simd16 -> d17 HFA(simd16) ld-addr-op ;# V21 OutArgs [V21 ] ( 1, 1 ) lclBlk ( 0) [sp+0x00] "OutgoingArgSpace" ;* V22 tmp1 [V22 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) "impAppendStmt" ; V23 tmp2 [V23,T28] ( 2, 64 ) simd16 -> d16 HFA(simd16) "struct address for call/obj" ;* V24 tmp3 [V24 ] ( 0, 0 ) bool -> zero-ref "Inlining Arg" ;* V25 tmp4 [V25 ] ( 0, 0 ) bool -> zero-ref "Inlining Arg" ; V26 tmp5 [V26,T23] ( 2, 2.50) ref -> x23 class-hnd "Inlining Arg" ; V27 tmp6 [V27,T24] ( 2, 2.50) ref -> x22 class-hnd "Inlining Arg" ;* V28 tmp7 [V28 ] ( 0, 0 ) bool -> zero-ref "Inlining Arg" ;* V29 tmp8 [V29 ] ( 0, 0 ) bool -> zero-ref "Inlining Arg" ; V30 tmp9 [V30,T13] ( 2, 10 ) ref -> x21 class-hnd "Inlining Arg" ; V31 tmp10 [V31,T14] ( 2, 10 ) ref -> x24 class-hnd "Inlining Arg" ;* V32 tmp11 [V32 ] ( 0, 0 ) long -> zero-ref "Inlining Arg" ;* V33 tmp12 [V33 ] ( 0, 0 ) bool -> zero-ref "Inlining Arg" ;* V34 tmp13 [V34 ] ( 0, 0 ) bool -> zero-ref "Inlining Arg" ; V35 tmp14 [V35,T03] ( 2, 40 ) ref -> x25 class-hnd "Inlining Arg" ; V36 tmp15 [V36,T04] ( 2, 40 ) ref -> x21 class-hnd "Inlining Arg" ;* V37 tmp16 [V37 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg" ;* V38 tmp17 [V38 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg" ;* V39 tmp18 [V39 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) "Inlining Arg" ; V40 tmp19 [V40,T32] ( 3, 4.25) simd16 -> d16 HFA(simd16) ld-addr-op "Inline stloc first use temp" ; V41 tmp20 [V41,T18] ( 5, 5 ) long -> x1 "Inline stloc first use temp" ; V42 tmp21 [V42,T20] ( 4, 3 ) int -> x0 "Inline stloc first use temp" ;* V43 tmp22 [V43 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) "Inlining Arg" ; V44 tmp23 [V44,T27] ( 2, 1 ) int -> x1 "Inline return value spill temp" ; V45 tmp24 [V45,T16] ( 6, 6 ) int -> x22 "Single return block return value" ; V46 tmp25 [V46,T26] ( 3, 1.50) ref -> x0 "argument with side effect" ; V47 tmp26 [V47,T19] ( 2, 4 ) long -> x0 "Cast away GC" ; V48 tmp27 [V48,T25] ( 2, 2 ) long -> x0 "Cast away GC" ; V49 tmp28 [V49,T17] ( 3, 6 ) ref -> x0 "argument with side effect" ; V50 tmp29 [V50,T07] ( 3, 24 ) ref -> x0 "argument with side effect" ; V51 cse0 [V51,T02] ( 3, 48 ) ref -> x21 "CSE - aggressive" ; V52 cse1 [V52,T10] ( 3, 12 ) ref -> x24 "CSE - aggressive" ; V53 cse2 [V53,T11] ( 3, 12 ) long -> x25 "CSE - aggressive" ; V54 cse3 [V54,T21] ( 3, 3 ) ref -> x22 "CSE - moderate" ; V55 cse4 [V55,T06] ( 9, 34 ) int -> x21 "CSE - aggressive" ; V56 cse5 [V56,T08] ( 6, 18 ) long -> x23 "CSE - aggressive" ; V57 rat0 [V57,T22] ( 3, 3 ) int -> x0 "ReplaceWithLclVar is creating a new local variable" ; ; Lcl frame size = 8 G_M37683_IG01: A9BA7BFD stp fp, lr, [sp,#-96]! 6D01A7E8 stp d8, d9, [sp,#24] A902D3F3 stp x19, x20, [sp,#40] A903DBF5 stp x21, x22, [sp,#56] A904E3F7 stp x23, x24, [sp,#72] F9002FF9 str x25, [sp,#88] 910003FD mov fp, sp AA0003F3 mov x19, x0 2A0103F4 mov w20, w1 2A0203F5 mov w21, w2 ;; bbWeight=1 PerfScore 8.00 G_M37683_IG02: D2860C00 movz x0, #0x3060 F2B85400 movk x0, #0xc2a0 LSL #16 F2C037A0 movk x0, #445 LSL #32 F9400016 ldr x22, [x0] AA1603F7 mov x23, x22 710002BF cmp w21, #0 5400020A bge G_M37683_IG04 ;; bbWeight=1 PerfScore 6.50 G_M37683_IG03: D2800500 movz x0, #40 F2AE3620 movk x0, #0x71b1 LSL #16 F2CFFFC0 movk x0, #0x7ffe LSL #32 5280D9E1 mov w1, #0x6cf 97FF9BD9 bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE D284CE00 movz x0, #0x2670 F2B85400 movk x0, #0xc2a0 LSL #16 F2C037A0 movk x0, #445 LSL #32 C8DFFC00 ldar x0, [x0] AA1703E1 mov x1, x23 AA1603E2 mov x2, x22 F9400003 ldr x3, [x0] F9402463 ldr x3, [x3,#72] F9401063 ldr x3, [x3,#32] D63F0060 blr x3 ;; bbWeight=0.25 PerfScore 4.63 G_M37683_IG04: D2800016 mov x22, #0 93407EB7 sxtw x23, w21 AA1703F8 mov x24, x23 AA1303E0 mov x0, x19 370003A0 tbnz w0, #0, G_M37683_IG07 ;; bbWeight=1 PerfScore 3.00 G_M37683_IG05: 710042BF cmp w21, #16 5400036B blt G_M37683_IG07 AA1303E0 mov x0, x19 4B0003E0 neg w0, w0 531F7C01 lsr w1, w0, #31 0B000020 add w0, w1, w0 13017C00 asr w0, w0, #1 2A0003E0 mov w0, w0 92400818 and x24, x0, #7 F100131F cmp x24, #4 5400028B blt G_M37683_IG08 ;; bbWeight=0.50 PerfScore 3.75 G_M37683_IG06: D37FFAC0 lsl x0, x22, #1 8B130000 add x0, x0, x19 53003E95 uxth w21, w20 79400001 ldrh w1, [x0] 6B0102BF cmp w21, w1 54000FE0 beq G_M37683_IG26 79400401 ldrh w1, [x0,#2] 6B0102BF cmp w21, w1 54000F40 beq G_M37683_IG25 79400801 ldrh w1, [x0,#4] 6B0102BF cmp w21, w1 54000EA0 beq G_M37683_IG24 79400C00 ldrh w0, [x0,#6] 6B0002BF cmp w21, w0 54000E00 beq G_M37683_IG23 910012D6 add x22, x22, #4 D1001318 sub x24, x24, #4 ;; bbWeight=2 PerfScore 42.00 G_M37683_IG07: F100131F cmp x24, #4 54FFFDCA bge G_M37683_IG06 ;; bbWeight=16 PerfScore 24.00 G_M37683_IG08: F100031F cmp x24, #0 5400014D ble G_M37683_IG10 53003E95 uxth w21, w20 ;; bbWeight=4 PerfScore 8.00 G_M37683_IG09: D37FFAC0 lsl x0, x22, #1 78606A60 ldrh w0, [x19, x0] 6B15001F cmp w0, w21 54000D60 beq G_M37683_IG26 910006D6 add x22, x22, #1 D1000718 sub x24, x24, #1 F100031F cmp x24, #0 54FFFF2C bgt G_M37683_IG09 ;; bbWeight=16 PerfScore 128.00 G_M37683_IG10: EB1702DF cmp x22, x23 54000AEA bge G_M37683_IG21 D2860C00 movz x0, #0x3060 F2B85400 movk x0, #0xc2a0 LSL #16 F2C037A0 movk x0, #445 LSL #32 F9400018 ldr x24, [x0] AA1803F5 mov x21, x24 CB1602F9 sub x25, x23, x22 F100233F cmp x25, #8 5400020A bge G_M37683_IG12 ;; bbWeight=4 PerfScore 34.00 G_M37683_IG11: D2800500 movz x0, #40 F2AE3620 movk x0, #0x71b1 LSL #16 F2CFFFC0 movk x0, #0x7ffe LSL #32 5280D9E1 mov w1, #0x6cf 97FF9B92 bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE D284CE00 movz x0, #0x2670 F2B85400 movk x0, #0xc2a0 LSL #16 F2C037A0 movk x0, #445 LSL #32 C8DFFC00 ldar x0, [x0] AA1503E1 mov x1, x21 AA1803E2 mov x2, x24 F9400003 ldr x3, [x0] F9402463 ldr x3, [x3,#72] F9401063 ldr x3, [x3,#32] D63F0060 blr x3 ;; bbWeight=1 PerfScore 18.50 G_M37683_IG12: 927DF338 and x24, x25, #-8 F100031F cmp x24, #0 5400056D ble G_M37683_IG17 ;; bbWeight=4 PerfScore 8.00 G_M37683_IG13: 53003E95 uxth w21, w20 320083E0 mov w0, #0x10001 1B007EA0 mul w0, w21, w0 4E040C10 dup v16.4s, w0 4EB01E08 mov v8.16b, v16.16b ;; bbWeight=2 PerfScore 8.00 G_M37683_IG14: D2860C00 movz x0, #0x3060 F2B85400 movk x0, #0xc2a0 LSL #16 F2C037A0 movk x0, #445 LSL #32 F9400015 ldr x21, [x0] AA1503F9 mov x25, x21 F100231F cmp x24, #8 5400024A bge G_M37683_IG16 ;; bbWeight=16 PerfScore 104.00 G_M37683_IG15: D2800500 movz x0, #40 F2AE3620 movk x0, #0x71b1 LSL #16 F2CFFFC0 movk x0, #0x7ffe LSL #32 5280D9E1 mov w1, #0x6cf 6E084509 mov v9.d[0], v8.d[1] 97FF9B73 bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE D284CE00 movz x0, #0x2670 F2B85400 movk x0, #0xc2a0 LSL #16 F2C037A0 movk x0, #445 LSL #32 C8DFFC00 ldar x0, [x0] AA1903E1 mov x1, x25 AA1503E2 mov x2, x21 F9400003 ldr x3, [x0] F9402463 ldr x3, [x3,#72] F9401063 ldr x3, [x3,#32] D63F0060 blr x3 6E180528 mov v8.d[1], v9.d[0] ;; bbWeight=4 PerfScore 82.00 G_M37683_IG16: D37FFAC0 lsl x0, x22, #1 3CE06A70 ldr q16, [x19, x0] 6E708D10 cmeq v16.8h, v8.8h, v16.8h 4F000411 movi v17.4s, #0x00 6E708E31 cmeq v17.8h, v17.8h, v16.8h 6E31AA31 uminv b17, v17.16b 0E013E20 umov w0, v17.b[0] 7100001F cmp w0, #0 54000120 beq G_M37683_IG18 910022D6 add x22, x22, #8 D1002318 sub x24, x24, #8 F100031F cmp x24, #0 54FFFB8C bgt G_M37683_IG14 ;; bbWeight=16 PerfScore 232.00 G_M37683_IG17: EB1702DF cmp x22, x23 5400022A bge G_M37683_IG21 CB1602F8 sub x24, x23, x22 17FFFFAA b G_M37683_IG07 ;; bbWeight=4 PerfScore 12.00 G_M37683_IG18: 52800000 mov w0, #0 4E083E01 umov x1, v16.d[0] B50000A1 cbnz x1, G_M37683_IG20 ;; bbWeight=2 PerfScore 5.00 G_M37683_IG19: 52800020 mov w0, #1 4E183E01 umov x1, v16.d[1] B5000041 cbnz x1, G_M37683_IG20 52800040 mov w0, #2 ;; bbWeight=0.25 PerfScore 0.75 G_M37683_IG20: DAC00021 rbit x1, x1 DAC01021 clz x1, x1 531E7400 lsl w0, w0, #2 13047C21 asr w1, w1, #4 0B010000 add w0, w0, w1 0B160016 add w22, w0, w22 1400000F b G_M37683_IG26 ;; bbWeight=0.50 PerfScore 2.75 G_M37683_IG21: 12800000 movn w0, #0 ;; bbWeight=0.50 PerfScore 0.25 G_M37683_IG22: F9402FF9 ldr x25, [sp,#88] A944E3F7 ldp x23, x24, [sp,#72] A943DBF5 ldp x21, x22, [sp,#56] A942D3F3 ldp x19, x20, [sp,#40] 6D41A7E8 ldp d8, d9, [sp,#24] A8C67BFD ldp fp, lr, [sp],#96 D65F03C0 ret lr ;; bbWeight=0.50 PerfScore 4.00 G_M37683_IG23: 11000ED6 add w22, w22, #3 14000005 b G_M37683_IG26 ;; bbWeight=0.50 PerfScore 0.75 G_M37683_IG24: 11000AD6 add w22, w22, #2 14000003 b G_M37683_IG26 ;; bbWeight=0.50 PerfScore 0.75 G_M37683_IG25: 110006D6 add w22, w22, #1 14000001 b G_M37683_IG26 ;; bbWeight=0.50 PerfScore 0.75 G_M37683_IG26: 2A1603E0 mov w0, w22 ;; bbWeight=0.50 PerfScore 0.25 G_M37683_IG27: F9402FF9 ldr x25, [sp,#88] A944E3F7 ldp x23, x24, [sp,#72] A943DBF5 ldp x21, x22, [sp,#56] A942D3F3 ldp x19, x20, [sp,#40] 6D41A7E8 ldp d8, d9, [sp,#24] A8C67BFD ldp fp, lr, [sp],#96 D65F03C0 ret lr ;; bbWeight=0.50 PerfScore 4.00 G_M37683_IG28: 97FF9B36 bl CORINFO_HELP_OVERFLOW ;; bbWeight=0 PerfScore 0.00 G_M37683_IG29: 97FF9B39 bl CORINFO_HELP_THROWDIVZERO D43E0000 bkpt ;; bbWeight=0 PerfScore 0.00 ; Total bytes of code 764, prolog size 40, PerfScore 822.03, (MethodHash=576e6ccc) for method System.SpanHelpers:IndexOf(byref,ushort,int):int ; ============================================================ ; Assembly listing for method System.SpanHelpers:IndexOf(byref,ubyte,int):int ; Emitting BLENDED_CODE for generic ARM64 CPU - Windows ; optimized code ; fp based frame ; fully interruptible ; Final local variable assignments ; ; V00 arg0 [V00,T02] ( 17, 50.50) byref -> x19 ; V01 arg1 [V01,T18] ( 3, 3 ) ubyte -> x21 ; V02 arg2 [V02,T05] ( 6, 9 ) int -> x20 ; V03 loc0 [V03,T03] ( 14, 33 ) int -> x1 ; V04 loc1 [V04,T00] ( 38,145.50) long -> x2 ; V05 loc2 [V05,T01] ( 17, 92 ) long -> x4 ;* V06 loc3 [V06 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) ;* V07 loc4 [V07 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) ;* V08 loc5 [V08 ] ( 0, 0 ) int -> zero-ref ;* V09 loc6 [V09 ] ( 0, 0 ) struct (32) zero-ref do-not-enreg[S] ;* V10 loc7 [V10 ] ( 0, 0 ) struct (32) zero-ref do-not-enreg[S] ;* V11 loc8 [V11 ] ( 0, 0 ) int -> zero-ref ;* V12 loc9 [V12 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) ;* V13 loc10 [V13 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) ;* V14 loc11 [V14 ] ( 0, 0 ) int -> zero-ref ;* V15 loc12 [V15 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) ;* V16 loc13 [V16 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) ;* V17 loc14 [V17 ] ( 0, 0 ) int -> zero-ref ; V18 loc15 [V18,T31] ( 2, 20 ) simd16 -> d16 HFA(simd16) ld-addr-op ; V19 loc16 [V19,T29] ( 3, 34 ) simd16 -> d17 HFA(simd16) ; V20 loc17 [V20,T30] ( 2, 32 ) simd16 -> d18 HFA(simd16) ld-addr-op ;# V21 OutArgs [V21 ] ( 1, 1 ) lclBlk ( 0) [sp+0x00] "OutgoingArgSpace" ;* V22 tmp1 [V22 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) "impAppendStmt" ; V23 tmp2 [V23,T28] ( 2, 64 ) simd16 -> d17 HFA(simd16) "struct address for call/obj" ;* V24 tmp3 [V24 ] ( 0, 0 ) bool -> zero-ref "Inlining Arg" ;* V25 tmp4 [V25 ] ( 0, 0 ) bool -> zero-ref "Inlining Arg" ; V26 tmp5 [V26,T20] ( 2, 2.50) ref -> x23 class-hnd "Inlining Arg" ; V27 tmp6 [V27,T21] ( 2, 2.50) ref -> x22 class-hnd "Inlining Arg" ; V28 tmp7 [V28,T26] ( 2, 1 ) long -> x4 "Inline stloc first use temp" ;* V29 tmp8 [V29 ] ( 0, 0 ) long -> zero-ref "Inlining Arg" ;* V30 tmp9 [V30 ] ( 0, 0 ) long -> zero-ref "NewObj constructor temp" ;* V31 tmp10 [V31 ] ( 0, 0 ) long -> zero-ref "Inlining Arg" ;* V32 tmp11 [V32 ] ( 0, 0 ) long -> zero-ref ld-addr-op "Inlining Arg" ;* V33 tmp12 [V33 ] ( 0, 0 ) long -> zero-ref "Inlining Arg" ;* V34 tmp13 [V34 ] ( 0, 0 ) long -> zero-ref "NewObj constructor temp" ;* V35 tmp14 [V35 ] ( 0, 0 ) long -> zero-ref "Inlining Arg" ; V36 tmp15 [V36,T07] ( 2, 8 ) long -> x5 ld-addr-op "Inlining Arg" ;* V37 tmp16 [V37 ] ( 0, 0 ) long -> zero-ref "Inlining Arg" ;* V38 tmp17 [V38 ] ( 0, 0 ) long -> zero-ref "NewObj constructor temp" ;* V39 tmp18 [V39 ] ( 0, 0 ) long -> zero-ref "Inlining Arg" ; V40 tmp19 [V40,T08] ( 2, 8 ) long -> x5 ld-addr-op "Inlining Arg" ;* V41 tmp20 [V41 ] ( 0, 0 ) long -> zero-ref "Inlining Arg" ;* V42 tmp21 [V42 ] ( 0, 0 ) long -> zero-ref "NewObj constructor temp" ;* V43 tmp22 [V43 ] ( 0, 0 ) long -> zero-ref "Inlining Arg" ; V44 tmp23 [V44,T09] ( 2, 8 ) long -> x5 ld-addr-op "Inlining Arg" ;* V45 tmp24 [V45 ] ( 0, 0 ) long -> zero-ref "Inlining Arg" ;* V46 tmp25 [V46 ] ( 0, 0 ) long -> zero-ref "NewObj constructor temp" ;* V47 tmp26 [V47 ] ( 0, 0 ) long -> zero-ref "Inlining Arg" ; V48 tmp27 [V48,T10] ( 2, 8 ) long -> x5 ld-addr-op "Inlining Arg" ;* V49 tmp28 [V49 ] ( 0, 0 ) long -> zero-ref "Inlining Arg" ;* V50 tmp29 [V50 ] ( 0, 0 ) long -> zero-ref "NewObj constructor temp" ;* V51 tmp30 [V51 ] ( 0, 0 ) long -> zero-ref "Inlining Arg" ; V52 tmp31 [V52,T11] ( 2, 8 ) long -> x5 ld-addr-op "Inlining Arg" ;* V53 tmp32 [V53 ] ( 0, 0 ) long -> zero-ref "Inlining Arg" ;* V54 tmp33 [V54 ] ( 0, 0 ) long -> zero-ref "NewObj constructor temp" ;* V55 tmp34 [V55 ] ( 0, 0 ) long -> zero-ref "Inlining Arg" ; V56 tmp35 [V56,T12] ( 2, 8 ) long -> x5 ld-addr-op "Inlining Arg" ;* V57 tmp36 [V57 ] ( 0, 0 ) long -> zero-ref "Inlining Arg" ;* V58 tmp37 [V58 ] ( 0, 0 ) long -> zero-ref "NewObj constructor temp" ;* V59 tmp38 [V59 ] ( 0, 0 ) long -> zero-ref "Inlining Arg" ; V60 tmp39 [V60,T13] ( 2, 8 ) long -> x5 ld-addr-op "Inlining Arg" ;* V61 tmp40 [V61 ] ( 0, 0 ) long -> zero-ref "Inlining Arg" ;* V62 tmp41 [V62 ] ( 0, 0 ) long -> zero-ref "NewObj constructor temp" ;* V63 tmp42 [V63 ] ( 0, 0 ) long -> zero-ref ld-addr-op "Inlining Arg" ;* V64 tmp43 [V64 ] ( 0, 0 ) long -> zero-ref "Inlining Arg" ;* V65 tmp44 [V65 ] ( 0, 0 ) long -> zero-ref "NewObj constructor temp" ;* V66 tmp45 [V66 ] ( 0, 0 ) long -> zero-ref "Inlining Arg" ; V67 tmp46 [V67,T14] ( 2, 8 ) long -> x5 ld-addr-op "Inlining Arg" ;* V68 tmp47 [V68 ] ( 0, 0 ) long -> zero-ref "Inlining Arg" ;* V69 tmp48 [V69 ] ( 0, 0 ) long -> zero-ref "NewObj constructor temp" ;* V70 tmp49 [V70 ] ( 0, 0 ) long -> zero-ref "Inlining Arg" ; V71 tmp50 [V71,T15] ( 2, 8 ) long -> x5 ld-addr-op "Inlining Arg" ;* V72 tmp51 [V72 ] ( 0, 0 ) long -> zero-ref "Inlining Arg" ;* V73 tmp52 [V73 ] ( 0, 0 ) long -> zero-ref "NewObj constructor temp" ;* V74 tmp53 [V74 ] ( 0, 0 ) long -> zero-ref "Inlining Arg" ; V75 tmp54 [V75,T16] ( 2, 8 ) long -> x5 ld-addr-op "Inlining Arg" ;* V76 tmp55 [V76 ] ( 0, 0 ) long -> zero-ref "Inlining Arg" ;* V77 tmp56 [V77 ] ( 0, 0 ) long -> zero-ref "NewObj constructor temp" ;* V78 tmp57 [V78 ] ( 0, 0 ) long -> zero-ref ld-addr-op "Inlining Arg" ;* V79 tmp58 [V79 ] ( 0, 0 ) long -> zero-ref "Inlining Arg" ;* V80 tmp59 [V80 ] ( 0, 0 ) long -> zero-ref "NewObj constructor temp" ;* V81 tmp60 [V81 ] ( 0, 0 ) long -> zero-ref ld-addr-op "Inlining Arg" ;* V82 tmp61 [V82 ] ( 0, 0 ) long -> zero-ref "Inlining Arg" ;* V83 tmp62 [V83 ] ( 0, 0 ) long -> zero-ref "NewObj constructor temp" ;* V84 tmp63 [V84 ] ( 0, 0 ) byref -> zero-ref "Inlining Arg" ;* V85 tmp64 [V85 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) "Inlining Arg" ; V86 tmp65 [V86,T32] ( 3, 4.25) simd16 -> d17 HFA(simd16) ld-addr-op "Inline stloc first use temp" ; V87 tmp66 [V87,T23] ( 5, 5 ) long -> x1 "Inline stloc first use temp" ; V88 tmp67 [V88,T24] ( 4, 3 ) int -> x0 "Inline stloc first use temp" ;* V89 tmp68 [V89 ] ( 0, 0 ) simd16 -> zero-ref HFA(simd16) "Inlining Arg" ; V90 tmp69 [V90,T27] ( 2, 1 ) int -> x1 "Inline return value spill temp" ; V91 tmp70 [V91,T06] ( 10, 10 ) int -> x2 "Single return block return value" ; V92 tmp71 [V92,T25] ( 3, 1.50) ref -> x0 "argument with side effect" ; V93 tmp72 [V93,T22] ( 2, 2 ) long -> x4 "Cast away GC" ; V94 cse0 [V94,T19] ( 3, 3 ) ref -> x22 "CSE - moderate" ; V95 cse1 [V95,T17] ( 3, 6 ) int -> x0 "CSE - moderate" ; V96 cse2 [V96,T04] ( 5, 14 ) long -> x3 "CSE - moderate" ; ; Lcl frame size = 8 G_M61227_IG01: A9BC7BFD stp fp, lr, [sp,#-64]! A901D3F3 stp x19, x20, [sp,#24] A902DBF5 stp x21, x22, [sp,#40] F9001FF7 str x23, [sp,#56] 910003FD mov fp, sp AA0003F3 mov x19, x0 2A0103F5 mov w21, w1 2A0203F4 mov w20, w2 ;; bbWeight=1 PerfScore 6.00 G_M61227_IG02: D2860C00 movz x0, #0x3060 F2B85400 movk x0, #0xc2a0 LSL #16 F2C037A0 movk x0, #445 LSL #32 F9400016 ldr x22, [x0] AA1603F7 mov x23, x22 7100029F cmp w20, #0 5400020A bge G_M61227_IG04 ;; bbWeight=1 PerfScore 6.50 G_M61227_IG03: D2800500 movz x0, #40 F2AE3620 movk x0, #0x71b1 LSL #16 F2CFFFC0 movk x0, #0x7ffe LSL #32 5280D9E1 mov w1, #0x6cf 97FF3F4F bl CORINFO_HELP_GETSHARED_NONGCSTATIC_BASE D284CE00 movz x0, #0x2670 F2B85400 movk x0, #0xc2a0 LSL #16 F2C037A0 movk x0, #445 LSL #32 C8DFFC00 ldar x0, [x0] AA1703E1 mov x1, x23 AA1603E2 mov x2, x22 F9400003 ldr x3, [x0] F9402463 ldr x3, [x3,#72] F9401063 ldr x3, [x3,#32] D63F0060 blr x3 ;; bbWeight=0.25 PerfScore 4.63 G_M61227_IG04: 53001EA0 uxtb w0, w21 2A0003E1 mov w1, w0 D2800002 mov x2, #0 2A1403E3 mov w3, w20 AA0303E4 mov x4, x3 7100829F cmp w20, #32 5400052B blt G_M61227_IG07 ;; bbWeight=1 PerfScore 4.00 G_M61227_IG05: AA1303E4 mov x4, x19 92400C84 and x4, x4, #15 CB0403E4 neg x4, x4 91004084 add x4, x4, #16 92400C84 and x4, x4, #15 F100209F cmp x4, #8 54000483 blo G_M61227_IG08 ;; bbWeight=0.50 PerfScore 2.00 G_M61227_IG06: D1002084 sub x4, x4, #8 38627A65 ldrb w5, [x19, x2] 6B0100BF cmp w5, w1 54000CE0 beq G_M61227_IG20 91000445 add x5, x2, #1 38657A65 ldrb w5, [x19, x5] 6B0100BF cmp w5, w1 54000C80 beq G_M61227_IG21 91000845 add x5, x2, #2 38657A65 ldrb w5, [x19, x5] 6B0100BF cmp w5, w1 54000C40 beq G_M61227_IG22 91000C45 add x5, x2, #3 38657A65 ldrb w5, [x19, x5] 6B0100BF cmp w5, w1 54000C00 beq G_M61227_IG23 91001045 add x5, x2, #4 38657A65 ldrb w5, [x19, x5] 6B0100BF cmp w5, w1 54000BC0 beq G_M61227_IG24 91001445 add x5, x2, #5 38657A65 ldrb w5, [x19, x5] 6B0100BF cmp w5, w1 54000B80 beq G_M61227_IG25 91001845 add x5, x2, #6 38657A65 ldrb w5, [x19, x5] 6B0100BF cmp w5, w1 54000B40 beq G_M61227_IG26 91001C45 add x5, x2, #7 38657A65 ldrb w5, [x19, x5] 6B0100BF cmp w5, w1 54000B00 beq G_M61227_IG27 91002042 add x2, x2, #8 ;; bbWeight=2 PerfScore 81.00 G_M61227_IG07: F100209F cmp x4, #8 54FFFBC2 bhs G_M61227_IG06 ;; bbWeight=16 PerfScore 24.00 G_M61227_IG08: F100109F cmp x4, #4 54000303 blo G_M61227_IG11 ;; bbWeight=4 PerfScore 6.00 G_M61227_IG09: D1001084 sub x4, x4, #4 38627A65 ldrb w5, [x19, x2] 6B0100BF cmp w5, w1 54000840 beq G_M61227_IG20 91000445 add x5, x2, #1 38657A65 ldrb w5, [x19, x5] 6B0100BF cmp w5, w1 540007E0 beq G_M61227_IG21 91000845 add x5, x2, #2 38657A65 ldrb w5, [x19, x5] 6B0100BF cmp w5, w1 540007A0 beq G_M61227_IG22 91000C45 add x5, x2, #3 38657A65 ldrb w5, [x19, x5] 6B0100BF cmp w5, w1 54000760 beq G_M61227_IG23 91001042 add x2, x2, #4 B40000E4 cbz x4, G_M61227_IG12 ;; bbWeight=2 PerfScore 43.00 G_M61227_IG10: D1000484 sub x4, x4, #1 38627A65 ldrb w5, [x19, x2] 6B0100BF cmp w5, w1 54000600 beq G_M61227_IG20 91000442 add x2, x2, #1 ;; bbWeight=8 PerfScore 44.00 G_M61227_IG11: B5FFFF64 cbnz x4, G_M61227_IG10 ;; bbWeight=16 PerfScore 16.00 G_M61227_IG12: EB03005F cmp x2, x3 540004C2 bhs G_M61227_IG18 4B020284 sub w4, w20, w2 121C6C84 and w4, w4, #0xfffffff0 2A0403E4 mov w4, w4 3200C3E5 mov w5, #0x1010101 1B057C05 mul w5, w0, w5 4E040CB0 dup v16.4s, w5 EB02009F cmp x4, x2 54000189 bls G_M61227_IG14 ;; bbWeight=4 PerfScore 30.00 G_M61227_IG13: 3CE26A71 ldr q17, [x19, x2] 6E318E11 cmeq v17.16b, v16.16b, v17.16b 4F000412 movi v18.4s, #0x00 6E318E52 cmeq v18.16b, v18.16b, v17.16b 6E31AA52 uminv b18, v18.16b 0E013E45 umov w5, v18.b[0] 710000BF cmp w5, #0 54000100 beq G_M61227_IG15 91004042 add x2, x2, #16 EB02009F cmp x4, x2 54FFFEC8 bhi G_M61227_IG13 ;; bbWeight=16 PerfScore 208.00 G_M61227_IG14: EB03005F cmp x2, x3 54000222 bhs G_M61227_IG18 CB020064 sub x4, x3, x2 17FFFFCC b G_M61227_IG07 ;; bbWeight=4 PerfScore 12.00 G_M61227_IG15: 52800000 mov w0, #0 4E083E21 umov x1, v17.d[0] B50000A1 cbnz x1, G_M61227_IG17 ;; bbWeight=2 PerfScore 5.00 G_M61227_IG16: 52800020 mov w0, #1 4E183E21 umov x1, v17.d[1] B5000041 cbnz x1, G_M61227_IG17 52800040 mov w0, #2 ;; bbWeight=0.25 PerfScore 0.75 G_M61227_IG17: DAC00021 rbit x1, x1 DAC01021 clz x1, x1 531D7000 lsl w0, w0, #3 0B000040 add w0, w2, w0 13037C22 asr w2, w1, #3 0B020002 add w2, w0, w2 14000015 b G_M61227_IG28 ;; bbWeight=0.50 PerfScore 2.75 G_M61227_IG18: 12800000 movn w0, #0 ;; bbWeight=0.50 PerfScore 0.25 G_M61227_IG19: F9401FF7 ldr x23, [sp,#56] A942DBF5 ldp x21, x22, [sp,#40] A941D3F3 ldp x19, x20, [sp,#24] A8C47BFD ldp fp, lr, [sp],#64 D65F03C0 ret lr ;; bbWeight=0.50 PerfScore 3.00 G_M61227_IG20: 1400000E b G_M61227_IG28 ;; bbWeight=0.50 PerfScore 0.50 G_M61227_IG21: 11000442 add w2, w2, #1 1400000C b G_M61227_IG28 ;; bbWeight=0.50 PerfScore 0.75 G_M61227_IG22: 11000842 add w2, w2, #2 1400000A b G_M61227_IG28 ;; bbWeight=0.50 PerfScore 0.75 G_M61227_IG23: 11000C42 add w2, w2, #3 14000008 b G_M61227_IG28 ;; bbWeight=0.50 PerfScore 0.75 G_M61227_IG24: 11001042 add w2, w2, #4 14000006 b G_M61227_IG28 ;; bbWeight=0.50 PerfScore 0.75 G_M61227_IG25: 11001442 add w2, w2, #5 14000004 b G_M61227_IG28 ;; bbWeight=0.50 PerfScore 0.75 G_M61227_IG26: 11001842 add w2, w2, #6 14000002 b G_M61227_IG28 ;; bbWeight=0.50 PerfScore 0.75 G_M61227_IG27: 11001C42 add w2, w2, #7 ;; bbWeight=0.50 PerfScore 0.25 G_M61227_IG28: 2A0203E0 mov w0, w2 ;; bbWeight=0.50 PerfScore 0.25 G_M61227_IG29: F9401FF7 ldr x23, [sp,#56] A942DBF5 ldp x21, x22, [sp,#40] A941D3F3 ldp x19, x20, [sp,#24] A8C47BFD ldp fp, lr, [sp],#64 D65F03C0 ret lr ;; bbWeight=0.50 PerfScore 3.00 ; Total bytes of code 680, prolog size 32, PerfScore 575.38, (MethodHash=e0a010d4) for method System.SpanHelpers:IndexOf(byref,ubyte,int):int ; ============================================================ Elapsed : 60 msecs.