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Introducing the "ThermalPoint" driver parameter.
1 parent 7cadc81 commit cb803e1

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+264
-162
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3 files changed

+264
-162
lines changed

‎corefreq.h

-146
Original file line numberDiff line numberDiff line change
@@ -592,152 +592,6 @@ typedef struct {
592592
} Error;
593593
} SHM_STRUCT_RW;
594594

595-
/* Sensors formulas and definitions.
596-
MIN = [SENSOR] > [TRIGGER] AND ([SENSOR] < [LOWEST] OR [LOWEST] <= [CAPPED])
597-
MAX = [SENSOR] > [HIGHEST]
598-
*/
599-
600-
#define THRESHOLD_LOWEST_CAPPED_THERMAL 1
601-
#define THRESHOLD_LOWEST_CAPPED_VOLTAGE 0.15
602-
#define THRESHOLD_LOWEST_CAPPED_ENERGY 0.000001
603-
#define THRESHOLD_LOWEST_CAPPED_POWER 0.000001
604-
#define THRESHOLD_LOWEST_CAPPED_REL_FREQ 0.0
605-
#define THRESHOLD_LOWEST_CAPPED_ABS_FREQ 0.0
606-
607-
#define THRESHOLD_LOWEST_TRIGGER_THERMAL 0
608-
#define THRESHOLD_LOWEST_TRIGGER_VOLTAGE 0.0
609-
#define THRESHOLD_LOWEST_TRIGGER_ENERGY 0.0
610-
#define THRESHOLD_LOWEST_TRIGGER_POWER 0.0
611-
#define THRESHOLD_LOWEST_TRIGGER_REL_FREQ 0.0
612-
#define THRESHOLD_LOWEST_TRIGGER_ABS_FREQ 0.0
613-
614-
#define _RESET_SENSOR_LIMIT(THRESHOLD, Limit) \
615-
({ \
616-
Limit = THRESHOLD; \
617-
})
618-
619-
#define RESET_SENSOR_LOWEST(CLASS, Limit) \
620-
_RESET_SENSOR_LIMIT(THRESHOLD_LOWEST_CAPPED_##CLASS, \
621-
Limit[SENSOR_LOWEST])
622-
623-
#define RESET_SENSOR_HIGHEST(CLASS, Limit) \
624-
_RESET_SENSOR_LIMIT(THRESHOLD_LOWEST_TRIGGER_##CLASS, \
625-
Limit[SENSOR_HIGHEST])
626-
627-
#define RESET_SENSOR_LIMIT(CLASS, STAT, Limit) \
628-
RESET_SENSOR_##STAT(CLASS, Limit)
629-
630-
#define TEST_SENSOR_LOWEST(CLASS, TRIGGER, CAPPED, Sensor, Limit) \
631-
(Sensor > TRIGGER##CLASS) \
632-
&& ((Sensor < Limit) || (Limit <= CAPPED##CLASS))
633-
634-
#define TEST_SENSOR_HIGHEST(CLASS, TRIGGER, CAPPED, Sensor, Limit) \
635-
(Sensor > Limit)
636-
637-
#define _TEST_SENSOR(CLASS, STAT, THRESHOLD, TRIGGER, CAPPED, Sensor, Limit) \
638-
TEST_SENSOR_##STAT(CLASS, THRESHOLD##TRIGGER, THRESHOLD##CAPPED, \
639-
Sensor, Limit)
640-
641-
#define TEST_SENSOR(CLASS, STAT, Sensor, Limit) \
642-
_TEST_SENSOR(CLASS, STAT, THRESHOLD_##STAT, _TRIGGER_, _CAPPED_, \
643-
Sensor, Limit[SENSOR_##STAT])
644-
645-
#define TEST_AND_SET_SENSOR(CLASS, STAT, Sensor, Limit) \
646-
({ \
647-
if (TEST_SENSOR(CLASS, STAT, Sensor, Limit)) \
648-
{ \
649-
Limit[SENSOR_##STAT] = Sensor; \
650-
} \
651-
})
652-
653-
#define COMPUTE_THERMAL_INTEL(Temp, Param, Sensor) \
654-
(Temp = Param.Offset[0] - Param.Offset[1] - Sensor)
655-
656-
#define COMPUTE_THERMAL_AMD(Temp, Param, Sensor) \
657-
UNUSED(Param); \
658-
UNUSED(Sensor); \
659-
/*( TODO )*/
660-
661-
#define COMPUTE_THERMAL_AMD_0Fh(Temp, Param, Sensor) \
662-
(Temp = Sensor - (Param.Target * 2) - 49)
663-
664-
#define COMPUTE_THERMAL_AMD_15h(Temp, Param, Sensor) \
665-
UNUSED(Param); \
666-
(Temp = Sensor * 5 / 40)
667-
668-
#define COMPUTE_THERMAL_AMD_17h(Temp, Param, Sensor) \
669-
(Temp = ((Sensor * 5 / 40) - Param.Offset[1]) - Param.Offset[2])
670-
671-
#define COMPUTE_THERMAL(_ARCH_, Temp, Param, Sensor) \
672-
COMPUTE_THERMAL_##_ARCH_(Temp, Param, Sensor)
673-
674-
#define COMPUTE_VOLTAGE_INTEL_CORE2(Vcore, VID) \
675-
(Vcore = 0.8875 + (double) (VID) * 0.0125)
676-
677-
#define COMPUTE_VOLTAGE_INTEL_SOC(Vcore, VID) \
678-
({ \
679-
switch (VID) { \
680-
case 0x00: \
681-
Vcore = 0.0f; \
682-
break; \
683-
case 0xfc: \
684-
case 0xfe: \
685-
Vcore = 1.495f; \
686-
break; \
687-
case 0xfd: \
688-
case 0xff: \
689-
Vcore = 1.5f; \
690-
break; \
691-
default: \
692-
Vcore = 0.245 + (double) (VID) * 0.005; \
693-
break; \
694-
} \
695-
})
696-
697-
#define COMPUTE_VOLTAGE_INTEL_SNB(Vcore, VID) \
698-
(Vcore = (double) (VID) / 8192.0)
699-
700-
#define COMPUTE_VOLTAGE_INTEL_SKL_X(Vcore, VID) \
701-
(Vcore = (double) (VID) / 8192.0)
702-
703-
#define COMPUTE_VOLTAGE_AMD(Vcore, VID) \
704-
/*( TODO )*/
705-
706-
#define COMPUTE_VOLTAGE_AMD_0Fh(Vcore, VID) \
707-
({ \
708-
short Vselect =(VID & 0b110000) >> 4, Vnibble = VID & 0b1111; \
709-
\
710-
switch (Vselect) { \
711-
case 0b00: \
712-
Vcore = 1.550 - (double) (Vnibble) * 0.025; \
713-
break; \
714-
case 0b01: \
715-
Vcore = 1.150 - (double) (Vnibble) * 0.025; \
716-
break; \
717-
case 0b10: \
718-
Vcore = 0.7625 - (double) (Vnibble) * 0.0125; \
719-
break; \
720-
case 0b11: \
721-
Vcore = 0.5625 - (double) (Vnibble) * 0.0125; \
722-
break; \
723-
} \
724-
})
725-
726-
#define COMPUTE_VOLTAGE_AMD_15h(Vcore, VID) \
727-
(Vcore = 1.550 -(0.00625 * (double) (VID)))
728-
729-
#define COMPUTE_VOLTAGE_AMD_17h(Vcore, VID) \
730-
(Vcore = 1.550 -(0.00625 * (double) (VID)))
731-
732-
#define COMPUTE_VOLTAGE_WINBOND_IO(Vcore, VID) \
733-
(Vcore = (double) (VID) * 0.008)
734-
735-
#define COMPUTE_VOLTAGE_ITETECH_IO(Vcore, VID) \
736-
(Vcore = (double) (VID) * 0.016)
737-
738-
#define COMPUTE_VOLTAGE(_ARCH_, Vcore, VID) \
739-
COMPUTE_VOLTAGE_##_ARCH_(Vcore, VID)
740-
741595
/* Error Reasons management. */
742596
typedef struct {
743597
__typeof__ (errno) no: 32;

‎corefreqk.c

+115-16
Original file line numberDiff line numberDiff line change
@@ -283,6 +283,14 @@ static unsigned long long Clear_Events = 0;
283283
module_param(Clear_Events, ullong, S_IRUSR|S_IWUSR|S_IRGRP|S_IROTH);
284284
MODULE_PARM_DESC(Clear_Events, "Clear Thermal and Power Events");
285285

286+
static unsigned int ThermalPoint_Count = 0;
287+
static signed short ThermalPoint[THM_POINTS_DIM] = {
288+
-1, -1, -1, -1, -1
289+
};
290+
module_param_array(ThermalPoint, short, &ThermalPoint_Count, \
291+
S_IRUSR|S_IWUSR|S_IRGRP|S_IROTH);
292+
MODULE_PARM_DESC(ThermalPoint, "Thermal Point");
293+
286294
static int ThermalScope = -1;
287295
module_param(ThermalScope, int, S_IRUSR|S_IWUSR|S_IRGRP|S_IROTH);
288296
MODULE_PARM_DESC(ThermalScope, "[0:None; 1:SMT; 2:Core; 3:Package]");
@@ -8117,15 +8125,60 @@ void ThermalMonitor_IA32(CORE_RO *Core)
81178125

81188126
RDMSR(ThermInterrupt, MSR_IA32_THERM_INTERRUPT);
81198127

8120-
Core->ThermalPoint.Value[THM_THRESHOLD_1] = \
8121-
Core->PowerThermal.Param.Offset[0]
8122-
- Core->PowerThermal.Param.Offset[1]
8123-
- ThermInterrupt.Threshold1_Value;
8128+
if (ThermalPoint_Count < THM_POINTS_DIM)
8129+
{
8130+
unsigned short WrRdMSR = 0;
8131+
8132+
if (ThermalPoint_Count > THM_THRESHOLD_1) {
8133+
if (ThermalPoint[THM_THRESHOLD_1] > 0)
8134+
{
8135+
COMPUTE_THERMAL(INVERSE_INTEL,
8136+
ThermInterrupt.Threshold1_Value,
8137+
Core->PowerThermal.Param,
8138+
ThermalPoint[THM_THRESHOLD_1]);
8139+
8140+
ThermInterrupt.Threshold1_Int = 1;
8141+
WrRdMSR = 1;
8142+
}
8143+
else if (ThermalPoint[THM_THRESHOLD_1] == 0)
8144+
{
8145+
ThermInterrupt.Threshold1_Value = 0;
8146+
ThermInterrupt.Threshold1_Int = 0;
8147+
WrRdMSR = 1;
8148+
}
8149+
}
8150+
if (ThermalPoint_Count > THM_THRESHOLD_2) {
8151+
if (ThermalPoint[THM_THRESHOLD_2] > 0)
8152+
{
8153+
COMPUTE_THERMAL(INVERSE_INTEL,
8154+
ThermInterrupt.Threshold2_Value,
8155+
Core->PowerThermal.Param,
8156+
ThermalPoint[THM_THRESHOLD_2]);
8157+
8158+
ThermInterrupt.Threshold2_Int = 1;
8159+
WrRdMSR = 1;
8160+
}
8161+
else if (ThermalPoint[THM_THRESHOLD_2] == 0)
8162+
{
8163+
ThermInterrupt.Threshold2_Value = 0;
8164+
ThermInterrupt.Threshold2_Int = 0;
8165+
WrRdMSR = 1;
8166+
}
8167+
}
8168+
if (WrRdMSR == 1) {
8169+
WRMSR(ThermInterrupt, MSR_IA32_THERM_INTERRUPT);
8170+
RDMSR(ThermInterrupt, MSR_IA32_THERM_INTERRUPT);
8171+
}
8172+
}
8173+
COMPUTE_THERMAL(INTEL,
8174+
Core->ThermalPoint.Value[THM_THRESHOLD_1],
8175+
Core->PowerThermal.Param,
8176+
ThermInterrupt.Threshold1_Value);
81248177

8125-
Core->ThermalPoint.Value[THM_THRESHOLD_2] = \
8126-
Core->PowerThermal.Param.Offset[0]
8127-
- Core->PowerThermal.Param.Offset[1]
8128-
- ThermInterrupt.Threshold2_Value;
8178+
COMPUTE_THERMAL(INTEL,
8179+
Core->ThermalPoint.Value[THM_THRESHOLD_2],
8180+
Core->PowerThermal.Param,
8181+
ThermInterrupt.Threshold2_Value);
81298182

81308183
if (ThermInterrupt.Threshold1_Int) {
81318184
BITSET(LOCKLESS, Core->ThermalPoint.State, THM_THRESHOLD_1);
@@ -8203,15 +8256,61 @@ void ThermalMonitor_IA32(CORE_RO *Core)
82038256

82048257
RDMSR(ThermInterrupt, MSR_IA32_PACKAGE_THERM_INTERRUPT);
82058258

8206-
PUBLIC(RO(Proc))->ThermalPoint.Value[THM_THRESHOLD_1] = \
8207-
Core->PowerThermal.Param.Offset[0]
8208-
- Core->PowerThermal.Param.Offset[1]
8209-
- ThermInterrupt.Threshold1_Value;
8259+
if (ThermalPoint_Count < THM_POINTS_DIM)
8260+
{
8261+
unsigned short WrRdMSR = 0;
8262+
8263+
if (ThermalPoint_Count > THM_THRESHOLD_1) {
8264+
if (ThermalPoint[THM_THRESHOLD_1] > 0)
8265+
{
8266+
COMPUTE_THERMAL(INVERSE_INTEL,
8267+
ThermInterrupt.Threshold1_Value,
8268+
Core->PowerThermal.Param,
8269+
ThermalPoint[THM_THRESHOLD_1]);
8270+
8271+
ThermInterrupt.Threshold1_Int = 1;
8272+
WrRdMSR = 1;
8273+
}
8274+
else if (ThermalPoint[THM_THRESHOLD_1] == 0)
8275+
{
8276+
ThermInterrupt.Threshold1_Value = 0;
8277+
ThermInterrupt.Threshold1_Int = 0;
8278+
WrRdMSR = 1;
8279+
}
8280+
}
8281+
if (ThermalPoint_Count > THM_THRESHOLD_2) {
8282+
if (ThermalPoint[THM_THRESHOLD_2] > 0)
8283+
{
8284+
COMPUTE_THERMAL(INVERSE_INTEL,
8285+
ThermInterrupt.Threshold2_Value,
8286+
Core->PowerThermal.Param,
8287+
ThermalPoint[THM_THRESHOLD_2]);
8288+
8289+
ThermInterrupt.Threshold2_Int = 1;
8290+
WrRdMSR = 1;
8291+
}
8292+
else if (ThermalPoint[THM_THRESHOLD_2] == 0)
8293+
{
8294+
ThermInterrupt.Threshold2_Value = 0;
8295+
ThermInterrupt.Threshold2_Int = 0;
8296+
WrRdMSR = 1;
8297+
}
8298+
}
8299+
if (WrRdMSR == 1) {
8300+
WRMSR(ThermInterrupt, MSR_IA32_PACKAGE_THERM_INTERRUPT);
8301+
RDMSR(ThermInterrupt, MSR_IA32_PACKAGE_THERM_INTERRUPT);
8302+
}
8303+
}
8304+
8305+
COMPUTE_THERMAL(INTEL,
8306+
PUBLIC(RO(Proc))->ThermalPoint.Value[THM_THRESHOLD_1],
8307+
Core->PowerThermal.Param,
8308+
ThermInterrupt.Threshold1_Value);
82108309

8211-
PUBLIC(RO(Proc))->ThermalPoint.Value[THM_THRESHOLD_2] = \
8212-
Core->PowerThermal.Param.Offset[0]
8213-
- Core->PowerThermal.Param.Offset[1]
8214-
- ThermInterrupt.Threshold2_Value;
8310+
COMPUTE_THERMAL(INTEL,
8311+
PUBLIC(RO(Proc))->ThermalPoint.Value[THM_THRESHOLD_2],
8312+
Core->PowerThermal.Param,
8313+
ThermInterrupt.Threshold2_Value);
82158314

82168315
if (ThermInterrupt.Threshold1_Int) {
82178316
BITSET(LOCKLESS, PUBLIC(RO(Proc))->ThermalPoint.State,

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