Config assumes that cbus and sbus are on same clock domain

[tymcauley]

The cache's control interface (if it exists) is connected to the Control Bus here:

rocket-chip-inclusive-cache/design/craft/inclusivecache/src/Configs.scala

Lines 128 to 130 in 850e121

	l2.ctlnode.foreach {
	_ := cbus.coupleTo("l2_ctrl") { TLBuffer(1) := TLFragmenter(cbus) := _ }
	}

As best as I can tell, the rest of the cache is on System Bus's clock domain. This means that this ctlnode-to-cbus connection will make an illegal clock domain crossing if the System Bus and the Control Bus are on different clock domains. I'm not completely sure how to best solve the issue, should the sbus-to-cbus crossing type be a parameter to WithInclusiveCache?

[jerryz123]

Yes I think that should be added as a parameter, and then you'll have to crossFrom the cbus into the ctrl domain in th eL2.

[tymcauley]

Finally getting around to this, but how does this look?

diff --git a/design/craft/inclusivecache/src/Configs.scala b/design/craft/inclusivecache/src/Configs.scala
index 29b20f0..66e9953 100644
--- a/design/craft/inclusivecache/src/Configs.scala
+++ b/design/craft/inclusivecache/src/Configs.scala
@@ -122,7 +122,7 @@ class WithInclusiveCache(
     }

     l2.ctlnode.foreach {
-      _ := cbus.coupleTo("l2_ctrl") { TLBuffer(1) := TLFragmenter(cbus) := _ }
+      _ := cbus.to("l2_ctrl") { TLBuffer(1) := TLFragmenter(cbus) := cbus.crossOutHelper(p(SbusToCbusXTypeKey)) }
     }

     ElaborationArtefacts.add("l2.json", l2.module.json)

Not sure if there's a simpler way to do it. This only crossFrom I could find was for connecting buses to each other, which didn't seem right for this: https://github.com/chipsalliance/rocket-chip/blob/74d65ca320cf5f296b39dc5218f6f099e08e2794/src/main/scala/tilelink/BusWrapper.scala#L128

Also, I couldn't figure out how to do the typical this.crossIn(ctlnode) strategy, since I wasn't sure how to mix in HasClockDomainCrossing without totally disrupting this class.