From 0beac0b714d30d28af87598e58b58faa1beba805 Mon Sep 17 00:00:00 2001 From: Leway Colin Date: Sat, 25 Jan 2020 09:16:43 +0800 Subject: [PATCH] Remove redundancy code (#1296) * Remove redundancy code * Remove blank line * BitPat supports whitespace and underscores, presumably for human readability. The BitPat.parse factory though did not remove these from the returned count. This fixes that adds whitespace and underscores to the unit tests This is an updated vesion of Chisel PR #1069 Co-authored-by: Chick Markley Co-authored-by: Jim Lawson Co-authored-by: mergify[bot] <37929162+mergify[bot]@users.noreply.github.com> (cherry picked from commit 160e019e38c933112836cccbb38c5f397427cf7f) --- chiselFrontend/src/main/scala/chisel3/RawModule.scala | 11 ----------- 1 file changed, 11 deletions(-) diff --git a/chiselFrontend/src/main/scala/chisel3/RawModule.scala b/chiselFrontend/src/main/scala/chisel3/RawModule.scala index 4155ef4ab45..2b184a50fb6 100644 --- a/chiselFrontend/src/main/scala/chisel3/RawModule.scala +++ b/chiselFrontend/src/main/scala/chisel3/RawModule.scala @@ -184,17 +184,6 @@ package internal { // Allow access to bindings from the compatibility package protected def _compatIoPortBound() = portsContains(io)// scalastyle:ignore method.name - protected override def nameIds(rootClass: Class[_]): HashMap[HasId, String] = { - val names = super.nameIds(rootClass) - - // Allow IO naming without reflection - names.put(io, "io") - names.put(clock, "clock") - names.put(reset, "reset") - - names - } - private[chisel3] override def namePorts(names: HashMap[HasId, String]): Unit = { for (port <- getModulePorts) { // This should already have been caught