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We need to add support for generating ValueLabelRanges to the machinst framework and (at least) the x64 backend before we can remove the x86 backend (#1936, #2079).
This requires tracking the correspondence from CLIF Values to VCode Regs (pre- and post-regalloc) and SpillSlots. We will need to either:
extend the returned info from regalloc.rs somewhat in order to provde the pre-to-post-regalloc mapping, or
stash this pre-to-post-regalloc mapping on our side inside the map_regs() callback, possibly only for Regs that correspond to ValueLabels
The text was updated successfully, but these errors were encountered:
We need to add support for generating
ValueLabelRange
s to themachinst
framework and (at least) thex64
backend before we can remove thex86
backend (#1936, #2079).This requires tracking the correspondence from CLIF
Value
s to VCodeReg
s (pre- and post-regalloc) andSpillSlot
s. We will need to either:map_regs()
callback, possibly only forReg
s that correspond toValueLabel
sThe text was updated successfully, but these errors were encountered: