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In src/uart.h MASTERCLOCK is set to 20000000, which should be 18432000. The resulting UART baud rates are therefore 8% lower than specified. For the VDP link it makes no difference as the baud rate divisor in the eZ80 is rounded to 1 in any case.
The text was updated successfully, but these errors were encountered:
In src/uart.h MASTERCLOCK is set to 20000000, which should be 18432000. The resulting UART baud rates are therefore 8% lower than specified. For the VDP link it makes no difference as the baud rate divisor in the eZ80 is rounded to 1 in any case.
The text was updated successfully, but these errors were encountered: