Commit f17a32a 1 parent d67f6f7 commit f17a32a Copy full SHA for f17a32a
File tree 2 files changed +43
-1
lines changed
2 files changed +43
-1
lines changed Original file line number Diff line number Diff line change @@ -13,7 +13,7 @@ $(package)_patches += support_new_android_ndks.patch fix_android_jni_static.patc
13
13
$(package)_patches+ = no_sdk_version_check.patch
14
14
$(package)_patches+ = fix_lib_paths.patch fix_android_pch.patch
15
15
$(package)_patches+ = qtbase-moc-ignore-gcc-macro.patch fix_limits_header.patch
16
- $(package)_patches += fix_qml_python.patch
16
+ $(package)_patches += fix_qml_python.patch riscv_detection.patch
17
17
18
18
$(package)_qtdeclarative_file_name = qtdeclarative-$($(package ) _suffix)
19
19
$(package)_qtdeclarative_sha256_hash = 1267e029abc8424424c419bc1681db069ec76e51270cc220994e0f442c9f78d3
@@ -267,6 +267,7 @@ define $(package)_preprocess_cmds
267
267
patch -p1 -i $($(package ) _patch_dir) /qtbase-moc-ignore-gcc-macro.patch && \
268
268
patch -p1 -i $($(package ) _patch_dir) /fix_limits_header.patch && \
269
269
patch -p1 -i $($(package ) _patch_dir) /fix_qml_python.patch && \
270
+ patch -p1 -i $($(package ) _patch_dir) /riscv_detection.patch && \
270
271
mkdir -p qtbase/mkspecs/macx-clang-linux &&\
271
272
cp -f qtbase/mkspecs/macx-clang/qplatformdefs.h qtbase/mkspecs/macx-clang-linux/ &&\
272
273
cp -f $($(package ) _patch_dir) /mac-qmake.conf qtbase/mkspecs/macx-clang-linux/qmake.conf && \
Original file line number Diff line number Diff line change
1
+ Add RISC-V detection
2
+
3
+ Upstream commit:
4
+ - Qt 5.14: 9a6a84731131b205f74b10f866ae212e0895bd4a
5
+
6
+ --- old/qtbase/src/corelib/global/archdetect.cpp
7
+ +++ new/qtbase/src/corelib/global/archdetect.cpp
8
+ @@ -67,6 +67,10 @@
9
+ # define ARCH_PROCESSOR "power"
10
+ #elif defined(Q_PROCESSOR_POWER_64)
11
+ # define ARCH_PROCESSOR "power64"
12
+ + #elif defined(Q_PROCESSOR_RISCV_32)
13
+ + # define ARCH_PROCESSOR "riscv32"
14
+ + #elif defined(Q_PROCESSOR_RISCV_64)
15
+ + # define ARCH_PROCESSOR "riscv64"
16
+ #elif defined(Q_PROCESSOR_S390_X)
17
+ # define ARCH_PROCESSOR "s390x"
18
+ #elif defined(Q_PROCESSOR_S390)
19
+
20
+ --- old/qtbase/src/corelib/global/qprocessordetection.h
21
+ +++ old/qtbase/src/corelib/global/qprocessordetection.h
22
+ @@ -282,6 +282,19 @@
23
+ // Q_BYTE_ORDER not defined, use endianness auto-detection
24
+
25
+ + /*
26
+ + RISC-V family, known variants: 32- and 64-bit
27
+ + RISC-V is little-endian.
28
+ + */
29
+ + #elif defined(__riscv)
30
+ + # define Q_PROCESSOR_RISCV
31
+ + # if __riscv_xlen == 64
32
+ + # define Q_PROCESSOR_RISCV_64
33
+ + # else
34
+ + # define Q_PROCESSOR_RISCV_32
35
+ + # endif
36
+ + # define Q_BYTE_ORDER Q_LITTLE_ENDIAN
37
+ +
38
+ /*
39
+ S390 family, known variant: S390X (64-bit)
40
+
41
+ S390 is big-endian.
You can’t perform that action at this time.
0 commit comments