From e319eac9a4d068f147b47b693e81e264ee47c8d9 Mon Sep 17 00:00:00 2001 From: The-going <48602507+The-going@users.noreply.github.com> Date: Sat, 25 Jan 2025 14:07:18 +0300 Subject: [PATCH] sunxi-6.12: Add BananaPi M4 Berry support --- ...64-sun50i-h618-Add-BananaPi-M4-Berry.patch | 452 ++++++++++++++++++ .../kernel/archive/sunxi-6.12/series.armbian | 1 + patch/kernel/archive/sunxi-6.12/series.conf | 5 +- 3 files changed, 454 insertions(+), 4 deletions(-) create mode 100644 patch/kernel/archive/sunxi-6.12/patches.armbian/arm64-sun50i-h618-Add-BananaPi-M4-Berry.patch diff --git a/patch/kernel/archive/sunxi-6.12/patches.armbian/arm64-sun50i-h618-Add-BananaPi-M4-Berry.patch b/patch/kernel/archive/sunxi-6.12/patches.armbian/arm64-sun50i-h618-Add-BananaPi-M4-Berry.patch new file mode 100644 index 000000000000..68bf5826ab87 --- /dev/null +++ b/patch/kernel/archive/sunxi-6.12/patches.armbian/arm64-sun50i-h618-Add-BananaPi-M4-Berry.patch @@ -0,0 +1,452 @@ +From a76f10a3f6e8d978bc2c39d2a9488bc9ffb136a4 Mon Sep 17 00:00:00 2001 +From: The-going <48602507+The-going@users.noreply.github.com> +Date: Sun, 19 Jan 2025 20:34:02 +0300 +Subject: [PATCH] arm64: sun50i-h618: Add BananaPi M4 Berry + +--- + arch/arm64/boot/dts/allwinner/Makefile | 1 + + .../sun50i-h618-bananapi-m4-berry.dts | 420 ++++++++++++++++++ + 2 files changed, 421 insertions(+) + create mode 100644 arch/arm64/boot/dts/allwinner/sun50i-h618-bananapi-m4-berry.dts + +diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile +index a676c57aad1d..9b37cc58ff01 100644 +--- a/arch/arm64/boot/dts/allwinner/Makefile ++++ b/arch/arm64/boot/dts/allwinner/Makefile +@@ -60,6 +60,7 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h616-bigtreetech-pi.dtb + dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h616-orangepi-zero2.dtb + dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h616-x96-mate.dtb + dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h618-bananapi-m4-zero.dtb ++dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h618-bananapi-m4-berry.dtb + dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h618-longanpi-3h.dtb + dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h618-orangepi-zero2w.dtb + dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h618-orangepi-zero3.dtb +diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h618-bananapi-m4-berry.dts b/arch/arm64/boot/dts/allwinner/sun50i-h618-bananapi-m4-berry.dts +new file mode 100644 +index 000000000000..fdb9991e53af +--- /dev/null ++++ b/arch/arm64/boot/dts/allwinner/sun50i-h618-bananapi-m4-berry.dts +@@ -0,0 +1,420 @@ ++// SPDX-License-Identifier: (GPL-2.0+ or MIT) ++/* ++ * Copyright (C) 2020 Arm Ltd. ++ */ ++ ++/dts-v1/; ++ ++#include "sun50i-h616.dtsi" ++#include "sun50i-h616-cpu-opp.dtsi" ++ ++#include ++#include ++#include ++ ++/ { ++ model = "BananaPi M4 Berry"; ++ compatible = "BiPai,bananapi-m4berry", "allwinner,sun50i-h616"; ++ ++ aliases { ++ ethernet0 = &emac0; ++ serial0 = &uart0; ++ serial5 = &uart5; ++ }; ++ ++ chosen { ++ stdout-path = "serial0:115200n8"; ++ }; ++ ++ connector { ++ compatible = "hdmi-connector"; ++ type = "d"; ++ ++ port { ++ hdmi_con_in: endpoint { ++ remote-endpoint = <&hdmi_out_con>; ++ }; ++ }; ++ }; ++ ++ leds: leds { ++ compatible = "gpio-leds"; ++ ++ led-greed { ++ label = "red_led"; ++ gpios = <&pio 2 12 GPIO_ACTIVE_HIGH>; /* PC12 */ ++ linux,default-trigger = "heartbeat"; ++ }; ++ }; ++ ++ wifi_usb { ++ compatible = "usb-wifi"; ++ status = "okay"; ++ power_on_pin = <&pio 2 2 GPIO_ACTIVE_HIGH>; /* PC2 */ ++ }; ++ ++ reg_vcc5v: vcc5v { ++ /* board wide 5V supply directly from the USB-C socket */ ++ compatible = "regulator-fixed"; ++ regulator-name = "vcc-5v"; ++ regulator-min-microvolt = <5000000>; ++ regulator-max-microvolt = <5000000>; ++ regulator-always-on; ++ }; ++ ++ ac200_pwm_clk: ac200_clk { ++ compatible = "pwm-clock"; ++ #clock-cells = <0>; ++ // pwm5 period_ns = 500 > 334 for select 24M clock. ++ pwms = <&pwm 5 500 0>; ++ clock-frequency = <2000000>; ++ status = "okay"; ++ }; ++ ++ soc { ++ pwm: pwm@300a000 { ++ compatible = "allwinner,sun50i-h616-pwm"; ++ reg = <0x0300a000 0x400>; ++ clocks = <&osc24M>, <&ccu CLK_BUS_PWM>; ++ clock-names = "mod", "bus"; ++ resets = <&ccu RST_BUS_PWM>; ++ pwm-number = <6>; ++ pwm-base = <0x0>; ++ sunxi-pwms = <&pwm0>, <&pwm1>, <&pwm2>, <&pwm3>, <&pwm4>, <&pwm5>; ++ #pwm-cells = <3>; ++ status = "okay"; ++ }; ++ ++ pwm0: pwm0@0300a000 { ++ compatible = "allwinner,sunxi-pwm0"; ++ }; ++ ++ pwm1: pwm1@0300a000 { ++ compatible = "allwinner,sunxi-pwm1"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pwm1_ph_pin>; ++ }; ++ ++ pwm2: pwm2@0300a000 { ++ compatible = "allwinner,sunxi-pwm2"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pwm2_ph_pin>; ++ }; ++ ++ pwm3: pwm3@0300a000 { ++ compatible = "allwinner,sunxi-pwm3"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pwm3_ph_pin>; ++ }; ++ ++ pwm4: pwm4@0300a000 { ++ compatible = "allwinner,sunxi-pwm4"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pwm4_ph_pin>; ++ }; ++ ++ pwm5: pwm5@0300a000 { ++ compatible = "allwinner,sunxi-pwm5"; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&pwm5_pin>; ++ clk_bypass_output = <0x1>; ++ status = "okay"; ++ }; ++ }; ++}; ++ ++&de { ++ status = "okay"; ++}; ++ ++&hdmi { ++ //hvcc-supply = <®_bldo1>; ++ status = "okay"; ++}; ++ ++&hdmi_out { ++ hdmi_out_con: endpoint { ++ remote-endpoint = <&hdmi_con_in>; ++ }; ++}; ++ ++&gpu { ++ mali-supply = <®_dcdc1>; ++ status = "disabled"; ++}; ++ ++&emac0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&ext_rgmii_pins>; ++ phy-mode = "rgmii"; ++ phy-handle = <&ext_rgmii_phy>; ++ allwinner,rx-delay-ps = <3100>; ++ allwinner,tx-delay-ps = <700>; ++ status = "okay"; ++}; ++ ++&mdio0 { ++ ext_rgmii_phy: ethernet-phy@1 { ++ compatible = "ethernet-phy-ieee802.3-c22"; ++ reg = <1>; ++ }; ++}; ++ ++&mmc0 { ++ vmmc-supply = <®_dldo1>; ++ cd-gpios = <&pio 5 6 GPIO_ACTIVE_LOW>; /* PF6 */ ++ bus-width = <4>; ++ max-frequency = <50000000>; ++ status = "okay"; ++}; ++ ++&mmc2 { ++ pinctrl-names = "default"; ++ ++ vmmc-supply = <®_dldo1>; ++ bus-width = <8>; ++ non-removable; ++ cap-mmc-hw-reset; ++ status = "okay"; ++}; ++ ++&r_i2c { ++ pinctrl-0 = <&r_i2c_pins>; ++ pinctrl-names = "default"; ++ status = "okay"; ++ ++ axp313a: pmic@36 { ++ compatible = "x-powers,axp313a"; ++ reg = <0x36>; ++ #interrupt-cells = <1>; ++ interrupt-controller; ++ interrupt-parent = <&pio>; ++ ++ regulators{ ++ reg_dcdc1: dcdc1 { ++ regulator-name = "axp313a-dcdc1-gpu"; ++ regulator-min-microvolt = <810000>; ++ regulator-max-microvolt = <990000>; ++ regulator-step-delay-us = <25>; ++ regulator-final-delay-us = <50>; ++ regulator-always-on; ++ }; ++ ++ reg_dcdc2: dcdc2 { ++ regulator-name = "axp313a-dcdc2-cpu"; ++ regulator-min-microvolt = <500000>; ++ regulator-max-microvolt = <1200000>; ++ regulator-step-delay-us = <25>; ++ regulator-final-delay-us = <50>; ++ regulator-ramp-delay = <200>; ++ regulator-always-on; ++ }; ++ ++ reg_dcdc3: dcdc3 { ++ regulator-name = "axp313a-dcdc3-dram"; ++ regulator-min-microvolt = <1100000>; ++ regulator-max-microvolt = <1100000>; ++ regulator-step-delay-us = <25>; ++ regulator-final-delay-us = <50>; ++ regulator-always-on; ++ }; ++ ++ reg_aldo1: aldo1 { ++ regulator-name = "axp313a-aldo1-1v8"; ++ regulator-min-microvolt = <1800000>; ++ regulator-max-microvolt = <1800000>; ++ regulator-step-delay-us = <25>; ++ regulator-final-delay-us = <50>; ++ regulator-always-on; ++ }; ++ ++ reg_dldo1: dldo1 { ++ regulator-name = "axp313a-dldo1-3v3"; ++ regulator-min-microvolt = <3300000>; ++ regulator-max-microvolt = <3300000>; ++ regulator-step-delay-us = <25>; ++ regulator-final-delay-us = <50>; ++ regulator-always-on; ++ }; ++ }; ++ }; ++}; ++ ++&uart0 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart0_ph_pins>; ++ status = "okay"; ++}; ++ ++&usbotg { ++ /* ++ * PHY0 pins are connected to a USB-C socket, but a role switch ++ * is not implemented: both CC pins are pulled to GND. ++ * The VBUS pins power the device, so a fixed peripheral mode ++ * is the best choice. ++ * The board can be powered via GPIOs, in this case port0 *can* ++ * act as a host (with a cable/adapter ignoring CC), as VBUS is ++ * then provided by the GPIOs. Any user of this setup would ++ * need to adjust the DT accordingly: dr_mode set to "host", ++ * enabling OHCI0 and EHCI0. ++ */ ++ dr_mode = "peripheral"; ++ status = "okay"; ++}; ++ ++&usbphy { ++ usb1_vbus-supply = <®_vcc5v>; ++ status = "okay"; ++}; ++ ++&ehci0 { ++ status = "disabled"; ++}; ++ ++&ehci1 { ++ status = "okay"; ++}; ++ ++&ehci2 { ++ status = "okay"; ++}; ++ ++&ehci3 { ++ status = "okay"; ++}; ++ ++&ohci0 { ++ status = "disabled"; ++}; ++ ++&ohci1 { ++ status = "okay"; ++}; ++ ++&ohci2 { ++ status = "okay"; ++}; ++ ++&ohci3 { ++ status = "okay"; ++}; ++ ++&ir { ++ status = "okay"; ++}; ++ ++&i2c1 { ++ status = "disabled"; ++}; ++ ++&i2c2 { ++ status = "disabled"; ++}; ++ ++&i2c3 { ++ status = "disabled"; ++}; ++ ++&i2c4 { ++ status = "disabled"; ++}; ++ ++&uart1 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart1_pins>, <&uart1_rts_cts_pins>; ++ status = "okay"; ++}; ++ ++&uart2 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart2_pins>; ++ status = "disabled"; ++}; ++ ++&uart5 { ++ pinctrl-names = "default"; ++ pinctrl-0 = <&uart5_pins>; ++ status = "okay"; ++}; ++ ++&spi1 { ++ status = "okay"; ++ #address-cells = <1>; ++ #size-cells = <0>; ++ pinctrl-names = "default"; ++ pinctrl-0 = <&spi1_pins>, <&spi1_cs1_pin>; ++ ++ spidev@1 { ++ compatible = "rohm,dh2228fv"; ++ status = "okay"; ++ reg = <1>; ++ spi-max-frequency = <1000000>; ++ }; ++}; ++ ++&codec { ++ allwinner,audio-routing = ++ "Line Out", "LINEOUT"; ++ status = "okay"; ++}; ++ ++&ahub_dam_plat { ++ status = "okay"; ++}; ++ ++&ahub1_plat { ++ status = "okay"; ++}; ++ ++&ahub1_mach { ++ status = "okay"; ++}; ++ ++&cpu0 { ++ cpu-supply = <®_dcdc2>; ++ status = "okay"; ++}; ++ ++&sid { ++ ephy_calibration: ephy-calibration@2c { ++ reg = <0x2c 0x2>; ++ }; ++}; ++ ++&pio { ++ vcc-pc-supply = <®_aldo1>; ++ vcc-pf-supply = <®_dldo1>; ++ vcc-pg-supply = <®_dldo1>; ++ vcc-ph-supply = <®_dldo1>; ++ vcc-pi-supply = <®_dldo1>; ++ ++ /omit-if-no-ref/ ++ pwm1_ph_pin: pwm1-ph-pin { ++ pins = "PH3"; ++ function = "pwm1"; ++ }; ++ ++ /omit-if-no-ref/ ++ pwm2_ph_pin: pwm2-ph-pin { ++ pins = "PH2"; ++ function = "pwm2"; ++ }; ++ ++ /omit-if-no-ref/ ++ pwm3_ph_pin: pwm3-ph-pin { ++ pins = "PH0"; ++ function = "pwm3"; ++ }; ++ ++ /omit-if-no-ref/ ++ pwm4_ph_pin: pwm4-ph-pin { ++ pins = "PH1"; ++ function = "pwm4"; ++ }; ++ ++ /omit-if-no-ref/ ++ pwm5_pin: pwm5-pin { ++ pins = "PA12"; ++ function = "pwm5"; ++ }; ++}; +-- +2.35.3 + diff --git a/patch/kernel/archive/sunxi-6.12/series.armbian b/patch/kernel/archive/sunxi-6.12/series.armbian index 8d34895e2ffb..6d75b6e568de 100644 --- a/patch/kernel/archive/sunxi-6.12/series.armbian +++ b/patch/kernel/archive/sunxi-6.12/series.armbian @@ -177,3 +177,4 @@ patches.armbian/Add-BananaPi-BPI-M4-Zero-overlays.patch patches.armbian/Fix-ghost-touches-on-tsc2007-tft-screen.patch patches.armbian/arm-dts-sun8i-h2-plus-orangepi-zero-fix-usb_otg-dr_mode.patch + patches.armbian/arm64-sun50i-h618-Add-BananaPi-M4-Berry.patch diff --git a/patch/kernel/archive/sunxi-6.12/series.conf b/patch/kernel/archive/sunxi-6.12/series.conf index 3947802ced81..584c856c1f39 100644 --- a/patch/kernel/archive/sunxi-6.12/series.conf +++ b/patch/kernel/archive/sunxi-6.12/series.conf @@ -433,7 +433,4 @@ patches.armbian/Add-BananaPi-BPI-M4-Zero-overlays.patch patches.armbian/Fix-ghost-touches-on-tsc2007-tft-screen.patch patches.armbian/arm-dts-sun8i-h2-plus-orangepi-zero-fix-usb_otg-dr_mode.patch - -# The patches.addon folder where new patches are added before they get into -# one of the two main series. -# + patches.armbian/arm64-sun50i-h618-Add-BananaPi-M4-Berry.patch