SDRAM.vhf

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-- Copyright (c) 1995-2011 Xilinx, Inc.  All rights reserved.
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--   ____  ____ 
--  /   /\/   / 
-- /___/  \  /    Vendor: Xilinx 
-- \   \   \/     Version : 13.4
--  \   \         Application : sch2hdl
--  /   /         Filename : SDRAM.vhf
-- /___/   /\     Timestamp : 10/30/2020 01:01:11
-- \   \  /  \ 
--  \___\/\___\ 
--
--Command: sch2hdl -sympath C:/Users/Yasamin/Documents/Classes/COE758/CacheController-master/ipcore_dir -intstyle ise -family spartan3e -flat -suppress -vhdl C:/Users/Yasamin/Documents/Classes/COE758/CacheController-master/SDRAM.vhf -w C:/Users/Yasamin/Documents/Classes/COE758/CacheController-master/SDRAM.sch
--Design Name: SDRAM
--Device: spartan3e
--Purpose:
--    This vhdl netlist is translated from an ECS schematic. It can be 
--    synthesized and simulated, but it should not be modified. 
--

library ieee;
use ieee.std_logic_1164.ALL;
use ieee.numeric_std.ALL;
library UNISIM;
use UNISIM.Vcomponents.ALL;

entity SDRAM is
   port ( );
end SDRAM;

architecture BEHAVIORAL of SDRAM is
begin
end BEHAVIORAL;