CacheController_map.map

Release 13.4 Map O.87xd (nt64)
Xilinx Map Application Log File for Design 'CacheController'

Design Information
------------------
Command Line   : map -intstyle ise -p xc3s500e-fg320-5 -cm area -ir off -pr off
-c 100 -o CacheController_map.ncd CacheController.ngd CacheController.pcf 
Target Device  : xc3s500e
Target Package : fg320
Target Speed   : -5
Mapper Version : spartan3e -- $Revision: 1.55 $
Mapped Date    : Fri Oct 30 11:54:17 2020

Mapping design into LUTs...
ERROR:MapLib:979 - LUT4 symbol
   "myIcon/U0/U_ICON/U_TDO_MUX/U_CS_MUX/I4.U_MUX16/Mmux_O_4" (output
   signal=myIcon/U0/U_ICON/U_TDO_MUX/U_CS_MUX/I4.U_MUX16/Mmux_O_4) has input
   signal "myIcon/CONTROL0<3>" which will be trimmed. See Section 5 of the Map
   Report File for details about why the input signal will become undriven.
ERROR:MapLib:978 - LUT4 symbol
   "myIcon/U0/U_ICON/U_TDO_MUX/U_CS_MUX/I4.U_MUX16/Mmux_O_4" (output
   signal=myIcon/U0/U_ICON/U_TDO_MUX/U_CS_MUX/I4.U_MUX16/Mmux_O_4) has an
   equation that uses input pin I0, which no longer has a connected signal.
   Please ensure that all the pins used in the equation for this LUT have
   signals that are not trimmed (see Section 5 of the Map Report File for
   details on which signals were trimmed).

Error found in mapping process, exiting...
Errors found during the mapping phase.  Please see map report file for more
details.  Output files will not be written.

Design Summary
--------------
Number of errors   :   2
Number of warnings :   0