From b0b099656fbf30997b5a7413caa4674babc6f5c5 Mon Sep 17 00:00:00 2001 From: UtsavBalar1231 Date: Fri, 11 Jun 2021 16:58:53 +0800 Subject: [PATCH] ARM64: dts: k11a: Redo panel configuration Change-Id: Ibd211ebdaf4a1026a0470cfeb9ba87fd5fc1eb6d Signed-off-by: UtsavBalar1231 --- .../qcom/dsi-panel-k11a-38-08-0a-dsc-cmd.dtsi | 243 ++++++++++++------ .../dts/vendor/qcom/kona-sde-display.dtsi | 21 +- 2 files changed, 176 insertions(+), 88 deletions(-) diff --git a/arch/arm64/boot/dts/vendor/qcom/dsi-panel-k11a-38-08-0a-dsc-cmd.dtsi b/arch/arm64/boot/dts/vendor/qcom/dsi-panel-k11a-38-08-0a-dsc-cmd.dtsi index e7190fc0a3bd..74e7e047be44 100644 --- a/arch/arm64/boot/dts/vendor/qcom/dsi-panel-k11a-38-08-0a-dsc-cmd.dtsi +++ b/arch/arm64/boot/dts/vendor/qcom/dsi-panel-k11a-38-08-0a-dsc-cmd.dtsi @@ -23,8 +23,8 @@ qcom,mdss-dsi-dma-trigger = "trigger_sw"; qcom,mdss-dsi-mdp-trigger = "none"; qcom,mdss-dsi-reset-sequence = <0 10>, <1 10>; - qcom,mdss-pan-physical-width-dimension = <71>; - qcom,mdss-pan-physical-height-dimension = <158>; + qcom,mdss-pan-physical-width-dimension = <695>; + qcom,mdss-pan-physical-height-dimension = <1546>; qcom,mdss-dsi-te-pin-select = <1>; qcom,mdss-dsi-wr-mem-start = <0x2c>; qcom,mdss-dsi-wr-mem-continue = <0x3c>; @@ -34,26 +34,27 @@ qcom,mdss-dsi-tx-eot-append; qcom,mdss-dsi-lp11-init; + qcom,bl-update-flag = "delay_until_first_frame"; + qcom,mdss-dsi-panel-hdr-enabled; qcom,mdss-dsi-panel-hdr-color-primaries = <14500 15500 32000 17000 15500 30000 8000 3000>; qcom,mdss-dsi-panel-peak-brightness = <4200000>; qcom,mdss-dsi-panel-blackness-level = <3230>; - qcom,bl-update-flag = "delay_until_first_frame"; - qcom,mdss-dsi-display-timings { timing@0{ - qcom,mdss-dsi-panel-framerate = <120>; + qcom,mdss-dsi-cmd-mode; + qcom,mdss-dsi-panel-framerate = <60>; qcom,mdss-dsi-panel-width = <1080>; qcom,mdss-dsi-panel-height = <2400>; qcom,mdss-dsi-h-front-porch = <16>; qcom,mdss-dsi-h-back-porch = <8>; qcom,mdss-dsi-h-pulse-width = <8>; qcom,mdss-dsi-h-sync-skew = <0>; - qcom,mdss-dsi-v-back-porch = <8>; - qcom,mdss-dsi-v-front-porch = <4>; - qcom,mdss-dsi-v-pulse-width = <4>; + qcom,mdss-dsi-v-back-porch = <560>; + qcom,mdss-dsi-v-front-porch = <600>; + qcom,mdss-dsi-v-pulse-width = <32>; qcom,mdss-dsi-h-sync-pulse = <0>; qcom,mdss-dsi-h-left-border = <0>; qcom,mdss-dsi-h-right-border = <0>; @@ -61,12 +62,16 @@ qcom,mdss-dsi-v-bottom-border = <0>; qcom,mdss-dsi-panel-clockrate = <1100000000>; qcom,mdss-dsi-panel-jitter = <0x5 0x1>; - qcom,mdss-mdp-transfer-time-us = <7000>; + qcom,mdss-mdp-transfer-time-us = <14000>; qcom,mdss-dsi-on-command = [ - 05 01 00 00 0A 00 02 11 00 - 39 01 00 00 00 00 02 35 00 - 39 01 00 00 00 00 02 9D 01 - 39 01 00 00 00 00 81 9E + /* 1 Sleep Out */ + 05 01 00 00 0A 00 02 11 00 /* Sleep Out */ + /* 3 Common Setting */ + /* 3.1 TE(Vsync) On/Off */ + 39 01 00 00 00 00 02 35 00 /* TE On(Vsync) */ + /* DSC Setting */ + 39 01 00 00 00 00 02 9D 01 /* Compression Enable */ + 39 01 00 00 00 00 81 9E /* PPS Setting */ 11 00 00 89 30 80 09 60 04 38 00 08 02 1C 02 1C 02 00 02 0E 00 20 00 BB @@ -83,25 +88,30 @@ 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 - 39 00 00 00 00 00 05 2A 00 00 04 37 - 39 01 00 00 00 00 05 2B 00 00 09 5F + /* 3.2 CASET/PASET Setting */ + 39 00 00 00 00 00 05 2A 00 00 04 37 /* CASET */ + 39 01 00 00 00 00 05 2B 00 00 09 5F /* PASET */ + /* 3.3 11Bit Dimming Setting */ 39 01 00 00 00 00 03 F0 5A 5A - 39 00 00 00 00 00 02 B0 01 - 39 01 00 00 00 00 02 B7 4F + 39 00 00 00 00 00 02 B0 01 /* Global para */ + 39 01 00 00 00 00 02 B7 4F /* 11Bit Dimming On*/ 39 01 00 00 00 00 03 F0 A5 A5 + /* 3.4 Err FG Setting*/ 39 01 00 00 00 00 03 F0 5A 5A 39 00 00 00 00 00 02 B0 02 - 39 00 00 00 00 00 05 EC 00 C0 C3 43 + 39 00 00 00 00 00 05 EC 00 C2 C2 42 39 00 00 00 00 00 02 B0 0D 39 00 00 00 00 00 02 EC 19 39 00 00 00 00 00 02 B0 06 - 39 01 00 00 00 00 02 E4 D0 + 39 01 00 00 00 00 02 E4 10 39 01 00 00 00 00 03 F0 A5 A5 + /* 3.5 Ripple improvement Setting*/ 39 01 00 00 00 00 03 F0 5A 5A 39 00 00 00 00 00 02 B0 36 39 00 00 00 00 00 02 D3 0F 39 01 00 00 00 00 02 F7 03 39 01 00 00 00 00 03 F0 A5 A5 + /* 3.6 OFC (MIPI 1100Mbps/Lane, OSC 108.5Mhz)*/ 39 01 00 00 00 00 03 F0 5A 5A 39 01 00 00 00 00 03 FC 5A 5A 39 00 00 00 00 00 02 B0 01 @@ -109,27 +119,37 @@ 39 01 00 00 00 00 0F E9 11 75 A6 75 A3 8D 06 20 8C A2 4E 00 32 32 39 01 00 00 00 00 03 FC A5 A5 39 01 00 00 00 00 03 F0 A5 A5 + /* tsp_vsync tsp_hsync*/ 39 01 00 00 00 00 03 F0 5A 5A 39 00 00 00 00 00 04 DF 83 00 10 39 00 00 00 00 00 02 B0 01 39 01 00 00 00 00 02 E6 01 39 01 00 00 00 00 03 F0 A5 A5 + /* flicker */ + 39 00 00 00 00 00 03 F0 5A 5A + 39 00 00 00 00 00 02 B0 08 + 39 00 00 00 00 00 02 D4 05 + 39 01 00 00 00 00 03 F0 A5 A5 + /* 3.7 Hporch Setting */ 39 01 00 00 00 00 03 F0 5A 5A 39 01 00 00 00 00 03 FC 5A 5A 39 00 00 00 00 00 02 B0 16 39 01 00 00 00 00 02 D1 2E 39 01 00 00 00 00 03 FC A5 A5 39 01 00 00 5A 00 03 F0 A5 A5 + /* Dimming Setting*/ 39 01 00 00 00 00 03 F0 5A 5A 39 00 00 00 00 00 02 B0 06 - 39 00 00 00 00 00 02 B7 20 + 39 00 00 00 00 00 02 B7 20 /* Dimming Speed Setting : 0x20 : 32Frames*/ 39 00 00 00 00 00 02 B0 05 - 39 01 00 00 00 00 02 B7 93 + 39 01 00 00 00 00 02 B7 93 /* 0x93 : ELVSS DIM ON */ 39 01 00 00 00 00 03 F0 A5 A5 - 39 00 00 00 00 00 02 53 20 - 39 01 00 00 00 00 03 51 00 00 + 39 01 00 00 00 00 02 53 20 + 39 01 00 00 00 00 03 51 00 00 /* Write Display Brightness */ + /* 5 Display On */ 05 01 00 00 00 00 02 29 00 - 39 01 00 00 00 00 02 60 10]; + /* 60hz Frequency Select*/ + 39 01 00 00 00 00 02 60 00]; qcom,mdss-dsi-off-command = [ 05 01 00 00 14 00 02 28 00 /* Default Frequency Setting */ @@ -139,7 +159,13 @@ qcom,mdss-dsi-off-command-state = "dsi_lp_mode"; qcom,mdss-dsi-timing-switch-command = [ - 39 01 00 00 00 00 02 60 10]; + 39 00 00 00 00 00 02 60 00 + 39 00 00 00 00 00 03 F0 5A 5A + 39 00 00 00 00 00 03 FC 5A 5A + 39 00 00 00 00 00 02 B0 16 + 39 00 00 00 00 00 02 D1 2E + 39 00 00 00 00 00 03 FC A5 A5 + 39 01 00 00 0C 00 03 F0 A5 A5]; qcom,mdss-dsi-timing-switch-command-state = "dsi_lp_mode"; qcom,mdss-dsi-nolp-command = [ @@ -148,9 +174,13 @@ 39 00 00 00 00 00 02 EE 06 39 00 00 00 00 00 02 B0 0B 39 00 00 00 00 00 03 D8 59 70 - 39 00 00 00 00 00 02 60 10 + 39 00 00 00 00 00 02 60 00 + 39 00 00 00 00 00 03 FC 5A 5A + 39 00 00 00 00 00 02 B0 16 + 39 00 00 00 00 00 02 D1 2E + 39 00 00 00 00 00 03 FC A5 A5 39 01 00 00 00 00 02 53 28 - 39 01 00 00 09 00 03 F0 A5 A5 + 39 01 00 00 11 00 03 F0 A5 A5 ]; qcom,mdss-dsi-nolp-command-state = "dsi_lp_mode"; @@ -163,16 +193,17 @@ qcom,mdss-dsc-block-prediction-enable; }; timing@1{ - qcom,mdss-dsi-panel-framerate = <60>; + qcom,mdss-dsi-cmd-mode; + qcom,mdss-dsi-panel-framerate = <120>; qcom,mdss-dsi-panel-width = <1080>; qcom,mdss-dsi-panel-height = <2400>; qcom,mdss-dsi-h-front-porch = <16>; qcom,mdss-dsi-h-back-porch = <8>; qcom,mdss-dsi-h-pulse-width = <8>; qcom,mdss-dsi-h-sync-skew = <0>; - qcom,mdss-dsi-v-back-porch = <560>; - qcom,mdss-dsi-v-front-porch = <600>; - qcom,mdss-dsi-v-pulse-width = <32>; + qcom,mdss-dsi-v-back-porch = <8>; + qcom,mdss-dsi-v-front-porch = <4>; + qcom,mdss-dsi-v-pulse-width = <4>; qcom,mdss-dsi-h-sync-pulse = <0>; qcom,mdss-dsi-h-left-border = <0>; qcom,mdss-dsi-h-right-border = <0>; @@ -182,10 +213,14 @@ qcom,mdss-dsi-panel-jitter = <0x5 0x1>; qcom,mdss-mdp-transfer-time-us = <7000>; qcom,mdss-dsi-on-command = [ - 05 01 00 00 0A 00 02 11 00 - 39 01 00 00 00 00 02 35 00 - 39 01 00 00 00 00 02 9D 01 - 39 01 00 00 00 00 81 9E + /* 1 Sleep Out */ + 05 01 00 00 0A 00 02 11 00 /* Sleep Out */ + /* 3 Common Setting */ + /* 3.1 TE(Vsync) On/Off */ + 39 01 00 00 00 00 02 35 00 /* TE On(Vsync) */ + /* DSC Setting */ + 39 01 00 00 00 00 02 9D 01 /* Compression Enable */ + 39 01 00 00 00 00 81 9E /* PPS Setting */ 11 00 00 89 30 80 09 60 04 38 00 08 02 1C 02 1C 02 00 02 0E 00 20 00 BB @@ -202,25 +237,30 @@ 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 - 39 00 00 00 00 00 05 2A 00 00 04 37 - 39 01 00 00 00 00 05 2B 00 00 09 5F + /* 3.2 CASET/PASET Setting */ + 39 00 00 00 00 00 05 2A 00 00 04 37 /* CASET */ + 39 01 00 00 00 00 05 2B 00 00 09 5F /* PASET */ + /* 3.3 11Bit Dimming Setting */ 39 01 00 00 00 00 03 F0 5A 5A - 39 00 00 00 00 00 02 B0 01 - 39 01 00 00 00 00 02 B7 4F + 39 00 00 00 00 00 02 B0 01 /* Global para */ + 39 01 00 00 00 00 02 B7 4F /* 11Bit Dimming On*/ 39 01 00 00 00 00 03 F0 A5 A5 + /* 3.4 Err FG Setting*/ 39 01 00 00 00 00 03 F0 5A 5A 39 00 00 00 00 00 02 B0 02 - 39 00 00 00 00 00 05 EC 00 C0 C3 43 + 39 00 00 00 00 00 05 EC 00 C2 C2 42 39 00 00 00 00 00 02 B0 0D 39 00 00 00 00 00 02 EC 19 39 00 00 00 00 00 02 B0 06 - 39 01 00 00 00 00 02 E4 D0 + 39 01 00 00 00 00 02 E4 10 39 01 00 00 00 00 03 F0 A5 A5 + /* 3.5 Ripple improvement Setting*/ 39 01 00 00 00 00 03 F0 5A 5A 39 00 00 00 00 00 02 B0 36 39 00 00 00 00 00 02 D3 0F 39 01 00 00 00 00 02 F7 03 39 01 00 00 00 00 03 F0 A5 A5 + /* 3.6 OFC (MIPI 1100Mbps/Lane, OSC 108.5Mhz)*/ 39 01 00 00 00 00 03 F0 5A 5A 39 01 00 00 00 00 03 FC 5A 5A 39 00 00 00 00 00 02 B0 01 @@ -228,28 +268,37 @@ 39 01 00 00 00 00 0F E9 11 75 A6 75 A3 8D 06 20 8C A2 4E 00 32 32 39 01 00 00 00 00 03 FC A5 A5 39 01 00 00 00 00 03 F0 A5 A5 + /* tsp_vsync tsp_hsync*/ 39 01 00 00 00 00 03 F0 5A 5A 39 00 00 00 00 00 04 DF 83 00 10 39 00 00 00 00 00 02 B0 01 39 01 00 00 00 00 02 E6 01 39 01 00 00 00 00 03 F0 A5 A5 + /* flicker */ + 39 00 00 00 00 00 03 F0 5A 5A + 39 00 00 00 00 00 02 B0 08 + 39 00 00 00 00 00 02 D4 05 + 39 01 00 00 00 00 03 F0 A5 A5 + /* 3.7 Hporch Setting */ 39 01 00 00 00 00 03 F0 5A 5A 39 01 00 00 00 00 03 FC 5A 5A 39 00 00 00 00 00 02 B0 16 39 01 00 00 00 00 02 D1 2E 39 01 00 00 00 00 03 FC A5 A5 39 01 00 00 5A 00 03 F0 A5 A5 + /* Dimming Setting*/ 39 01 00 00 00 00 03 F0 5A 5A 39 00 00 00 00 00 02 B0 06 - 39 00 00 00 00 00 02 B7 20 + 39 00 00 00 00 00 02 B7 20 /* Dimming Speed Setting : 0x20 : 32Frames*/ 39 00 00 00 00 00 02 B0 05 - 39 01 00 00 00 00 02 B7 93 + 39 01 00 00 00 00 02 B7 93 /* 0x93 : ELVSS DIM ON */ 39 01 00 00 00 00 03 F0 A5 A5 - 39 01 00 00 00 00 02 53 20 - 39 01 00 00 00 00 03 51 00 00 + 39 00 00 00 00 00 02 53 20 + 39 01 00 00 00 00 03 51 00 00 /* Write Display Brightness */ + /* 5 Display On */ 05 01 00 00 00 00 02 29 00 - 39 01 00 00 00 00 02 60 00 - ]; + /* 120hz Frequency Select*/ + 39 01 00 00 00 00 02 60 10]; qcom,mdss-dsi-off-command = [ 05 01 00 00 14 00 02 28 00 /* Default Frequency Setting */ @@ -259,7 +308,13 @@ qcom,mdss-dsi-off-command-state = "dsi_lp_mode"; qcom,mdss-dsi-timing-switch-command = [ - 39 01 00 00 00 00 02 60 00]; + 39 00 00 00 00 00 02 60 10 + 39 00 00 00 00 00 03 F0 5A 5A + 39 00 00 00 00 00 03 FC 5A 5A + 39 00 00 00 00 00 02 B0 16 + 39 00 00 00 00 00 02 D1 2E + 39 00 00 00 00 00 03 FC A5 A5 + 39 01 00 00 00 00 03 F0 A5 A5]; qcom,mdss-dsi-timing-switch-command-state = "dsi_lp_mode"; qcom,mdss-dsi-nolp-command = [ @@ -268,7 +323,11 @@ 39 00 00 00 00 00 02 EE 06 39 00 00 00 00 00 02 B0 0B 39 00 00 00 00 00 03 D8 59 70 - 39 00 00 00 00 00 02 60 00 + 39 00 00 00 00 00 02 60 10 + 39 00 00 00 00 00 03 FC 5A 5A + 39 00 00 00 00 00 02 B0 16 + 39 00 00 00 00 00 02 D1 2E + 39 00 00 00 00 00 03 FC A5 A5 39 01 00 00 00 00 02 53 28 39 01 00 00 09 00 03 F0 A5 A5 ]; @@ -287,16 +346,23 @@ }; &dsi_k11a_38_08_0a_dsc_cmd { + mi,panel-id = <0x4B3131 0x00380800>; + mi,mdss-dsi-bl-dcs-big-endian-type; mi,feature-enabled; mi,mdss-dsi-panel-hbm-51-ctrl-flag; mi,mdss-dsi-panel-hbm-off-51-index = <1>; - mi,esd-err-irq-gpio = <&tlmm 51 0x2002>; - mi,mdss-panel-on-dimming-delay = <120>; mi,mdss-dsi-pan-enable-smart-fps; mi,mdss-dsi-smart-fps-max_framerate = <120>; - mi,mdss-dsi-panel-hbm-brightness = <1>; + + mi,esd-err-irq-gpio = <&tlmm 75 0x2002>; + + mi,mdss-panel-on-dimming-delay = <120>; + mi,mdss-dsi-panel-dc-threshold = <440>; + mi,mdss-dsi-panel-max-brightness-clone = <8191>; + mi,mdss-dsi-panel-hbm-brightness = <1>; + qcom,mdss-dsi-display-timings { timing@0{ mi,mdss-dsi-dimmingon-command = [39 01 00 00 00 00 02 53 28]; @@ -316,34 +382,46 @@ mi,mdss-dsi-hbm-off-command-state = "dsi_lp_mode"; mi,mdss-dsi-doze-hbm-command = [ - 39 01 00 00 00 00 03 F0 5A 5A + 05 01 00 00 00 00 02 28 00 + 39 00 00 00 00 00 03 F0 5A 5A 39 00 00 00 00 00 02 60 00 + 39 00 00 00 00 00 03 FC 5A 5A + 39 00 00 00 00 00 02 B0 16 + 39 00 00 00 00 00 02 D1 2E + 39 00 00 00 00 00 03 FC A5 A5 39 00 00 00 00 00 02 B0 0B 39 00 00 00 00 00 03 D8 50 00 - 39 01 00 00 00 00 02 53 22 - 39 01 00 00 00 00 03 F0 5A 5A + 39 00 00 00 00 00 02 53 22 + 39 01 00 00 22 00 03 F0 A5 A5 + 05 01 00 00 00 00 02 29 00 ]; mi,mdss-dsi-doze-lbm-command = [ - 39 01 00 00 00 00 03 F0 5A 5A + 05 01 00 00 00 00 02 28 00 + 39 00 00 00 00 00 03 F0 5A 5A 39 00 00 00 00 00 02 60 00 + 39 00 00 00 00 00 03 FC 5A 5A + 39 00 00 00 00 00 02 B0 16 + 39 00 00 00 00 00 02 D1 2E + 39 00 00 00 00 00 03 FC A5 A5 39 00 00 00 00 00 02 B0 0B 39 00 00 00 00 00 03 D8 50 00 - 39 01 00 00 00 00 02 53 23 - 39 01 00 00 00 00 03 F0 5A 5A + 39 00 00 00 00 00 02 53 23 + 39 01 00 00 22 00 03 F0 A5 A5 + 05 01 00 00 00 00 02 29 00 ]; mi,mdss-dsi-doze-hbm-command-state = "dsi_lp_mode"; mi,mdss-dsi-doze-lbm-command-state = "dsi_lp_mode"; mi,mdss-dsi-flat-mode-on-command = [ - 39 01 00 00 00 00 03 F0 5A 5A - 39 00 00 00 00 00 1D C2 2D 27 FE 82 C6 70 82 70 CA 0A 0A 0A 28 28 28 35 35 35 3F 3F 3F 42 42 42 1B DA 2F 48 - 39 01 00 00 00 00 02 F7 03 + 39 00 00 00 00 00 03 F0 5A 5A + 39 00 00 00 00 00 03 C2 2D 27 + 39 00 00 00 00 00 02 F7 03 39 01 00 00 09 00 03 F0 A5 A5 ]; mi,mdss-dsi-flat-mode-off-command = [ - 39 01 00 00 00 00 03 F0 5A 5A - 39 00 00 00 00 00 1D C2 2D 07 FE 82 C6 70 82 70 CA 0A 0A 0A 28 28 28 35 35 35 3F 3F 3F 42 42 42 1B DA 2F 48 - 39 01 00 00 00 00 02 F7 03 + 39 00 00 00 00 00 03 F0 5A 5A + 39 00 00 00 00 00 03 C2 2D 07 + 39 00 00 00 00 00 02 F7 03 39 01 00 00 09 00 03 F0 A5 A5 ]; mi,mdss-dsi-flat-mode-on-command-state = "dsi_lp_mode"; @@ -377,34 +455,46 @@ mi,mdss-dsi-hbm-off-command-state = "dsi_lp_mode"; mi,mdss-dsi-doze-hbm-command = [ - 39 01 00 00 00 00 03 F0 5A 5A + 05 01 00 00 00 00 02 28 00 + 39 00 00 00 00 00 03 F0 5A 5A 39 00 00 00 00 00 02 60 00 + 39 00 00 00 00 00 03 FC 5A 5A + 39 00 00 00 00 00 02 B0 16 + 39 00 00 00 00 00 02 D1 2E + 39 00 00 00 00 00 03 FC A5 A5 39 00 00 00 00 00 02 B0 0B 39 00 00 00 00 00 03 D8 50 00 - 39 01 00 00 00 00 02 53 22 - 39 01 00 00 00 00 03 F0 5A 5A + 39 00 00 00 00 00 02 53 22 + 39 01 00 00 22 00 03 F0 A5 A5 + 05 01 00 00 00 00 02 29 00 ]; mi,mdss-dsi-doze-lbm-command = [ - 39 01 00 00 00 00 03 F0 5A 5A + 05 01 00 00 00 00 02 28 00 + 39 00 00 00 00 00 03 F0 5A 5A 39 00 00 00 00 00 02 60 00 + 39 00 00 00 00 00 03 FC 5A 5A + 39 00 00 00 00 00 02 B0 16 + 39 00 00 00 00 00 02 D1 2E + 39 00 00 00 00 00 03 FC A5 A5 39 00 00 00 00 00 02 B0 0B 39 00 00 00 00 00 03 D8 50 00 - 39 01 00 00 00 00 02 53 23 - 39 01 00 00 00 00 03 F0 5A 5A + 39 00 00 00 00 00 02 53 23 + 39 01 00 00 22 00 03 F0 A5 A5 + 05 01 00 00 00 00 02 29 00 ]; mi,mdss-dsi-doze-hbm-command-state = "dsi_lp_mode"; mi,mdss-dsi-doze-lbm-command-state = "dsi_lp_mode"; mi,mdss-dsi-flat-mode-on-command = [ - 39 01 00 00 00 00 03 F0 5A 5A - 39 00 00 00 00 00 1D C2 2D 27 FE 82 C6 70 82 70 CA 0A 0A 0A 28 28 28 35 35 35 3F 3F 3F 42 42 42 1B DA 2F 48 - 39 01 00 00 00 00 02 F7 03 + 39 00 00 00 00 00 03 F0 5A 5A + 39 00 00 00 00 00 03 C2 2D 27 + 39 00 00 00 00 00 02 F7 03 39 01 00 00 09 00 03 F0 A5 A5 ]; mi,mdss-dsi-flat-mode-off-command = [ - 39 01 00 00 00 00 03 F0 5A 5A - 39 00 00 00 00 00 1D C2 2D 07 FE 82 C6 70 82 70 CA 0A 0A 0A 28 28 28 35 35 35 3F 3F 3F 42 42 42 1B DA 2F 48 - 39 01 00 00 00 00 02 F7 03 + 39 00 00 00 00 00 03 F0 5A 5A + 39 00 00 00 00 00 03 C2 2D 07 + 39 00 00 00 00 00 02 F7 03 39 01 00 00 09 00 03 F0 A5 A5 ]; mi,mdss-dsi-flat-mode-on-command-state = "dsi_lp_mode"; @@ -422,3 +512,4 @@ }; }; }; + diff --git a/arch/arm64/boot/dts/vendor/qcom/kona-sde-display.dtsi b/arch/arm64/boot/dts/vendor/qcom/kona-sde-display.dtsi index 0aa4d7ac95a4..b87ae33b993a 100755 --- a/arch/arm64/boot/dts/vendor/qcom/kona-sde-display.dtsi +++ b/arch/arm64/boot/dts/vendor/qcom/kona-sde-display.dtsi @@ -1338,24 +1338,21 @@ }; &dsi_k11a_38_08_0a_dsc_cmd { - qcom,ulps-enabled; - qcom,suspend-ulps-enabled; - qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0", - "src_byte_clk0", "src_pixel_clk0", - "shadow_bype_clk0", "shadow_pixel_clk0"; - qcom,mdss-dsi-clk-strength = <0xFF>; + //qcom,ulps-enabled; + qcom,dsi-select-clocks = "mux_byte_clk0", "mux_pixel_clk0"; + + qcom,mdss-dsi-clk-strength = <0x65>; qcom,mdss-dsi-display-timings { - /* 120 Hz */ + /* 60 Hz */ timing@0{ - qcom,mdss-dsi-panel-phy-timings = [00 24 0A 0A 26 24 0A - 0A 06 02 04 00 1E 1A]; + qcom,mdss-dsi-panel-phy-timings = [00 24 0A 0A 1A 19 09 + 0A 09 02 04 00 1E 0F]; qcom,display-topology = <1 1 1>; qcom,default-topology-index = <0>; }; - /* 60 Hz */ timing@1{ - qcom,mdss-dsi-panel-phy-timings = [00 24 0A 0A 26 24 0A - 0A 06 02 04 00 1E 1A]; + qcom,mdss-dsi-panel-phy-timings = [00 24 0A 0A 1A 19 09 + 0A 09 02 04 00 1E 0F]; qcom,display-topology = <1 1 1>; qcom,default-topology-index = <0>; };