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[bot] AutoMerging: merge all upstream's changes:
* https://github.com/coolsnowwolf/lede: kernel: backport MGLRU to linux 6.0 for Tianling Shen Kernel: bump 5.10 to 5.10.148 (coolsnowwolf#10259) kernel: bump 5.19 to 5.19.16 kernel: bump 6.0 to 6.0.2
2 parents 25b0783 + 9f74489 commit 65ec9e6

17 files changed

+7095
-6
lines changed

‎include/kernel-5.10

+2-2
Original file line numberDiff line numberDiff line change
@@ -1,2 +1,2 @@
1-
LINUX_VERSION-5.10 = .147
2-
LINUX_KERNEL_HASH-5.10.147 = 85253abf097eb5013b988a400eb022eed0e0626e7e0a7daa3ab4b6bcabbced9a
1+
LINUX_VERSION-5.10 = .148
2+
LINUX_KERNEL_HASH-5.10.148 = 12523f6be221067094ec541b196bce70493f7f44f031b3c4711d82e290c6e956

‎include/kernel-5.19

+2-2
Original file line numberDiff line numberDiff line change
@@ -1,2 +1,2 @@
1-
LINUX_VERSION-5.19 = .15
2-
LINUX_KERNEL_HASH-5.19.15 = 4686e33847db3ec58e1043bc0c806472aae694b2c413bb7d8da91a5c9a55eb1b
1+
LINUX_VERSION-5.19 = .16
2+
LINUX_KERNEL_HASH-5.19.16 = a1ebaf667e1059ae2d72aa6374a4d6e2febc0b8ccda6a124687acc2ea961e08d

‎include/kernel-6.0

+2-2
Original file line numberDiff line numberDiff line change
@@ -1,2 +1,2 @@
1-
LINUX_VERSION-6.0 = .1
2-
LINUX_KERNEL_HASH-6.0.1 = 8ede745a69351ea0f27fe0c48780d4efa37ff086135e129358ce09694957e8f9
1+
LINUX_VERSION-6.0 = .2
2+
LINUX_KERNEL_HASH-6.0.2 = a13c26388cacccb684cd9f51109596a280c8186b7e95174d31ee7c5718e95c9d

‎target/linux/generic/backport-6.0/100-mm-x86-arm64-add-arch_has_hw_pte_young.patch

+154
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@@ -0,0 +1,154 @@
1+
From e3264035bdac67898d685423ffb2f3a9c3a5964a Mon Sep 17 00:00:00 2001
2+
From: Yu Zhao <[email protected]>
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Date: Wed, 4 Aug 2021 01:31:34 -0600
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Subject: [PATCH 01/14] mm: x86, arm64: add arch_has_hw_pte_young()
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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Some architectures automatically set the accessed bit in PTEs, e.g.,
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x86 and arm64 v8.2. On architectures that do not have this capability,
11+
clearing the accessed bit in a PTE usually triggers a page fault
12+
following the TLB miss of this PTE (to emulate the accessed bit).
13+
14+
Being aware of this capability can help make better decisions, e.g.,
15+
whether to spread the work out over a period of time to reduce bursty
16+
page faults when trying to clear the accessed bit in many PTEs.
17+
18+
Note that theoretically this capability can be unreliable, e.g.,
19+
hotplugged CPUs might be different from builtin ones. Therefore it
20+
should not be used in architecture-independent code that involves
21+
correctness, e.g., to determine whether TLB flushes are required (in
22+
combination with the accessed bit).
23+
24+
Signed-off-by: Yu Zhao <[email protected]>
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Reviewed-by: Barry Song <[email protected]>
26+
Acked-by: Brian Geffon <[email protected]>
27+
Acked-by: Jan Alexander Steffens (heftig) <[email protected]>
28+
Acked-by: Oleksandr Natalenko <[email protected]>
29+
Acked-by: Steven Barrett <[email protected]>
30+
Acked-by: Suleiman Souhlal <[email protected]>
31+
Acked-by: Will Deacon <[email protected]>
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Tested-by: Daniel Byrne <[email protected]>
33+
Tested-by: Donald Carr <[email protected]>
34+
Tested-by: Holger Hoffstätte <[email protected]>
35+
Tested-by: Konstantin Kharlamov <[email protected]>
36+
Tested-by: Shuang Zhai <[email protected]>
37+
Tested-by: Sofia Trinh <[email protected]>
38+
Tested-by: Vaibhav Jain <[email protected]>
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Change-Id: Ib49b44fb56df3333a2ff1fcc496fb1980b976e7a
40+
---
41+
arch/arm64/include/asm/pgtable.h | 15 ++-------------
42+
arch/x86/include/asm/pgtable.h | 6 +++---
43+
include/linux/pgtable.h | 13 +++++++++++++
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mm/memory.c | 14 +-------------
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4 files changed, 19 insertions(+), 29 deletions(-)
46+
47+
diff --git a/arch/arm64/include/asm/pgtable.h b/arch/arm64/include/asm/pgtable.h
48+
index b5df82aa99e6..71a1af42f0e8 100644
49+
--- a/arch/arm64/include/asm/pgtable.h
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+++ b/arch/arm64/include/asm/pgtable.h
51+
@@ -1082,24 +1082,13 @@ static inline void update_mmu_cache(struct vm_area_struct *vma,
52+
* page after fork() + CoW for pfn mappings. We don't always have a
53+
* hardware-managed access flag on arm64.
54+
*/
55+
-static inline bool arch_faults_on_old_pte(void)
56+
-{
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- /* The register read below requires a stable CPU to make any sense */
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- cant_migrate();
59+
-
60+
- return !cpu_has_hw_af();
61+
-}
62+
-#define arch_faults_on_old_pte arch_faults_on_old_pte
63+
+#define arch_has_hw_pte_young cpu_has_hw_af
64+
65+
/*
66+
* Experimentally, it's cheap to set the access flag in hardware and we
67+
* benefit from prefaulting mappings as 'old' to start with.
68+
*/
69+
-static inline bool arch_wants_old_prefaulted_pte(void)
70+
-{
71+
- return !arch_faults_on_old_pte();
72+
-}
73+
-#define arch_wants_old_prefaulted_pte arch_wants_old_prefaulted_pte
74+
+#define arch_wants_old_prefaulted_pte cpu_has_hw_af
75+
76+
static inline bool pud_sect_supported(void)
77+
{
78+
diff --git a/arch/x86/include/asm/pgtable.h b/arch/x86/include/asm/pgtable.h
79+
index 44e2d6f1dbaa..dc5f7d8ef68a 100644
80+
--- a/arch/x86/include/asm/pgtable.h
81+
+++ b/arch/x86/include/asm/pgtable.h
82+
@@ -1431,10 +1431,10 @@ static inline bool arch_has_pfn_modify_check(void)
83+
return boot_cpu_has_bug(X86_BUG_L1TF);
84+
}
85+
86+
-#define arch_faults_on_old_pte arch_faults_on_old_pte
87+
-static inline bool arch_faults_on_old_pte(void)
88+
+#define arch_has_hw_pte_young arch_has_hw_pte_young
89+
+static inline bool arch_has_hw_pte_young(void)
90+
{
91+
- return false;
92+
+ return true;
93+
}
94+
95+
#ifdef CONFIG_PAGE_TABLE_CHECK
96+
diff --git a/include/linux/pgtable.h b/include/linux/pgtable.h
97+
index 014ee8f0fbaa..95f408df4695 100644
98+
--- a/include/linux/pgtable.h
99+
+++ b/include/linux/pgtable.h
100+
@@ -260,6 +260,19 @@ static inline int pmdp_clear_flush_young(struct vm_area_struct *vma,
101+
#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
102+
#endif
103+
104+
+#ifndef arch_has_hw_pte_young
105+
+/*
106+
+ * Return whether the accessed bit is supported on the local CPU.
107+
+ *
108+
+ * This stub assumes accessing through an old PTE triggers a page fault.
109+
+ * Architectures that automatically set the access bit should overwrite it.
110+
+ */
111+
+static inline bool arch_has_hw_pte_young(void)
112+
+{
113+
+ return false;
114+
+}
115+
+#endif
116+
+
117+
#ifndef __HAVE_ARCH_PTEP_GET_AND_CLEAR
118+
static inline pte_t ptep_get_and_clear(struct mm_struct *mm,
119+
unsigned long address,
120+
diff --git a/mm/memory.c b/mm/memory.c
121+
index a78814413ac0..68294ce1cb06 100644
122+
--- a/mm/memory.c
123+
+++ b/mm/memory.c
124+
@@ -125,18 +125,6 @@ int randomize_va_space __read_mostly =
125+
2;
126+
#endif
127+
128+
-#ifndef arch_faults_on_old_pte
129+
-static inline bool arch_faults_on_old_pte(void)
130+
-{
131+
- /*
132+
- * Those arches which don't have hw access flag feature need to
133+
- * implement their own helper. By default, "true" means pagefault
134+
- * will be hit on old pte.
135+
- */
136+
- return true;
137+
-}
138+
-#endif
139+
-
140+
#ifndef arch_wants_old_prefaulted_pte
141+
static inline bool arch_wants_old_prefaulted_pte(void)
142+
{
143+
@@ -2870,7 +2858,7 @@ static inline bool __wp_page_copy_user(struct page *dst, struct page *src,
144+
* On architectures with software "accessed" bits, we would
145+
* take a double page fault, so mark it accessed here.
146+
*/
147+
- if (arch_faults_on_old_pte() && !pte_young(vmf->orig_pte)) {
148+
+ if (!arch_has_hw_pte_young() && !pte_young(vmf->orig_pte)) {
149+
pte_t entry;
150+
151+
vmf->pte = pte_offset_map_lock(mm, vmf->pmd, addr, &vmf->ptl);
152+
--
153+
2.17.1
154+

‎target/linux/generic/backport-6.0/101-mm-x86-add-CONFIG_ARCH_HAS_NONLEAF_PMD_YOUNG.patch

+145
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@@ -0,0 +1,145 @@
1+
From 0c0016e6f53b52166fe4da61c81fa6b27f4650cd Mon Sep 17 00:00:00 2001
2+
From: Yu Zhao <[email protected]>
3+
Date: Sat, 26 Sep 2020 21:17:18 -0600
4+
Subject: [PATCH 02/14] mm: x86: add CONFIG_ARCH_HAS_NONLEAF_PMD_YOUNG
5+
MIME-Version: 1.0
6+
Content-Type: text/plain; charset=UTF-8
7+
Content-Transfer-Encoding: 8bit
8+
9+
Some architectures support the accessed bit in non-leaf PMD entries,
10+
e.g., x86 sets the accessed bit in a non-leaf PMD entry when using it
11+
as part of linear address translation [1]. Page table walkers that
12+
clear the accessed bit may use this capability to reduce their search
13+
space.
14+
15+
Note that:
16+
1. Although an inline function is preferable, this capability is added
17+
as a configuration option for consistency with the existing macros.
18+
2. Due to the little interest in other varieties, this capability was
19+
only tested on Intel and AMD CPUs.
20+
21+
Thanks to the following developers for their efforts [2][3].
22+
Randy Dunlap <[email protected]>
23+
Stephen Rothwell <[email protected]>
24+
25+
[1]: Intel 64 and IA-32 Architectures Software Developer's Manual
26+
Volume 3 (June 2021), section 4.8
27+
[2] https://lore.kernel.org/r/[email protected]/
28+
[3] https://lore.kernel.org/r/[email protected]/
29+
30+
Signed-off-by: Yu Zhao <[email protected]>
31+
Reviewed-by: Barry Song <[email protected]>
32+
Acked-by: Brian Geffon <[email protected]>
33+
Acked-by: Jan Alexander Steffens (heftig) <[email protected]>
34+
Acked-by: Oleksandr Natalenko <[email protected]>
35+
Acked-by: Steven Barrett <[email protected]>
36+
Acked-by: Suleiman Souhlal <[email protected]>
37+
Tested-by: Daniel Byrne <[email protected]>
38+
Tested-by: Donald Carr <[email protected]>
39+
Tested-by: Holger Hoffstätte <[email protected]>
40+
Tested-by: Konstantin Kharlamov <[email protected]>
41+
Tested-by: Shuang Zhai <[email protected]>
42+
Tested-by: Sofia Trinh <[email protected]>
43+
Tested-by: Vaibhav Jain <[email protected]>
44+
Change-Id: I1a17be3ae926f721f7b17ea1539e5c39e8c4f9a8
45+
---
46+
arch/Kconfig | 8 ++++++++
47+
arch/x86/Kconfig | 1 +
48+
arch/x86/include/asm/pgtable.h | 3 ++-
49+
arch/x86/mm/pgtable.c | 5 ++++-
50+
include/linux/pgtable.h | 4 ++--
51+
5 files changed, 17 insertions(+), 4 deletions(-)
52+
53+
diff --git a/arch/Kconfig b/arch/Kconfig
54+
index 8b311e400ec1..bf19a84fffa2 100644
55+
--- a/arch/Kconfig
56+
+++ b/arch/Kconfig
57+
@@ -1418,6 +1418,14 @@ config DYNAMIC_SIGFRAME
58+
config HAVE_ARCH_NODE_DEV_GROUP
59+
bool
60+
61+
+config ARCH_HAS_NONLEAF_PMD_YOUNG
62+
+ bool
63+
+ help
64+
+ Architectures that select this option are capable of setting the
65+
+ accessed bit in non-leaf PMD entries when using them as part of linear
66+
+ address translations. Page table walkers that clear the accessed bit
67+
+ may use this capability to reduce their search space.
68+
+
69+
source "kernel/gcov/Kconfig"
70+
71+
source "scripts/gcc-plugins/Kconfig"
72+
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
73+
index f9920f1341c8..674d694a665e 100644
74+
--- a/arch/x86/Kconfig
75+
+++ b/arch/x86/Kconfig
76+
@@ -85,6 +85,7 @@ config X86
77+
select ARCH_HAS_PMEM_API if X86_64
78+
select ARCH_HAS_PTE_DEVMAP if X86_64
79+
select ARCH_HAS_PTE_SPECIAL
80+
+ select ARCH_HAS_NONLEAF_PMD_YOUNG if PGTABLE_LEVELS > 2
81+
select ARCH_HAS_UACCESS_FLUSHCACHE if X86_64
82+
select ARCH_HAS_COPY_MC if X86_64
83+
select ARCH_HAS_SET_MEMORY
84+
diff --git a/arch/x86/include/asm/pgtable.h b/arch/x86/include/asm/pgtable.h
85+
index dc5f7d8ef68a..5059799bebe3 100644
86+
--- a/arch/x86/include/asm/pgtable.h
87+
+++ b/arch/x86/include/asm/pgtable.h
88+
@@ -815,7 +815,8 @@ static inline unsigned long pmd_page_vaddr(pmd_t pmd)
89+
90+
static inline int pmd_bad(pmd_t pmd)
91+
{
92+
- return (pmd_flags(pmd) & ~_PAGE_USER) != _KERNPG_TABLE;
93+
+ return (pmd_flags(pmd) & ~(_PAGE_USER | _PAGE_ACCESSED)) !=
94+
+ (_KERNPG_TABLE & ~_PAGE_ACCESSED);
95+
}
96+
97+
static inline unsigned long pages_to_mb(unsigned long npg)
98+
diff --git a/arch/x86/mm/pgtable.c b/arch/x86/mm/pgtable.c
99+
index a932d7712d85..8525f2876fb4 100644
100+
--- a/arch/x86/mm/pgtable.c
101+
+++ b/arch/x86/mm/pgtable.c
102+
@@ -550,7 +550,7 @@ int ptep_test_and_clear_young(struct vm_area_struct *vma,
103+
return ret;
104+
}
105+
106+
-#ifdef CONFIG_TRANSPARENT_HUGEPAGE
107+
+#if defined(CONFIG_TRANSPARENT_HUGEPAGE) || defined(CONFIG_ARCH_HAS_NONLEAF_PMD_YOUNG)
108+
int pmdp_test_and_clear_young(struct vm_area_struct *vma,
109+
unsigned long addr, pmd_t *pmdp)
110+
{
111+
@@ -562,6 +562,9 @@ int pmdp_test_and_clear_young(struct vm_area_struct *vma,
112+
113+
return ret;
114+
}
115+
+#endif
116+
+
117+
+#ifdef CONFIG_TRANSPARENT_HUGEPAGE
118+
int pudp_test_and_clear_young(struct vm_area_struct *vma,
119+
unsigned long addr, pud_t *pudp)
120+
{
121+
diff --git a/include/linux/pgtable.h b/include/linux/pgtable.h
122+
index 95f408df4695..d9095251bffd 100644
123+
--- a/include/linux/pgtable.h
124+
+++ b/include/linux/pgtable.h
125+
@@ -213,7 +213,7 @@ static inline int ptep_test_and_clear_young(struct vm_area_struct *vma,
126+
#endif
127+
128+
#ifndef __HAVE_ARCH_PMDP_TEST_AND_CLEAR_YOUNG
129+
-#ifdef CONFIG_TRANSPARENT_HUGEPAGE
130+
+#if defined(CONFIG_TRANSPARENT_HUGEPAGE) || defined(CONFIG_ARCH_HAS_NONLEAF_PMD_YOUNG)
131+
static inline int pmdp_test_and_clear_young(struct vm_area_struct *vma,
132+
unsigned long address,
133+
pmd_t *pmdp)
134+
@@ -234,7 +234,7 @@ static inline int pmdp_test_and_clear_young(struct vm_area_struct *vma,
135+
BUILD_BUG();
136+
return 0;
137+
}
138+
-#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
139+
+#endif /* CONFIG_TRANSPARENT_HUGEPAGE || CONFIG_ARCH_HAS_NONLEAF_PMD_YOUNG */
140+
#endif
141+
142+
#ifndef __HAVE_ARCH_PTEP_CLEAR_YOUNG_FLUSH
143+
--
144+
2.17.1
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