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Guoniu.zhouDong Aisheng
Guoniu.zhou
authored and
Dong Aisheng
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media: i2c: fix the incomplete first frame issue
VSYNC signal trigger before a frame end when ov5640 work at MIPI mode. It leads to the first frame content only hav some lines of image. I tried many configuration and finally have the patch to fix the issue. My thought is suspending sensor when update its registers and resume after update. Signed-off-by: Guoniu.zhou <[email protected]>
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drivers/media/i2c/ov5640.c

+21-3
Original file line numberDiff line numberDiff line change
@@ -154,6 +154,7 @@ static const int ov5640_framerates[] = {
154154
[OV5640_15_FPS] = 15,
155155
[OV5640_30_FPS] = 30,
156156
[OV5640_60_FPS] = 60,
157+
[OV5640_07_FPS] = 8,
157158
};
158159

159160
/* regulator supplies */
@@ -358,6 +359,7 @@ static const struct reg_value ov5640_init_setting_30fps_VGA[] = {
358359
};
359360

360361
static const struct reg_value ov5640_setting_VGA_640_480[] = {
362+
{0x3008, 0x42, 0, 0},
361363
{0x3c07, 0x08, 0, 0},
362364
{0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
363365
{0x3814, 0x31, 0, 0},
@@ -374,6 +376,7 @@ static const struct reg_value ov5640_setting_VGA_640_480[] = {
374376
{0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0},
375377
{0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},
376378
{0x3824, 0x02, 0, 0}, {0x5001, 0xa3, 0, 0},
379+
{0x3008, 0x02, 0, 10},
377380
};
378381

379382
static const struct reg_value ov5640_setting_XGA_1024_768[] = {
@@ -398,6 +401,7 @@ static const struct reg_value ov5640_setting_XGA_1024_768[] = {
398401
};
399402

400403
static const struct reg_value ov5640_setting_QVGA_320_240[] = {
404+
{0x3008, 0x42, 0, 0},
401405
{0x3c07, 0x08, 0, 0},
402406
{0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
403407
{0x3814, 0x31, 0, 0},
@@ -414,9 +418,11 @@ static const struct reg_value ov5640_setting_QVGA_320_240[] = {
414418
{0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0},
415419
{0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},
416420
{0x3824, 0x02, 0, 0}, {0x5001, 0xa3, 0, 0},
421+
{0x3008, 0x02, 0, 10},
417422
};
418423

419424
static const struct reg_value ov5640_setting_QCIF_176_144[] = {
425+
{0x3008, 0x42, 0, 0},
420426
{0x3c07, 0x08, 0, 0},
421427
{0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
422428
{0x3814, 0x31, 0, 0},
@@ -433,9 +439,11 @@ static const struct reg_value ov5640_setting_QCIF_176_144[] = {
433439
{0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0},
434440
{0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},
435441
{0x3824, 0x02, 0, 0}, {0x5001, 0xa3, 0, 0},
442+
{0x3008, 0x02, 0, 10},
436443
};
437444

438445
static const struct reg_value ov5640_setting_NTSC_720_480[] = {
446+
{0x3008, 0x42, 0, 0},
439447
{0x3c07, 0x08, 0, 0},
440448
{0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
441449
{0x3814, 0x31, 0, 0},
@@ -452,9 +460,11 @@ static const struct reg_value ov5640_setting_NTSC_720_480[] = {
452460
{0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0},
453461
{0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},
454462
{0x3824, 0x02, 0, 0}, {0x5001, 0xa3, 0, 0},
463+
{0x3008, 0x02, 0, 10},
455464
};
456465

457466
static const struct reg_value ov5640_setting_PAL_720_576[] = {
467+
{0x3008, 0x42, 0, 0},
458468
{0x3c07, 0x08, 0, 0},
459469
{0x3c09, 0x1c, 0, 0}, {0x3c0a, 0x9c, 0, 0}, {0x3c0b, 0x40, 0, 0},
460470
{0x3814, 0x31, 0, 0},
@@ -471,6 +481,7 @@ static const struct reg_value ov5640_setting_PAL_720_576[] = {
471481
{0x4001, 0x02, 0, 0}, {0x4004, 0x02, 0, 0},
472482
{0x4407, 0x04, 0, 0}, {0x460b, 0x35, 0, 0}, {0x460c, 0x22, 0, 0},
473483
{0x3824, 0x02, 0, 0}, {0x5001, 0xa3, 0, 0},
484+
{0x3008, 0x02, 0, 10},
474485
};
475486

476487
static const struct reg_value ov5640_setting_720P_1280_720[] = {
@@ -523,7 +534,7 @@ static const struct reg_value ov5640_setting_1080P_1920_1080[] = {
523534
{0x3a0e, 0x03, 0, 0}, {0x3a0d, 0x04, 0, 0}, {0x3a14, 0x04, 0, 0},
524535
{0x3a15, 0x60, 0, 0}, {0x4407, 0x04, 0, 0},
525536
{0x460b, 0x37, 0, 0}, {0x460c, 0x20, 0, 0}, {0x3824, 0x04, 0, 0},
526-
{0x4005, 0x1a, 0, 0}, {0x3008, 0x02, 0, 0},
537+
{0x4005, 0x1a, 0, 0}, {0x3008, 0x02, 0, 10},
527538
};
528539

529540
static const struct reg_value ov5640_setting_QSXGA_2592_1944[] = {
@@ -1268,7 +1279,7 @@ static int ov5640_set_stream_dvp(struct ov5640_dev *sensor, bool on)
12681279
* 2: MIPI enable
12691280
*/
12701281
ret = ov5640_write_reg(sensor,
1271-
OV5640_REG_IO_MIPI_CTRL00, on ? 0x18 : 0);
1282+
OV5640_REG_IO_MIPI_CTRL00, on ? 0x58 : 0);
12721283
if (ret)
12731284
return ret;
12741285

@@ -1617,8 +1628,15 @@ ov5640_find_mode(struct ov5640_dev *sensor, enum ov5640_frame_rate fr,
16171628
if (((mode->id == OV5640_MODE_1080P_1920_1080) && (fr != OV5640_15_FPS)) ||
16181629
((mode->id == OV5640_MODE_QSXGA_2592_1944) && (fr != OV5640_07_FPS)))
16191630
return NULL;
1631+
/*
1632+
* MIPI mode only support 2592x1944@15
1633+
*/
1634+
} else if (sensor->ep.bus_type == V4L2_MBUS_CSI2_DPHY) {
1635+
if ((mode->id == OV5640_MODE_QSXGA_2592_1944) && (fr != OV5640_15_FPS))
1636+
return NULL;
16201637
}
16211638

1639+
16221640
if (!mode ||
16231641
(!nearest && (mode->hact != width || mode->vact != height)))
16241642
return NULL;
@@ -2027,7 +2045,7 @@ static int ov5640_set_power(struct ov5640_dev *sensor, bool on)
20272045
* [2] = 0 : MIPI interface disabled
20282046
*/
20292047
ret = ov5640_write_reg(sensor,
2030-
OV5640_REG_IO_MIPI_CTRL00, 0x40);
2048+
OV5640_REG_IO_MIPI_CTRL00, 0x45);
20312049
if (ret)
20322050
goto power_off;
20332051

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