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chenyu56gregkh
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usb: dwc3: Add splitdisable quirk for Hisilicon Kirin Soc
[ Upstream commit f580170 ] SPLIT_BOUNDARY_DISABLE should be set for DesignWare USB3 DRD Core of Hisilicon Kirin Soc when dwc3 core act as host. [mchehab: dropped a dev_dbg() as only traces are now allowwed on this driver] Signed-off-by: Yu Chen <[email protected]> Signed-off-by: Mauro Carvalho Chehab <[email protected]> Signed-off-by: Felipe Balbi <[email protected]> Signed-off-by: Sasha Levin <[email protected]>
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drivers/usb/dwc3/core.c

+25
Original file line numberDiff line numberDiff line change
@@ -117,6 +117,7 @@ static void __dwc3_set_mode(struct work_struct *work)
117117
struct dwc3 *dwc = work_to_dwc(work);
118118
unsigned long flags;
119119
int ret;
120+
u32 reg;
120121

121122
if (dwc->dr_mode != USB_DR_MODE_OTG)
122123
return;
@@ -168,6 +169,11 @@ static void __dwc3_set_mode(struct work_struct *work)
168169
otg_set_vbus(dwc->usb2_phy->otg, true);
169170
phy_set_mode(dwc->usb2_generic_phy, PHY_MODE_USB_HOST);
170171
phy_set_mode(dwc->usb3_generic_phy, PHY_MODE_USB_HOST);
172+
if (dwc->dis_split_quirk) {
173+
reg = dwc3_readl(dwc->regs, DWC3_GUCTL3);
174+
reg |= DWC3_GUCTL3_SPLITDISABLE;
175+
dwc3_writel(dwc->regs, DWC3_GUCTL3, reg);
176+
}
171177
}
172178
break;
173179
case DWC3_GCTL_PRTCAP_DEVICE:
@@ -1323,6 +1329,9 @@ static void dwc3_get_properties(struct dwc3 *dwc)
13231329
dwc->dis_metastability_quirk = device_property_read_bool(dev,
13241330
"snps,dis_metastability_quirk");
13251331

1332+
dwc->dis_split_quirk = device_property_read_bool(dev,
1333+
"snps,dis-split-quirk");
1334+
13261335
dwc->lpm_nyet_threshold = lpm_nyet_threshold;
13271336
dwc->tx_de_emphasis = tx_de_emphasis;
13281337

@@ -1835,10 +1844,26 @@ static int dwc3_resume(struct device *dev)
18351844

18361845
return 0;
18371846
}
1847+
1848+
static void dwc3_complete(struct device *dev)
1849+
{
1850+
struct dwc3 *dwc = dev_get_drvdata(dev);
1851+
u32 reg;
1852+
1853+
if (dwc->current_dr_role == DWC3_GCTL_PRTCAP_HOST &&
1854+
dwc->dis_split_quirk) {
1855+
reg = dwc3_readl(dwc->regs, DWC3_GUCTL3);
1856+
reg |= DWC3_GUCTL3_SPLITDISABLE;
1857+
dwc3_writel(dwc->regs, DWC3_GUCTL3, reg);
1858+
}
1859+
}
1860+
#else
1861+
#define dwc3_complete NULL
18381862
#endif /* CONFIG_PM_SLEEP */
18391863

18401864
static const struct dev_pm_ops dwc3_dev_pm_ops = {
18411865
SET_SYSTEM_SLEEP_PM_OPS(dwc3_suspend, dwc3_resume)
1866+
.complete = dwc3_complete,
18421867
SET_RUNTIME_PM_OPS(dwc3_runtime_suspend, dwc3_runtime_resume,
18431868
dwc3_runtime_idle)
18441869
};

drivers/usb/dwc3/core.h

+7
Original file line numberDiff line numberDiff line change
@@ -136,6 +136,7 @@
136136
#define DWC3_GEVNTCOUNT(n) (0xc40c + ((n) * 0x10))
137137

138138
#define DWC3_GHWPARAMS8 0xc600
139+
#define DWC3_GUCTL3 0xc60c
139140
#define DWC3_GFLADJ 0xc630
140141

141142
/* Device Registers */
@@ -375,6 +376,9 @@
375376
/* Global User Control Register 2 */
376377
#define DWC3_GUCTL2_RST_ACTBITLATER BIT(14)
377378

379+
/* Global User Control Register 3 */
380+
#define DWC3_GUCTL3_SPLITDISABLE BIT(14)
381+
378382
/* Device Configuration Register */
379383
#define DWC3_DCFG_DEVADDR(addr) ((addr) << 3)
380384
#define DWC3_DCFG_DEVADDR_MASK DWC3_DCFG_DEVADDR(0x7f)
@@ -1038,6 +1042,7 @@ struct dwc3_scratchpad_array {
10381042
* 2 - No de-emphasis
10391043
* 3 - Reserved
10401044
* @dis_metastability_quirk: set to disable metastability quirk.
1045+
* @dis_split_quirk: set to disable split boundary.
10411046
* @imod_interval: set the interrupt moderation interval in 250ns
10421047
* increments or 0 to disable.
10431048
*/
@@ -1229,6 +1234,8 @@ struct dwc3 {
12291234

12301235
unsigned dis_metastability_quirk:1;
12311236

1237+
unsigned dis_split_quirk:1;
1238+
12321239
u16 imod_interval;
12331240
};
12341241

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