@@ -11,8 +11,6 @@ Subject: [PATCH] Add support for Orangepi R1 Plus LTS
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create mode 100644 arch/arm/dts/rk3328-orangepi-r1-plus-lts.dts
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create mode 100644 configs/orangepi-r1-plus-lts-rk3328_defconfig
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- diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile
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- index adfe6c3f..3d4e0f59 100644
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--- a/arch/arm/dts/Makefile
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+++ b/arch/arm/dts/Makefile
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@@ -110,6 +110,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3328) += \
@@ -23,9 +21,10 @@ index adfe6c3f..3d4e0f59 100644
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rk3328-roc-cc.dtb \
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rk3328-rock64.dtb \
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rk3328-rock-pi-e.dtb
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- diff --git a/arch/arm/dts/rk3328-orangepi-r1-plus-lts.dts b/arch/arm/dts/rk3328-orangepi-r1-plus-lts.dts
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- new file mode 100644
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- index 00000000..e6225b0c
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+ --- /dev/null
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+ +++ b/arch/arm/dts/rk3328-orangepi-r1-plus-lts-u-boot.dtsi
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+ @@ -0,0 +1,1 @@
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+ + #include "rk3328-nanopi-r2s-u-boot.dtsi"
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--- /dev/null
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+++ b/arch/arm/dts/rk3328-orangepi-r1-plus-lts.dts
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@@ -0,0 +1,7 @@
@@ -36,27 +35,26 @@ index 00000000..e6225b0c
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+ model = "Xunlong Orange Pi R1 Plus LTS";
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+ compatible = "xunlong,orangepi-r1-plus-lts", "rockchip,rk3328";
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+ };
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- diff --git a/configs/orangepi-r1-plus-lts-rk3328_defconfig b/configs/orangepi-r1-plus-lts-rk3328_defconfig
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- new file mode 100644
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- index 00000000..3cb3b5c3
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--- /dev/null
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+++ b/configs/orangepi-r1-plus-lts-rk3328_defconfig
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- @@ -0,0 +1,100 @@
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+ @@ -0,0 +1,104 @@
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+ CONFIG_ARM=y
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+ + CONFIG_SKIP_LOWLEVEL_INIT=y
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+ + CONFIG_COUNTER_FREQUENCY=24000000
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+ CONFIG_ARCH_ROCKCHIP=y
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+ CONFIG_SYS_TEXT_BASE=0x00200000
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- + CONFIG_SPL_GPIO_SUPPORT=y
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+ + CONFIG_SPL_GPIO=y
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+ + CONFIG_NR_DRAM_BANKS=1
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+ CONFIG_ENV_OFFSET=0x3F8000
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+ + CONFIG_DEFAULT_DEVICE_TREE="rk3328-orangepi-r1-plus-lts"
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+ CONFIG_ROCKCHIP_RK3328=y
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+ CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y
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+ CONFIG_TPL_LIBCOMMON_SUPPORT=y
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+ CONFIG_TPL_LIBGENERIC_SUPPORT=y
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- + CONFIG_SPL_DRIVERS_MISC_SUPPORT =y
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+ + CONFIG_SPL_DRIVERS_MISC =y
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+ CONFIG_SPL_STACK_R_ADDR=0x600000
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- + CONFIG_NR_DRAM_BANKS=1
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+ CONFIG_DEBUG_UART_BASE=0xFF130000
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+ CONFIG_DEBUG_UART_CLOCK=24000000
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- + CONFIG_SYSINFO=y
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+ CONFIG_SYS_LOAD_ADDR=0x800800
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+ CONFIG_DEBUG_UART=y
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+ CONFIG_TPL_SYS_MALLOC_F_LEN=0x800
@@ -65,14 +63,14 @@ index 00000000..3cb3b5c3
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+ CONFIG_FIT_VERBOSE=y
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+ CONFIG_SPL_LOAD_FIT=y
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+ CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-orangepi-r1-plus-lts.dtb"
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- + CONFIG_MISC_INIT_R=y
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+ # CONFIG_DISPLAY_CPUINFO is not set
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+ CONFIG_DISPLAY_BOARDINFO_LATE=y
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+ + CONFIG_MISC_INIT_R=y
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+ # CONFIG_SPL_RAW_IMAGE_SUPPORT is not set
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+ CONFIG_TPL_SYS_MALLOC_SIMPLE=y
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+ CONFIG_SPL_STACK_R=y
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- + CONFIG_SPL_I2C_SUPPORT =y
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- + CONFIG_SPL_POWER_SUPPORT =y
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+ + CONFIG_SPL_I2C =y
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+ + CONFIG_SPL_POWER =y
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+ CONFIG_SPL_ATF=y
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+ CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y
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+ CONFIG_CMD_BOOTZ=y
@@ -83,11 +81,11 @@ index 00000000..3cb3b5c3
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+ CONFIG_CMD_TIME=y
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+ CONFIG_SPL_OF_CONTROL=y
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+ CONFIG_TPL_OF_CONTROL=y
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- + CONFIG_DEFAULT_DEVICE_TREE="rk3328-orangepi-r1-plus-lts"
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+ CONFIG_OF_SPL_REMOVE_PROPS="clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents"
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+ CONFIG_TPL_OF_PLATDATA=y
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+ CONFIG_ENV_IS_IN_MMC=y
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+ CONFIG_SYS_RELOC_GD_ENV_ADDR=y
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+ + CONFIG_SYS_MMC_ENV_DEV=1
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+ CONFIG_NET_RANDOM_ETHADDR=y
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+ CONFIG_TPL_DM=y
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+ CONFIG_REGMAP=y
@@ -112,6 +110,7 @@ index 00000000..3cb3b5c3
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+ CONFIG_SPL_PINCTRL=y
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+ CONFIG_DM_PMIC=y
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+ CONFIG_PMIC_RK8XX=y
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+ + CONFIG_SPL_PMIC_RK8XX=y
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+ CONFIG_SPL_DM_REGULATOR=y
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+ CONFIG_REGULATOR_PWM=y
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+ CONFIG_DM_REGULATOR_FIXED=y
@@ -124,6 +123,7 @@ index 00000000..3cb3b5c3
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+ CONFIG_DM_RESET=y
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+ CONFIG_BAUDRATE=1500000
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+ CONFIG_DEBUG_UART_SHIFT=2
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+ + CONFIG_SYSINFO=y
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+ CONFIG_SYSRESET=y
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+ # CONFIG_TPL_SYSRESET is not set
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+ CONFIG_USB=y
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