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librfu_rfu.s
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@ Generated by gcc 2.9-arm-000512 for Thumb/elf
.code 16
.gcc2_compiled.:
.section .rodata
.align 2, 0
.type llsf_struct,object
.size llsf_struct,32
llsf_struct:
.byte 0x2
.byte 0xe
.byte 0x0
.byte 0xa
.byte 0x9
.byte 0x5
.byte 0x7
.byte 0x2
.byte 0x0
.byte 0xf
.byte 0x1
.byte 0x3
.byte 0x3
.space 1
.short 0x1f
.byte 0x3
.byte 0x16
.byte 0x12
.byte 0xe
.byte 0xd
.byte 0x9
.byte 0xb
.byte 0x3
.byte 0xf
.byte 0xf
.byte 0x1
.byte 0x3
.byte 0x3
.space 1
.short 0x7f
.align 2, 0
.type version_string,object
.size version_string,10
version_string:
.ascii "RFU_V1026\000"
.align 2, 0
.type str_checkMbootLL,object
.size str_checkMbootLL,10
str_checkMbootLL:
.ascii "RFU-MBOOT\000"
.text
.align 2, 0
.globl rfu_initializeAPI
.type rfu_initializeAPI,function
.thumb_func
rfu_initializeAPI:
.LFB1:
.LM1:
push {r4, r5, r6, r7, lr}
add r4, r0, #0
mov ip, r2
lsl r1, r1, #0x10
lsr r2, r1, #0x10
lsl r3, r3, #0x18
lsr r7, r3, #0x18
.LM2:
.LBB2:
.LM3:
mov r0, #0xf0
lsl r0, r0, #0x14
and r0, r0, r4
mov r1, #0x80
lsl r1, r1, #0x12
cmp r0, r1
bne .L3 @cond_branch
cmp r7, #0
bne .L30 @cond_branch
.L3:
.LM4:
mov r0, #0x3
and r0, r0, r4
cmp r0, #0
beq .L4 @cond_branch
.LM5:
.L30:
mov r0, #0x2
b .L28
.L4:
.LM6:
cmp r7, #0
beq .L29 @cond_branch
.LM7:
ldr r3, .L32
.LM8:
b .L31
.L33:
.align 2, 0
.L32:
.word 0xe64
.L29:
.LM9:
ldr r3, .L34
.LM10:
.L31:
cmp r2, r3
bcs .L7 @cond_branch
.LM11:
mov r0, #0x1
b .L28
.L35:
.align 2, 0
.L34:
.word 0x504
.L7:
.LM12:
ldr r0, .L36
str r4, [r0]
.LM13:
ldr r1, .L36+0x4
add r0, r4, #0
add r0, r0, #0xb4
str r0, [r1]
.LM14:
ldr r1, .L36+0x8
add r0, r0, #0x28
str r0, [r1]
.LM15:
ldr r2, .L36+0xc
mov r1, #0xde
lsl r1, r1, #0x1
add r0, r4, r1
str r0, [r2]
.LM16:
ldr r1, .L36+0x10
mov r3, #0xdf
lsl r3, r3, #0x2
add r0, r4, r3
str r0, [r1]
.LM17:
mov r5, #0x1
add r6, r2, #0
add r4, r1, #0
.L12:
.LM18:
lsl r2, r5, #0x2
add r3, r2, r6
sub r1, r5, #0x1
lsl r1, r1, #0x2
add r0, r1, r6
ldr r0, [r0]
add r0, r0, #0x70
str r0, [r3]
.LM19:
add r2, r2, r4
add r1, r1, r4
ldr r0, [r1]
add r0, r0, #0x1c
str r0, [r2]
.LM20:
add r0, r5, #0x1
lsl r0, r0, #0x10
lsr r5, r0, #0x10
cmp r5, #0x3
bls .L12 @cond_branch
.LM21:
ldr r0, .L36+0x8
ldr r1, [r0]
add r1, r1, #0xdc
ldr r4, .L36+0x10
ldr r0, [r4, #0xc]
add r0, r0, #0x1c
str r0, [r1]
.LM22:
mov r1, ip
add r2, r7, #0
bl STWI_init_all
.LM23:
bl rfu_STC_clearAPIVariables
.LM24:
mov r5, #0x0
ldr r3, .L36+0xc
mov r2, #0x0
.L17:
.LM25:
lsl r1, r5, #0x2
add r0, r1, r3
ldr r0, [r0]
str r2, [r0, #0x68]
.LM26:
str r2, [r0, #0x6c]
.LM27:
add r1, r1, r4
ldr r0, [r1]
str r2, [r0, #0x14]
.LM28:
str r2, [r0, #0x18]
.LM29:
add r0, r5, #0x1
lsl r0, r0, #0x10
lsr r5, r0, #0x10
cmp r5, #0x3
bls .L17 @cond_branch
.LM30:
.LBB3:
.LBE3:
ldr r4, .L36+0x14
mov r0, #0x2
neg r0, r0
and r4, r4, r0
ldr r1, .L36+0x8
ldr r0, [r1]
add r2, r0, #0
add r2, r2, #0x8
mov r3, #0x2f
ldr r5, .L36+0x18
.L24:
ldrh r0, [r4]
strh r0, [r2]
add r4, r4, #0x2
add r2, r2, #0x2
sub r0, r3, #0x1
lsl r0, r0, #0x10
lsr r3, r0, #0x10
cmp r3, r5
bne .L24 @cond_branch
.LM31:
ldr r1, [r1]
add r0, r1, #0
add r0, r0, #0x9
str r0, [r1, #0x4]
.LM32:
mov r0, #0x0
.L28:
.LM33:
.LBE2:
pop {r4, r5, r6, r7}
pop {r1}
bx r1
.L37:
.align 2, 0
.L36:
.word gRfuLinkStatus
.word gRfuStatic
.word gRfuFixed
.word gRfuSlotStatusNI
.word gRfuSlotStatusUNI
.word rfu_STC_fastCopy
.word 0xffff
.LFE1:
.Lfe1:
.size rfu_initializeAPI,.Lfe1-rfu_initializeAPI
.align 2, 0
.type rfu_STC_clearAPIVariables,function
.thumb_func
rfu_STC_clearAPIVariables:
.LFB2:
.LM34:
push {r4, r5, r6, r7, lr}
add sp, sp, #-0x4
.LM35:
.LBB4:
ldr r1, .L44
ldrh r0, [r1]
add r7, r0, #0
.LM36:
mov r6, #0x0
strh r6, [r1]
.LM37:
ldr r5, .L44+0x4
ldr r1, [r5]
ldrb r4, [r1]
.LM38:
.LBB5:
mov r0, sp
strh r6, [r0]
ldr r2, .L44+0x8
bl CpuSet
.LBE5:
.LM39:
ldr r2, [r5]
mov r0, #0x8
and r4, r4, r0
mov r1, #0x0
strb r4, [r2]
.LM40:
.LBB6:
mov r0, sp
add r0, r0, #0x2
strh r1, [r0]
ldr r4, .L44+0xc
ldr r1, [r4]
ldr r2, .L44+0x10
bl CpuSet
.LBE6:
.LM41:
ldr r1, [r4]
mov r0, #0x4
strb r0, [r1, #0x9]
.LM42:
ldr r0, [r5]
strb r6, [r0, #0x6]
.LM43:
ldr r1, [r4]
mov r0, #0xff
strb r0, [r1]
.LM44:
bl rfu_clearAllSlot
.LM45:
ldr r0, [r5]
strb r6, [r0, #0x9]
.LM46:
mov r2, #0x0
mov r3, #0x0
.L42:
.LM47:
ldr r0, [r5]
lsl r1, r2, #0x1
add r0, r0, #0x12
add r0, r0, r1
strh r3, [r0]
.LM48:
add r0, r2, #0x1
lsl r0, r0, #0x18
lsr r2, r0, #0x18
cmp r2, #0x3
bls .L42 @cond_branch
.LM49:
ldr r0, .L44
strh r7, [r0]
.LM50:
.LBE4:
add sp, sp, #0x4
pop {r4, r5, r6, r7}
pop {r0}
bx r0
.L45:
.align 2, 0
.L44:
.word 0x4000208
.word gRfuStatic
.word 0x1000014
.word gRfuLinkStatus
.word 0x100005a
.LFE2:
.Lfe2:
.size rfu_STC_clearAPIVariables,.Lfe2-rfu_STC_clearAPIVariables
.align 2, 0
.globl rfu_REQ_PARENT_resumeRetransmitAndChange
.type rfu_REQ_PARENT_resumeRetransmitAndChange,function
.thumb_func
rfu_REQ_PARENT_resumeRetransmitAndChange:
.LFB3:
.LM51:
push {lr}
.LM52:
ldr r0, .L47
bl STWI_set_Callback_M
.LM53:
bl STWI_send_ResumeRetransmitAndChangeREQ
.LM54:
pop {r0}
bx r0
.L48:
.align 2, 0
.L47:
.word rfu_STC_REQ_callback
.LFE3:
.Lfe3:
.size rfu_REQ_PARENT_resumeRetransmitAndChange,.Lfe3-rfu_REQ_PARENT_resumeRetransmitAndChange
.align 2, 0
.globl rfu_UNI_PARENT_getDRAC_ACK
.type rfu_UNI_PARENT_getDRAC_ACK,function
.thumb_func
rfu_UNI_PARENT_getDRAC_ACK:
.LFB4:
.LM55:
push {r4, r5, lr}
add r4, r0, #0
.LM56:
.LBB7:
.LM57:
mov r0, #0x0
strb r0, [r4]
.LM58:
ldr r5, .L60
ldr r0, [r5]
ldrb r0, [r0]
cmp r0, #0x1
beq .L50 @cond_branch
.LM59:
mov r0, #0xc0
lsl r0, r0, #0x2
b .L58
.L61:
.align 2, 0
.L60:
.word gRfuLinkStatus
.L50:
.LM60:
bl rfu_getSTWIRecvBuffer
add r1, r0, #0
.LM61:
ldrb r0, [r1]
cmp r0, #0x28
beq .L53 @cond_branch
cmp r0, #0x36
bne .L56 @cond_branch
.L53:
.LM62:
ldrb r0, [r1, #0x1]
cmp r0, #0
bne .L54 @cond_branch
.LM63:
ldr r0, [r5]
ldrb r0, [r0, #0x2]
b .L59
.L54:
.LM64:
ldrb r0, [r1, #0x4]
.L59:
strb r0, [r4]
.LM65:
mov r0, #0x0
b .L58
.L56:
.LM66:
mov r0, #0x10
.L58:
.LM67:
.LBE7:
pop {r4, r5}
pop {r1}
bx r1
.LFE4:
.Lfe4:
.size rfu_UNI_PARENT_getDRAC_ACK,.Lfe4-rfu_UNI_PARENT_getDRAC_ACK
.align 2, 0
.globl rfu_setTimerInterrupt
.type rfu_setTimerInterrupt,function
.thumb_func
rfu_setTimerInterrupt:
.LFB5:
.LM68:
push {lr}
add r2, r0, #0
add r0, r1, #0
lsl r2, r2, #0x18
lsr r2, r2, #0x18
.LM69:
add r1, r2, #0
bl STWI_init_timer
.LM70:
pop {r0}
bx r0
.LFE5:
.Lfe5:
.size rfu_setTimerInterrupt,.Lfe5-rfu_setTimerInterrupt
.align 2, 0
.globl rfu_getSTWIRecvBuffer
.type rfu_getSTWIRecvBuffer,function
.thumb_func
rfu_getSTWIRecvBuffer:
.LFB6:
.LM71:
.LM72:
ldr r0, .L64
ldr r0, [r0]
add r0, r0, #0xdc
ldr r0, [r0]
.LM73:
bx lr
.L65:
.align 2, 0
.L64:
.word gRfuFixed
.LFE6:
.Lfe6:
.size rfu_getSTWIRecvBuffer,.Lfe6-rfu_getSTWIRecvBuffer
.align 2, 0
.globl rfu_setMSCCallback
.type rfu_setMSCCallback,function
.thumb_func
rfu_setMSCCallback:
.LFB7:
.LM74:
push {lr}
.LM75:
bl STWI_set_Callback_S
.LM76:
pop {r0}
bx r0
.LFE7:
.Lfe7:
.size rfu_setMSCCallback,.Lfe7-rfu_setMSCCallback
.align 2, 0
.globl rfu_setREQCallback
.type rfu_setREQCallback,function
.thumb_func
rfu_setREQCallback:
.LFB8:
.LM77:
push {lr}
add r1, r0, #0
.LM78:
ldr r0, .L69
ldr r0, [r0]
str r1, [r0]
.LM79:
neg r0, r1
orr r0, r0, r1
lsr r0, r0, #0x1f
bl rfu_enableREQCallback
.LM80:
pop {r0}
bx r0
.L70:
.align 2, 0
.L69:
.word gRfuFixed
.LFE8:
.Lfe8:
.size rfu_setREQCallback,.Lfe8-rfu_setREQCallback
.align 2, 0
.type rfu_enableREQCallback,function
.thumb_func
rfu_enableREQCallback:
.LFB9:
.LM81:
push {lr}
lsl r0, r0, #0x18
.LM82:
cmp r0, #0
beq .L72 @cond_branch
.LM83:
ldr r0, .L75
ldr r2, [r0]
ldrb r1, [r2]
mov r0, #0x8
orr r0, r0, r1
b .L74
.L76:
.align 2, 0
.L75:
.word gRfuStatic
.L72:
.LM84:
ldr r0, .L77
ldr r2, [r0]
ldrb r1, [r2]
mov r0, #0xf7
and r0, r0, r1
.L74:
strb r0, [r2]
.LM85:
pop {r0}
bx r0
.L78:
.align 2, 0
.L77:
.word gRfuStatic
.LFE9:
.Lfe9:
.size rfu_enableREQCallback,.Lfe9-rfu_enableREQCallback
.align 2, 0
.type rfu_STC_REQ_callback,function
.thumb_func
rfu_STC_REQ_callback:
.LFB10:
.LM86:
push {r4, r5, lr}
lsl r0, r0, #0x18
lsr r5, r0, #0x18
lsl r1, r1, #0x10
lsr r4, r1, #0x10
.LM87:
ldr r0, .L81
bl STWI_set_Callback_M
.LM88:
ldr r0, .L81+0x4
ldr r0, [r0]
strh r4, [r0, #0x1c]
.LM89:
ldrb r1, [r0]
mov r0, #0x8
and r0, r0, r1
cmp r0, #0
beq .L80 @cond_branch
.LM90:
ldr r0, .L81+0x8
ldr r0, [r0]
ldr r2, [r0]
add r0, r5, #0
add r1, r4, #0
bl _call_via_r2
.L80:
.LM91:
pop {r4, r5}
pop {r0}
bx r0
.L82:
.align 2, 0
.L81:
.word rfu_CB_defaultCallback
.word gRfuStatic
.word gRfuFixed
.LFE10:
.Lfe10:
.size rfu_STC_REQ_callback,.Lfe10-rfu_STC_REQ_callback
.align 2, 0
.type rfu_CB_defaultCallback,function
.thumb_func
rfu_CB_defaultCallback:
.LFB11:
.LM92:
push {r4, r5, lr}
lsl r0, r0, #0x18
lsr r0, r0, #0x18
lsl r1, r1, #0x10
lsr r3, r1, #0x10
.LM93:
.LBB8:
.LM94:
cmp r0, #0xff
bne .L84 @cond_branch
.LM95:
ldr r0, .L92
ldr r0, [r0]
ldrb r1, [r0]
mov r0, #0x8
and r0, r0, r1
cmp r0, #0
beq .L85 @cond_branch
.LM96:
ldr r0, .L92+0x4
ldr r0, [r0]
ldr r2, [r0]
mov r0, #0xff
add r1, r3, #0
bl _call_via_r2
.L85:
.LM97:
ldr r0, .L92+0x8
ldr r0, [r0]
ldrb r1, [r0, #0x2]
ldrb r0, [r0, #0x3]
add r5, r0, #0
orr r5, r5, r1
.LM98:
mov r4, #0x0
.L89:
.LM99:
add r0, r5, #0
asr r0, r0, r4
mov r1, #0x1
and r0, r0, r1
cmp r0, #0
beq .L88 @cond_branch
.LM100:
add r0, r4, #0
bl rfu_STC_removeLinkData
.LM101:
.L88:
add r0, r4, #0x1
lsl r0, r0, #0x18
lsr r4, r0, #0x18
cmp r4, #0x3
bls .L89 @cond_branch
.LM102:
ldr r0, .L92+0x8
ldr r1, [r0]
mov r0, #0xff
strb r0, [r1]
.L84:
.LM103:
.LBE8:
pop {r4, r5}
pop {r0}
bx r0
.L93:
.align 2, 0
.L92:
.word gRfuStatic
.word gRfuFixed
.word gRfuLinkStatus
.LFE11:
.Lfe11:
.size rfu_CB_defaultCallback,.Lfe11-rfu_CB_defaultCallback
.align 2, 0
.globl rfu_waitREQComplete
.type rfu_waitREQComplete,function
.thumb_func
rfu_waitREQComplete:
.LFB12:
.LM104:
push {lr}
.LM105:
bl STWI_poll_CommandEnd
.LM106:
ldr r0, .L95
ldr r0, [r0]
ldrh r0, [r0, #0x1c]
.LM107:
pop {r1}
bx r1
.L96:
.align 2, 0
.L95:
.word gRfuStatic
.LFE12:
.Lfe12:
.size rfu_waitREQComplete,.Lfe12-rfu_waitREQComplete
.align 2, 0
.globl rfu_REQ_RFUStatus
.type rfu_REQ_RFUStatus,function
.thumb_func
rfu_REQ_RFUStatus:
.LFB13:
.LM108:
push {lr}
.LM109:
ldr r0, .L98
bl STWI_set_Callback_M
.LM110:
bl STWI_send_SystemStatusREQ
.LM111:
pop {r0}
bx r0
.L99:
.align 2, 0
.L98:
.word rfu_STC_REQ_callback
.LFE13:
.Lfe13:
.size rfu_REQ_RFUStatus,.Lfe13-rfu_REQ_RFUStatus
.align 2, 0
.globl rfu_getRFUStatus
.type rfu_getRFUStatus,function
.thumb_func
rfu_getRFUStatus:
.LFB14:
.LM112:
push {r4, r5, lr}
add r4, r0, #0
.LM113:
ldr r5, .L106
ldr r0, [r5]
add r0, r0, #0xdc
ldr r0, [r0]
ldrb r0, [r0]
cmp r0, #0x93
beq .L101 @cond_branch
.LM114:
mov r0, #0x10
b .L104
.L107:
.align 2, 0
.L106:
.word gRfuFixed
.L101:
.LM115:
bl STWI_poll_CommandEnd
lsl r0, r0, #0x10
cmp r0, #0
bne .L102 @cond_branch
.LM116:
ldr r0, [r5]
add r0, r0, #0xdc
ldr r0, [r0]
ldrb r0, [r0, #0x7]
b .L105
.L102:
.LM117:
mov r0, #0xff
.L105:
strb r0, [r4]
.LM118:
mov r0, #0x0
.L104:
.LM119:
pop {r4, r5}
pop {r1}
bx r1
.LFE14:
.Lfe14:
.size rfu_getRFUStatus,.Lfe14-rfu_getRFUStatus
.align 2, 0
.globl rfu_MBOOT_CHILD_inheritanceLinkStatus
.type rfu_MBOOT_CHILD_inheritanceLinkStatus,function
.thumb_func
rfu_MBOOT_CHILD_inheritanceLinkStatus:
.LFB15:
.LM120:
push {lr}
.LM121:
.LBB9:
ldr r2, .L123
.LM122:
ldr r3, .L123+0x4
.LM123:
b .L122
.L124:
.align 2, 0
.L123:
.word str_checkMbootLL
.word 0x30000f0
.L111:
.LM124:
ldrb r0, [r3]
add r3, r3, #0x1
add r2, r2, #0x1
cmp r1, r0
bne .L121 @cond_branch
.L122:
ldrb r1, [r2]
cmp r1, #0
bne .L111 @cond_branch
.LM125:
mov r2, #0xc0
lsl r2, r2, #0x12
.LM126:
mov r3, #0x0
.LM127:
mov r1, #0x0
.L117:
.LM128:
ldrh r0, [r2]
add r0, r3, r0
lsl r0, r0, #0x10
lsr r3, r0, #0x10
add r2, r2, #0x2
.LM129:
add r0, r1, #0x1
lsl r0, r0, #0x18
lsr r1, r0, #0x18
cmp r1, #0x59
bls .L117 @cond_branch
.LM130:
ldr r0, .L125
ldrh r0, [r0]
cmp r3, r0
bne .L119 @cond_branch
.LM131:
mov r0, #0xc0
lsl r0, r0, #0x12
ldr r1, .L125+0x4
ldr r1, [r1]
mov r2, #0x5a
bl CpuSet
.LM132:
ldr r0, .L125+0x8
ldr r2, [r0]
ldrb r1, [r2]
mov r0, #0x80
orr r0, r0, r1
strb r0, [r2]
.LM133:
mov r0, #0x0
b .L120
.L126:
.align 2, 0
.L125:
.word 0x30000fa
.word gRfuLinkStatus
.word gRfuStatic
.L121:
.LM134:
.L119:
.LM135: